From mboxrd@z Thu Jan 1 00:00:00 1970 From: Timur Tabi Subject: Re: [Linaro-acpi] [PATCH v8 5/5] Watchdog: introduce ARM SBSA watchdog driver Date: Thu, 5 Nov 2015 08:08:55 -0600 Message-ID: <563B62F7.3050307@codeaurora.org> References: <1445961999-9506-1-git-send-email-fu.wei@linaro.org> <1445961999-9506-6-git-send-email-fu.wei@linaro.org> <563AE588.1080009@roeck-us.net> <563B5DF9.6080102@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Fu Wei Cc: Guenter Roeck , Linaro ACPI Mailman List , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, lkml , linux-doc@vger.kernel.org, "Rafael J. Wysocki" , Arnd Bergmann , Jonathan Corbet , Jon Masters , Pratyush Anand , Will Deacon , Wim Van Sebroeck , Catalin Marinas , Wei Fu , Rob Herring , Vipul Gandhi , Dave Young List-Id: devicetree@vger.kernel.org Fu Wei wrote: > SBSA 2.3 Page 23 : > Note: the watchdog offset register is 32 bits wide. This gives a > maximum watch period of around 10s at a system > counter frequency of 400MHz. If a larger watch period is required then > the compare value can be programmed > directly into the compare value register. > > 214s means your system counter is approximately at 20MHz which is in > the range of (10MHz ~ 400MHz) > > SBSA 2.3 Page 13 : > The System Counter (of the Generic Timer) shall run at a minimum > frequency of 10MHz and maximum of > 400MHz. Thanks, that explains a lot. If we expected customers to have a lower system counter frequency, then we wouldn't have to worry about the timeouts being too short. It seems to me that the SBSA spec says that if you want a longer timeout, you have to lower the frequency. We shouldn't be complicating the driver because some customers might not follow the spec. -- Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation.