From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kishon Vijay Abraham I Subject: Re: [PATCH 0/2] DRA72/DRA74: Add 2 lane support Date: Mon, 11 Jan 2016 13:39:02 +0530 Message-ID: <5693631E.2050807@ti.com> References: <1452077393-25880-1-git-send-email-kishon@ti.com> <20160107174126.GB14105@localhost> <20160107181320.GO12777@atomide.com> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20160107181320.GO12777@atomide.com> Sender: linux-kernel-owner@vger.kernel.org To: Tony Lindgren , Bjorn Helgaas Cc: Bjorn Helgaas , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , linux-omap@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, nsekhar@ti.com, Richard Cochran List-Id: devicetree@vger.kernel.org Hi Tony, On Thursday 07 January 2016 11:43 PM, Tony Lindgren wrote: > * Bjorn Helgaas [160107 09:42]: >> [+cc Richard] >> >> Hi Kishon, >> >> On Wed, Jan 06, 2016 at 04:19:51PM +0530, Kishon Vijay Abraham I wrote: >>> Add driver modifications in pci-dra7xx to get x2 mode working in >>> DRA72 and DRA74. Certain modifications is needed in PHY driver also >>> which will be sent as a separate series. >>> >>> Certain board modifications has to be done in order to test >>> x2 mode in dra72-evm. >>> >>> These patches were created on pci next. >>> >>> Changes from RFC: >>> *) .b1co_mode_sel_mask is now set with the correct value. >>> *) cleanup the patch >>> >>> Kishon Vijay Abraham I (2): >>> pci: host: pci-dra7xx: use "num-lanes" property to find phy count >>> pci: host: pci-dra7xx: Enable x2 mode support >>> >>> Documentation/devicetree/bindings/pci/ti-pci.txt | 8 +- >>> drivers/pci/host/pci-dra7xx.c | 104 +++++++++++++++++++--- >>> 2 files changed, 97 insertions(+), 15 deletions(-) >> >> Apparently dra7xx in mainline doesn't work [1]. Until that's >> resolved, I'm going to ignore dra7xx patches. > > Agreed. Guys, please do the development _and_ testing on the mainline > kernel. We do have the mainline kernel usable for probably a few > tens of omap SoC variants. If you have issues using dra7 with mainline, > please fix those issues ASAP. Here Bjorn meant pci-dra7xx is broken in mainline and not the dra7xx boot as such. (which is due to the absence of reset controller driver). All the patches to pci-dra7xx were tested on mainline kernel (having out-of-tree reset patches since the reset controller driver is not merged). > > Ideally of course please also use the device you're working on to > send out the patches :) dra7x is the only device that use this pci driver and all the patches to pci-dra7xx have been tested on both dra7 and dra72 boards. Thanks Kishon