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From: Caesar Wang <caesar.upstream-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
Cc: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
	linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	zhengxing <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Subject: Re: [PATCH v2] ARM: dts: rockchip: add support emac for RK3036
Date: Tue, 26 Jan 2016 00:06:27 +0800	[thread overview]
Message-ID: <56A64803.8070006@gmail.com> (raw)
In-Reply-To: <1453725488-5279-1-git-send-email-wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>



在 2016年01月25日 20:38, Caesar Wang 写道:
> From: zhengxing <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
> This patch describe the emac, and we need to let mac clock under
> the APLL which is able to provide the accurate 50MHz what mac_ref
> need.
>
> This patch makes the emac parent clock is DPLL instead of APLL.
> since that will cause some unstable things if the cpufreq is working.
>
> Signed-off-by: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
> ---
[...]
> diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
> index 7897449..436c77a 100644
> --- a/arch/arm/boot/dts/rk3036.dtsi
> +++ b/arch/arm/boot/dts/rk3036.dtsi
> @@ -186,6 +186,27 @@
>   		status = "disabled";
>   	};
>   
> +	emac: ethernet@10200000 {
> +		compatible = "rockchip,rk3036-emac", "snps,arc-emac";
> +		reg = <0x10200000 0x4000>;
> +		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		rockchip,grf = <&grf>;
> +		clocks = <&cru HCLK_MAC>, <&cru SCLK_MACREF>, <&cru SCLK_MAC>;
> +		clock-names = "hclk", "macref", "macclk";
> +		/*
> +		 * Fix the emac parent clock is DPLL instead of APLL.
> +		 * since that will cause some unstable things if the cpufreq
> +		 * is working. (e.g: the accurate 50MHz what mac_ref need)
> +		 */
> +		assigned-clocks = <&cru SCLK_MACPLL>;
> +		assigned-clock-parents = <&cru PLL_DPLL>;

This patch depends on the clock patch. :-( (still in my work branch)

> +		max-speed = <100>;
> +		phy-mode = "rmii";
> +		status = "disabled";
> +	};
> +
>   	sdmmc: dwmmc@10214000 {
>   		compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
>   		reg = <0x10214000 0x4000>;
> @@ -556,6 +577,24 @@
>   			};
>   		};
>   
> +		emac {
> +			emac_xfer: emac-xfer {
> +				rockchip,pins = <2 10 RK_FUNC_1 &pcfg_pull_default>, /* crs_dvalid */
> +						<2 13 RK_FUNC_1 &pcfg_pull_default>, /* tx_en */
> +						<2 14 RK_FUNC_1 &pcfg_pull_default>, /* mac_clk */
> +						<2 15 RK_FUNC_1 &pcfg_pull_default>, /* rx_err */
> +						<2 16 RK_FUNC_1 &pcfg_pull_default>, /* rxd1 */
> +						<2 17 RK_FUNC_1 &pcfg_pull_default>, /* rxd0 */
> +						<2 18 RK_FUNC_1 &pcfg_pull_default>, /* txd1 */
> +						<2 19 RK_FUNC_1 &pcfg_pull_default>; /* txd0 */
> +			};
> +
> +			emac_mdio: emac-mdio {
> +				rockchip,pins = <2 12 RK_FUNC_1 &pcfg_pull_default>, /* mac_md */
> +						<2 25 RK_FUNC_1 &pcfg_pull_default>; /* mac_mdclk */
> +			};
> +		};
> +
>   		i2c0 {
>   			i2c0_xfer: i2c0-xfer {
>   				rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,

-- 
Thanks,
Caesar

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      parent reply	other threads:[~2016-01-25 16:06 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-25 12:38 [PATCH v2] ARM: dts: rockchip: add support emac for RK3036 Caesar Wang
     [not found] ` <1453725488-5279-1-git-send-email-wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-01-25 16:06   ` Caesar Wang [this message]

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