From mboxrd@z Thu Jan 1 00:00:00 1970 From: Nicolas Ferre Subject: Re: [PATCH v3 1/3] spi: atmel: add support for the internal chip-select of the spi controller Date: Wed, 27 Jan 2016 17:55:10 +0100 Message-ID: <56A8F66E.6070105@atmel.com> References: <56A8E66B.208@atmel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: In-Reply-To: Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: =?UTF-8?B?TcOlbnMgUnVsbGfDpXJk?= Cc: Cyrille Pitchen , Mark Browk , linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , "Yang, Wenyou" List-Id: devicetree@vger.kernel.org Le 27/01/2016 16:53, M=E5ns Rullg=E5rd a =E9crit : > Nicolas Ferre writes: >=20 >> Le 05/01/2016 22:50, M=E5ns Rullg=E5rd a =E9crit : >>> Cyrille Pitchen writes: >>> >>>> This patch relies on the CSAAT (Chip Select Active After Transfer)= feature >>>> introduced by the version 2 of the spi controller. This new mode a= llows to >>>> use properly the internal chip-select output pin of the spi contro= ller >>>> instead of using external gpios. Consequently, the "cs-gpios" devi= ce-tree >>>> property becomes optional. >>>> >>>> When the new CSAAT bit is set into the Chip Select Register, the i= nternal >>>> chip-select output pin remains asserted till both the following co= nditions >>>> become true: >>>> - the LASTXFER bit is set into the Control Register (or the Transm= it Data >>>> Register) >>>> - the Transmit Data Register and its shift register are empty. >>>> >>>> WARNING: if the LASTXFER bit is set into the Control Register then= new >>>> data are written into the Transmit Data Register fast enough to ke= ep its >>>> shifter not empty, the chip-select output pin remains asserted. On= ly when >>>> the shifter becomes empty, the chip-select output pin is unasserte= d. >>>> >>>> When the CSAAT bit is clear in the Chip Select Register, the LASTX= =46ER bit >>>> is ignored in both the Control Register and the Transmit Data Regi= ster. >>>> The internal chip-select output pin remains active as long as the = Transmit >>>> Data Register or its shift register are not empty. >>>> >>>> Signed-off-by: Cyrille Pitchen >>>> --- >>>> drivers/spi/spi-atmel.c | 37 ++++++++++++++++++++++++++++--------= - >>>> 1 file changed, 28 insertions(+), 9 deletions(-) >>> >>> [...] >>> >>>> @@ -1338,6 +1350,13 @@ static int atmel_spi_probe(struct platform_= device *pdev) >>>> >>>> atmel_get_caps(as); >>>> >>>> + as->use_cs_gpios =3D true; >>>> + if (atmel_spi_is_v2(as) && >>>> + !of_get_property(pdev->dev.of_node, "cs-gpios", NULL)) { >>>> + as->use_cs_gpios =3D false; >>>> + master->num_chipselect =3D 4; >>>> + } >>> >>> This part breaks the AVR32 boards and probably anything else that >>> doesn't use devicetree but does use GPIOs for chip select. >> >> Hi Mans, >> >> I have difficulties finding why you may enter this test. So, maybe y= ou >> can give me a clue by reading for me the value that resides in the S= PI >> version register: you can have it by reading at 0xFFE000FC for insta= nce >> (actually the atmel_get_caps() dev_info() call gives it as well in t= he >> boot log which is somewhat easier: I tried to find one on the Intern= et >> without success...). >> >> So I think that just fixing the logic in atmel_get_caps() introduced= by >> d4820b7496219edd9a7055022681364d304525f7 can make it come back to a >> situation where the ARV32 was more tested than nowadays. >=20 > atmel_spi atmel_spi.0: version: 0x171 > atmel_spi atmel_spi.0: Atmel SPI Controller at 0xffe00000 (irq 3) >=20 > atmel_spi_is_v2() returns true for version > 0x121. Ok, thanks: we thought that AVR32 didn't have a v2 IP: obviously it has= =2E So yes, I extract the patch by Cyrille to correct this and send it righ= t now. If you can test it, it's even better ;-) Thanks, bye. --=20 Nicolas Ferre -- To unsubscribe from this list: send the line "unsubscribe devicetree" i= n the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html