* [PATCH 1/5] ARM: dts: NSP: Fix PCIE DT issue
2016-02-05 22:43 [PATCH 0/5] ARM: dts: NSP: DT Updates Jon Mason
@ 2016-02-05 22:43 ` Jon Mason
2016-02-05 22:43 ` [PATCH 2/5] ARM: dts: NSP: Fix CPU " Jon Mason
` (4 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Jon Mason @ 2016-02-05 22:43 UTC (permalink / raw)
To: Florian Fainelli
Cc: devicetree, bcm-kernel-feedback-list, linux-kernel,
linux-arm-kernel
Adding the ranges value is preventing the PCI nodes from working.
Pulling them out outside makes them work again (and makes it similar to
the NS2 device tree).
Signed-off-by: Jon Mason <jonmason@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 144 ++++++++++++++++++++---------------------
1 file changed, 72 insertions(+), 72 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 10bdef5..c5b0c09c 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -185,78 +185,6 @@
status = "disabled";
};
- pcie0: pcie@12000 {
- compatible = "brcm,iproc-pcie";
- reg = <0x12000 0x1000>;
-
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_NONE>;
-
- linux,pci-domain = <0>;
-
- bus-range = <0x00 0xff>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
-
- /* Note: The HW does not support I/O resources. So,
- * only the memory resource range is being specified.
- */
- ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>;
-
- status = "disabled";
- };
-
- pcie1: pcie@13000 {
- compatible = "brcm,iproc-pcie";
- reg = <0x13000 0x1000>;
-
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 137 IRQ_TYPE_NONE>;
-
- linux,pci-domain = <1>;
-
- bus-range = <0x00 0xff>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
-
- /* Note: The HW does not support I/O resources. So,
- * only the memory resource range is being specified.
- */
- ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>;
-
- status = "disabled";
- };
-
- pcie2: pcie@14000 {
- compatible = "brcm,iproc-pcie";
- reg = <0x14000 0x1000>;
-
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 143 IRQ_TYPE_NONE>;
-
- linux,pci-domain = <2>;
-
- bus-range = <0x00 0xff>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
-
- /* Note: The HW does not support I/O resources. So,
- * only the memory resource range is being specified.
- */
- ranges = <0x82000000 0 0x48000000 0x48000000 0 0x8000000>;
-
- status = "disabled";
- };
-
nand: nand@26000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
reg = <0x026000 0x600>,
@@ -306,4 +234,76 @@
<0x3f408 0x04>;
};
};
+
+ pcie0: pcie@18012000 {
+ compatible = "brcm,iproc-pcie";
+ reg = <0x18012000 0x1000>;
+
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_NONE>;
+
+ linux,pci-domain = <0>;
+
+ bus-range = <0x00 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+
+ /* Note: The HW does not support I/O resources. So,
+ * only the memory resource range is being specified.
+ */
+ ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>;
+
+ status = "disabled";
+ };
+
+ pcie1: pcie@18013000 {
+ compatible = "brcm,iproc-pcie";
+ reg = <0x18013000 0x1000>;
+
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 137 IRQ_TYPE_NONE>;
+
+ linux,pci-domain = <1>;
+
+ bus-range = <0x00 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+
+ /* Note: The HW does not support I/O resources. So,
+ * only the memory resource range is being specified.
+ */
+ ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>;
+
+ status = "disabled";
+ };
+
+ pcie2: pcie@18014000 {
+ compatible = "brcm,iproc-pcie";
+ reg = <0x18014000 0x1000>;
+
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 143 IRQ_TYPE_NONE>;
+
+ linux,pci-domain = <2>;
+
+ bus-range = <0x00 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+
+ /* Note: The HW does not support I/O resources. So,
+ * only the memory resource range is being specified.
+ */
+ ranges = <0x82000000 0 0x48000000 0x48000000 0 0x8000000>;
+
+ status = "disabled";
+ };
};
--
1.9.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 2/5] ARM: dts: NSP: Fix CPU DT issue
2016-02-05 22:43 [PATCH 0/5] ARM: dts: NSP: DT Updates Jon Mason
2016-02-05 22:43 ` [PATCH 1/5] ARM: dts: NSP: Fix PCIE DT issue Jon Mason
@ 2016-02-05 22:43 ` Jon Mason
2016-02-05 22:43 ` [PATCH 3/5] ARM: dts: NSP: Add PMU Support to DT Jon Mason
` (3 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Jon Mason @ 2016-02-05 22:43 UTC (permalink / raw)
To: Florian Fainelli
Cc: devicetree, bcm-kernel-feedback-list, linux-kernel,
linux-arm-kernel
There is a double definition of the CPUs present in the device tree.
Remove unnecessary cpu device tree definition.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 12 ------------
1 file changed, 12 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index c5b0c09c..c37778e 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -68,18 +68,6 @@
#address-cells = <1>;
#size-cells = <1>;
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a9";
- next-level-cache = <&L2>;
- reg = <0x0>;
- };
- };
-
a9pll: arm_clk@00000 {
#clock-cells = <0>;
compatible = "brcm,nsp-armpll";
--
1.9.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 3/5] ARM: dts: NSP: Add PMU Support to DT
2016-02-05 22:43 [PATCH 0/5] ARM: dts: NSP: DT Updates Jon Mason
2016-02-05 22:43 ` [PATCH 1/5] ARM: dts: NSP: Fix PCIE DT issue Jon Mason
2016-02-05 22:43 ` [PATCH 2/5] ARM: dts: NSP: Fix CPU " Jon Mason
@ 2016-02-05 22:43 ` Jon Mason
2016-02-05 22:43 ` [PATCH 4/5] ARM: dts: NSP: Add SP805 " Jon Mason
` (2 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Jon Mason @ 2016-02-05 22:43 UTC (permalink / raw)
To: Florian Fainelli
Cc: devicetree, bcm-kernel-feedback-list, linux-kernel,
linux-arm-kernel
Add support for the ARM Performance Monitor Unit to the Northstar Plus
device tree.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index c37778e..415a0a6 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -45,14 +45,14 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu@0 {
+ cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <0x0>;
};
- cpu@1 {
+ cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
@@ -62,6 +62,13 @@
};
};
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>;
+ };
+
mpcore {
compatible = "simple-bus";
ranges = <0x00000000 0x19000000 0x00023000>;
--
1.9.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 4/5] ARM: dts: NSP: Add SP805 Support to DT
2016-02-05 22:43 [PATCH 0/5] ARM: dts: NSP: DT Updates Jon Mason
` (2 preceding siblings ...)
2016-02-05 22:43 ` [PATCH 3/5] ARM: dts: NSP: Add PMU Support to DT Jon Mason
@ 2016-02-05 22:43 ` Jon Mason
2016-02-06 12:49 ` Sergei Shtylyov
2016-02-05 22:43 ` [PATCH 5/5] ARM: dts: NSP: Add SP804 " Jon Mason
2016-02-12 23:55 ` [PATCH 0/5] ARM: dts: NSP: DT Updates Florian Fainelli
5 siblings, 1 reply; 9+ messages in thread
From: Jon Mason @ 2016-02-05 22:43 UTC (permalink / raw)
To: Florian Fainelli
Cc: devicetree, bcm-kernel-feedback-list, linux-kernel,
linux-arm-kernel
Add support for the ARM SP805 Watchdog timer to the Northstar Plus
device tree.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 415a0a6..0e8cb6e 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -203,6 +203,14 @@
clock-frequency = <100000>;
};
+ wdt@39000 {
+ compatible = "arm,sp805", "arm,primecell";
+ reg = <0x39000 0x1000>;
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&iprocslow>, <&iprocslow>;
+ clock-names = "wdogclk", "apb_pclk";
+ };
+
lcpll0: lcpll0@3f100 {
#clock-cells = <1>;
compatible = "brcm,nsp-lcpll0";
--
1.9.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH 4/5] ARM: dts: NSP: Add SP805 Support to DT
2016-02-05 22:43 ` [PATCH 4/5] ARM: dts: NSP: Add SP805 " Jon Mason
@ 2016-02-06 12:49 ` Sergei Shtylyov
[not found] ` <CAC3K-4p9kMALwg-Y355c-u06sAT-HLLY04=XMUer+R71OJLdcQ@mail.gmail.com>
0 siblings, 1 reply; 9+ messages in thread
From: Sergei Shtylyov @ 2016-02-06 12:49 UTC (permalink / raw)
To: Jon Mason, Florian Fainelli
Cc: devicetree, bcm-kernel-feedback-list, linux-kernel,
linux-arm-kernel
Hello.
On 2/6/2016 1:43 AM, Jon Mason wrote:
> Add support for the ARM SP805 Watchdog timer to the Northstar Plus
> device tree.
>
> Signed-off-by: Jon Mason <jonmason@broadcom.com>
> ---
> arch/arm/boot/dts/bcm-nsp.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
> index 415a0a6..0e8cb6e 100644
> --- a/arch/arm/boot/dts/bcm-nsp.dtsi
> +++ b/arch/arm/boot/dts/bcm-nsp.dtsi
> @@ -203,6 +203,14 @@
> clock-frequency = <100000>;
> };
>
> + wdt@39000 {
Should be "watchdog@39000", according to ePAPR.
[...]
MBR, Sergei
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 5/5] ARM: dts: NSP: Add SP804 Support to DT
2016-02-05 22:43 [PATCH 0/5] ARM: dts: NSP: DT Updates Jon Mason
` (3 preceding siblings ...)
2016-02-05 22:43 ` [PATCH 4/5] ARM: dts: NSP: Add SP805 " Jon Mason
@ 2016-02-05 22:43 ` Jon Mason
2016-02-12 23:55 ` [PATCH 0/5] ARM: dts: NSP: DT Updates Florian Fainelli
5 siblings, 0 replies; 9+ messages in thread
From: Jon Mason @ 2016-02-05 22:43 UTC (permalink / raw)
To: Florian Fainelli
Cc: devicetree, bcm-kernel-feedback-list, linux-kernel,
linux-arm-kernel
Add support for the ARM SP804 timer to the Northstar Plus device tree.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 0e8cb6e..06a242e 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -194,6 +194,24 @@
brcm,nand-has-wp;
};
+ ccbtimer0: timer@34000 {
+ compatible = "arm,sp804";
+ reg = <0x34000 0x1000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&iprocslow>;
+ clock-names = "apb_pclk";
+ };
+
+ ccbtimer1: timer@35000 {
+ compatible = "arm,sp804";
+ reg = <0x35000 0x1000>;
+ interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&iprocslow>;
+ clock-names = "apb_pclk";
+ };
+
i2c0: i2c@38000 {
compatible = "brcm,iproc-i2c";
reg = <0x38000 0x50>;
--
1.9.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH 0/5] ARM: dts: NSP: DT Updates
2016-02-05 22:43 [PATCH 0/5] ARM: dts: NSP: DT Updates Jon Mason
` (4 preceding siblings ...)
2016-02-05 22:43 ` [PATCH 5/5] ARM: dts: NSP: Add SP804 " Jon Mason
@ 2016-02-12 23:55 ` Florian Fainelli
5 siblings, 0 replies; 9+ messages in thread
From: Florian Fainelli @ 2016-02-12 23:55 UTC (permalink / raw)
To: Jon Mason, Florian Fainelli
Cc: devicetree, linux-arm-kernel, linux-kernel,
bcm-kernel-feedback-list
On 05/02/16 14:43, Jon Mason wrote:
> Northstar Plus device tree changes. The first 2 are bug fixes that
> probably should go in ASAP. The other 3 enable new hardware and can be
> pushed into the next merge window.
Series applied to devicetree/next, with the update to the last patch
based on Sergei's comment, and I took the v2 of patch 4.
Thanks everyone.
--
Florian
^ permalink raw reply [flat|nested] 9+ messages in thread