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From: Andre Przywara <andre.przywara@arm.com>
To: Hans de Goede <hdegoede@redhat.com>
Cc: "Maxime Ripard" <maxime.ripard@free-electrons.com>,
	"Emilio López" <emilio@elopez.com.ar>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Chen-Yu Tsai" <wens@csie.org>,
	"Stephen Boyd" <sboyd@codeaurora.org>,
	linux-clk@vger.kernel.org, linux-sunxi@googlegroups.com,
	linux-arm-kernel@lists.infradead.org,
	"Rob Herring" <rob.herring@linaro.org>,
	"Mark Rutland" <mark.rutland@arm.com>,
	devicetree@vger.kernel.org,
	"Grant Likely" <grant.likely@linaro.org>,
	"Frank Rowand" <frowand.list@gmail.com>
Subject: Allwinner A64 MMC support
Date: Mon, 15 Feb 2016 13:59:28 +0000	[thread overview]
Message-ID: <56C1D9C0.6020601@arm.com> (raw)
In-Reply-To: <56C1C7BB.1040602@redhat.com>

Hi Hans,

....

> 
> p.s.
> 
> I love the work you've been doing on the A64, I've not had a chance
> to try it out yet though. Have you made any progress with getting
> the mmc slot to work ?  If not maybe I can make some time I've
> prior experience in bringing up the mmc slot on other Allwinner SoCs

Thanks for that!

So we made some progress on the weekend (with the help of #linux-sunxi):
1) The regulator node was stupidly put by me into a separate child node
without putting address and size cells into. So I just moved it into
/soc directly now and that seems to fixed the missing regulator.
2) The reset node is a allwinner,sun6i-a31-ahb1-reset, which does not
get registered automatically, but by an explicit call from mach-sunxi/.
I wonder why we do this (yes, I saw that comment, but still...) and if
it would work with a normal MODULE_DEVICE_TABLE() declaration.
There is and will be no equivalent to the mach- directory on arm64.
3) As Jens pointed out, the MMC IP block isn't really compatible.
Changing the clocks is easy (done already), but we need to come up with
code to cover the new phase setting registers in the A64 MMC register block.

Interestingly somehow hacking this (pretending it is compatible) seems
to work, though I got reports from people about mysterious kernel
crashes, so I'm inclined to leave MMC out of the first patch series.

So if you could take a look at the new registers (starting at offset
0x140) and work out what we actually need to do here, that would be
great. I have no real clue about what they actually do and how they
relate to the current output and sample clock phase.
To me it looks like we might get away with just triggering the automatic
calibration and the hardware does the rest for us - keep your fingers
crossed ;-)

Cheers,
Andre.

  reply	other threads:[~2016-02-15 13:59 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-12 17:59 [RFC PATCH 0/4] clk: sunxi: fix DT compatibility issues Andre Przywara
     [not found] ` <1455300000-18723-1-git-send-email-andre.przywara-5wv7dgnIgG8@public.gmane.org>
2016-02-12 17:59   ` [RFC PATCH 1/4] clk: sunxi: rename new sun6i_a31_pll6 clock to sun6i_a31_pll clock Andre Przywara
2016-02-12 17:59   ` [RFC PATCH 2/4] clk: sunxi: re-add old sun6i_a31_pll6 clock Andre Przywara
2016-02-12 17:59   ` [RFC PATCH 3/4] clk: sunxi: revert .dtsi changes for DTs with a " Andre Przywara
2016-02-12 18:51   ` [linux-sunxi] [RFC PATCH 0/4] clk: sunxi: fix DT compatibility issues Hans de Goede
2016-02-15 10:16     ` (Still) breaking DT compatibility (was: [RFC PATCH 0/4] clk: sunxi: fix DT compatibility issues) Andre Przywara
2016-02-15 12:42       ` [linux-sunxi] (Still) breaking DT compatibility Hans de Goede
2016-02-15 13:59         ` Andre Przywara [this message]
2016-02-15 14:23           ` [linux-sunxi] Allwinner A64 MMC support Chen-Yu Tsai
     [not found]             ` <CAGb2v65E54mnLEcPzLyycEBSHbvn6tp9JpS+S8gdbDg_e7qFyQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-02-15 14:36               ` Andre Przywara
     [not found]                 ` <56C1E250.9070301-5wv7dgnIgG8@public.gmane.org>
2016-02-15 14:58                   ` Chen-Yu Tsai
2016-02-15 15:22                     ` [linux-sunxi] " Andre Przywara
2016-02-15 15:52           ` Hans de Goede
     [not found]           ` <56C1D9C0.6020601-5wv7dgnIgG8@public.gmane.org>
2016-02-16  9:33             ` Maxime Ripard
2016-02-12 18:00 ` [RFC PATCH 4/4] DT: Allwinner H3: fix PLL8 clock Andre Przywara

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