[PATCH 0/4] Support for Broadcom Vulcan ARM64 processor

[PATCH 0/4] Support for Broadcom Vulcan ARM64 processor

[Jayachandran C]

This patchset adds support for Broadcom's Vulcan CPU.

The changes are to add the a device tree (dtsi) for the
Vulcan SoC, a device tree(dts) for developer platform
and related documentation.

Review comments and suggestions are very welcome.

Thanks,
JC.

Jayachandran C (3):
  dt-bindings: Add documentation for Broadcom Vulcan
  arm64: defconfig: Add Broadcom Vulcan to defconfig
  arm64: cputype info for Broadcom Vulcan

Zi Shen Lim (1):
  arm64: Broadcom Vulcan support

 .../devicetree/bindings/arm/bcm/brcm,vulcan.txt    |   9 ++
 Documentation/devicetree/bindings/arm/cpus.txt     |   1 +
 arch/arm64/Kconfig.platforms                       |   5 +
 arch/arm64/boot/dts/broadcom/Makefile              |   1 +
 arch/arm64/boot/dts/broadcom/brcm-vulcan-eval.dts  |  33 +++++
 arch/arm64/boot/dts/broadcom/brcm-vulcan.dtsi      | 146 +++++++++++++++++++++
 arch/arm64/configs/defconfig                       |   1 +
 arch/arm64/include/asm/cputype.h                   |   2 +
 8 files changed, 198 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,vulcan.txt
 create mode 100644 arch/arm64/boot/dts/broadcom/brcm-vulcan-eval.dts
 create mode 100644 arch/arm64/boot/dts/broadcom/brcm-vulcan.dtsi

-- 
1.9.1

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[PATCH 1/4] arm64: Broadcom Vulcan support

[Jayachandran C]

From: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>

Add a configuration option and a device tree for Broadcom's Vulcan
ARM64 processor. brcm-vulcan.dtsi has the on-chip blocks like the
PCIe controller, GICv3 with ITS, PMU, system timer and pl011 UART.
brcm-vulcan-eval.dts has definitions for a basic evaluation board.
The firmware supports PSCI 0.2 for cpu wakeup.

Signed-off-by: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
[ updated and split dts - jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org ]
Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
---
 arch/arm64/Kconfig.platforms                      |   5 +
 arch/arm64/boot/dts/broadcom/Makefile             |   1 +
 arch/arm64/boot/dts/broadcom/brcm-vulcan-eval.dts |  33 +++++
 arch/arm64/boot/dts/broadcom/brcm-vulcan.dtsi     | 146 ++++++++++++++++++++++
 4 files changed, 185 insertions(+)
 create mode 100644 arch/arm64/boot/dts/broadcom/brcm-vulcan-eval.dts
 create mode 100644 arch/arm64/boot/dts/broadcom/brcm-vulcan.dtsi

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 21074f6..8718f18 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -131,6 +131,11 @@ config ARCH_VEXPRESS
 	  This enables support for the ARMv8 software model (Versatile
 	  Express).
 
+config ARCH_VULCAN
+	bool "Broadcom Vulcan SOC Family"
+	help
+	  This enables support for Broadcom Vulcan SoC Family
+
 config ARCH_XGENE
 	bool "AppliedMicro X-Gene SOC Family"
 	help
diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
index e21fe66..31219e5 100644
--- a/arch/arm64/boot/dts/broadcom/Makefile
+++ b/arch/arm64/boot/dts/broadcom/Makefile
@@ -1,4 +1,5 @@
 dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb
+dtb-$(CONFIG_ARCH_VULCAN) += brcm-vulcan-eval.dtb
 
 always		:= $(dtb-y)
 subdir-y	:= $(dts-dirs)
diff --git a/arch/arm64/boot/dts/broadcom/brcm-vulcan-eval.dts b/arch/arm64/boot/dts/broadcom/brcm-vulcan-eval.dts
new file mode 100644
index 0000000..2ca5562
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/brcm-vulcan-eval.dts
@@ -0,0 +1,33 @@
+/*
+ * dts file for Broadcom (BRCM) Vulcan Eval Platform
+ *
+ * Copyright (C) 2013-2016, Broadcom Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+/dts-v1/;
+
+#include "brcm-vulcan.dtsi"
+
+/ {
+	model = "Broadcom Vulcan Eval Platform";
+	compatible = "brcm,vulcan-eval", "brcm,vulcan";
+
+	memory {
+		device_type = "memory";
+		reg = <0x00000000 0x80000000 0x0 0x80000000>,  /* 2G @ 2G  */
+		      <0x00000008 0x80000000 0x0 0x80000000>;  /* 2G @ 34G */
+	};
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
diff --git a/arch/arm64/boot/dts/broadcom/brcm-vulcan.dtsi b/arch/arm64/boot/dts/broadcom/brcm-vulcan.dtsi
new file mode 100644
index 0000000..0f9f618
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/brcm-vulcan.dtsi
@@ -0,0 +1,146 @@
+/*
+ * dtsi file for Broadcom (BRCM) Vulcan processor
+ *
+ * Copyright (C) 2013-2016, Broadcom Corporation.
+ * Author: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/memreserve/ 0x80000000 0x00010000;
+
+/ {
+	model = "Broadcom Vulcan";
+	compatible = "brcm,vulcan";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	/* just 4 cpus now, 128 needed in full config */
+	cpus {
+		#address-cells = <0x2>;
+		#size-cells = <0x0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "brcm,vulcan", "arm,armv8";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+		};
+
+		cpu@1 {
+			device_type = "cpu";
+			compatible = "brcm,vulcan", "arm,armv8";
+			reg = <0x0 0x1>;
+			enable-method = "psci";
+		};
+
+		cpu@2 {
+			device_type = "cpu";
+			compatible = "brcm,vulcan", "arm,armv8";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+		};
+
+		cpu@3 {
+			device_type = "cpu";
+			compatible = "brcm,vulcan", "arm,armv8";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	gic: interrupt-controller@400080000 {
+		compatible = "arm,gic-v3";
+		#interrupt-cells = <3>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		interrupt-controller;
+		#redistributor-regions = <1>;
+		reg = <0x04 0x00080000 0x0 0x20000>,	/* GICD */
+		      <0x04 0x01000000 0x0 0x1000000>;	/* GICR */
+		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+
+		gicits: gic-its@40010000 {
+			compatible = "arm,gic-v3-its";
+			msi-controller;
+			reg = <0x04 0x00100000 0x0 0x20000>;	/* GIC ITS */
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
+	pmu {
+		compatible = "arm,armv8-pmuv3";
+		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; /* PMU overflow */
+	};
+
+	clk125mhz: uart_clk125mhz {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <125000000>;
+		clock-output-names = "clk125mhz";
+	};
+
+	pci {
+		compatible = "pci-host-ecam-generic";
+		device_type = "pci";
+		#interrupt-cells = <1>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+
+		/* ECAM at 0x3000_0000 - 0x4000_0000 */
+		reg = <0x0 0x30000000  0x0 0x10000000>;
+		reg-names = "PCI ECAM";
+
+			  /* IO 0x4000_0000 - 0x4001_0000 */
+		ranges = <0x01000000 0 0x40000000 0 0x40000000 0 0x00010000
+			  /* MEM 0x4800_0000 - 0x5000_0000 */
+			  0x02000000 0 0x48000000 0 0x48000000 0 0x08000000
+			  /* MEM64 pref 0x6_0000_0000 - 0x7_0000_0000 */
+			  0x43000000 6 0x00000000 6 0x00000000 1 0x00000000>;
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map =
+		      /* addr  pin  ic   icaddr  icintr */
+			<0 0 0  1  &gic   0 0    GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
+			 0 0 0  2  &gic   0 0    GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
+			 0 0 0  3  &gic   0 0    GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
+			 0 0 0  4  &gic   0 0    GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+		msi-parent = <&gicits>;
+		dma-coherent;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		uart0: serial@402020000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x04 0x02020000 0x0 0x1000>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk125mhz>;
+			clock-names = "apb_pclk";
+		};
+	};
+
+};
-- 
1.9.1

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[PATCH 2/4] dt-bindings: Add documentation for Broadcom Vulcan

[Jayachandran C]

Update arm/cpus.txt to add brcm,vulcan CPU. Add documentation
for Broadcom vulcan boards in arm/bcm/brcm,vulcan.txt

Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
---
 Documentation/devicetree/bindings/arm/bcm/brcm,vulcan.txt | 9 +++++++++
 Documentation/devicetree/bindings/arm/cpus.txt            | 1 +
 2 files changed, 10 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,vulcan.txt

diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan.txt
new file mode 100644
index 0000000..dac9eb5
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan.txt
@@ -0,0 +1,9 @@
+Broadcom Vulcan device tree bindings
+------------------------------------
+
+Boards with Broadcom Vulcan shall have the following properties:
+
+Required root node property:
+
+Vulcan Evaluation Board
+compatible = "brcm,vulcan-eval", "brcm,vulcan";
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index ae9be07..bc43ad7 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -167,6 +167,7 @@ nodes to be present and contain the properties described below.
 			    "arm,cortex-r5"
 			    "arm,cortex-r7"
 			    "brcm,brahma-b15"
+			    "brcm,vulcan"
 			    "cavium,thunder"
 			    "faraday,fa526"
 			    "intel,sa110"
-- 
1.9.1

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[PATCH 3/4] arm64: defconfig: Add Broadcom Vulcan to defconfig

[Jayachandran C]

Enable Broadcom Vulcan support in arm64 default configuration. This will
build the device tree needed to boot on a Broadcom Vulcan board.

Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 86581f7..6c1b3a6 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -47,6 +47,7 @@ CONFIG_ARCH_SPRD=y
 CONFIG_ARCH_THUNDER=y
 CONFIG_ARCH_UNIPHIER=y
 CONFIG_ARCH_VEXPRESS=y
+CONFIG_ARCH_VULCAN=y
 CONFIG_ARCH_XGENE=y
 CONFIG_ARCH_ZYNQMP=y
 CONFIG_PCI=y
-- 
1.9.1

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[PATCH 4/4] arm64: cputype info for Broadcom Vulcan

[Jayachandran C]

Add Broadcom Vulcan implementor ID and part ID in cputype.h. This is
to document the values.

Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
---
 arch/arm64/include/asm/cputype.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 1a59493..3725d59 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -65,6 +65,7 @@
 #define ARM_CPU_IMP_ARM			0x41
 #define ARM_CPU_IMP_APM			0x50
 #define ARM_CPU_IMP_CAVIUM		0x43
+#define ARM_CPU_IMP_BRCM		0x42
 
 #define ARM_CPU_PART_AEM_V8		0xD0F
 #define ARM_CPU_PART_FOUNDATION		0xD00
@@ -74,6 +75,7 @@
 #define APM_CPU_PART_POTENZA		0x000
 
 #define CAVIUM_CPU_PART_THUNDERX	0x0A1
+#define BRCM_CPU_PART_VULCAN		0x516
 
 #ifndef __ASSEMBLY__
 
-- 
1.9.1

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Re: [PATCH 4/4] arm64: cputype info for Broadcom Vulcan

[Will Deacon]

On Sun, Feb 14, 2016 at 12:16:35AM +0530, Jayachandran C wrote:
> Add Broadcom Vulcan implementor ID and part ID in cputype.h. This is
> to document the values.
> 
> Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
> ---
>  arch/arm64/include/asm/cputype.h | 2 ++
>  1 file changed, 2 insertions(+)

Acked-by: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>

> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
> index 1a59493..3725d59 100644
> --- a/arch/arm64/include/asm/cputype.h
> +++ b/arch/arm64/include/asm/cputype.h
> @@ -65,6 +65,7 @@
>  #define ARM_CPU_IMP_ARM			0x41
>  #define ARM_CPU_IMP_APM			0x50
>  #define ARM_CPU_IMP_CAVIUM		0x43
> +#define ARM_CPU_IMP_BRCM		0x42
>  
>  #define ARM_CPU_PART_AEM_V8		0xD0F
>  #define ARM_CPU_PART_FOUNDATION		0xD00
> @@ -74,6 +75,7 @@
>  #define APM_CPU_PART_POTENZA		0x000
>  
>  #define CAVIUM_CPU_PART_THUNDERX	0x0A1
> +#define BRCM_CPU_PART_VULCAN		0x516
>  
>  #ifndef __ASSEMBLY__
>  
> -- 
> 1.9.1
> 
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Re: [PATCH 4/4] arm64: cputype info for Broadcom Vulcan

[Florian Fainelli]

On 15/02/16 02:12, Will Deacon wrote:
> On Sun, Feb 14, 2016 at 12:16:35AM +0530, Jayachandran C wrote:
>> Add Broadcom Vulcan implementor ID and part ID in cputype.h. This is
>> to document the values.
>>
>> Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
>> ---
>>  arch/arm64/include/asm/cputype.h | 2 ++
>>  1 file changed, 2 insertions(+)
> 
> Acked-by: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>

Would this be picked by Calatin, or should this be sent along with the
ARM/ARM64 SoC changes pull requests (just wondering?), thanks!
-- 
Florian
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Re: [PATCH 1/4] arm64: Broadcom Vulcan support

[Florian Fainelli]

On 13/02/16 10:46, Jayachandran C wrote:
> From: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
> 
> Add a configuration option and a device tree for Broadcom's Vulcan
> ARM64 processor. brcm-vulcan.dtsi has the on-chip blocks like the
> PCIe controller, GICv3 with ITS, PMU, system timer and pl011 UART.
> brcm-vulcan-eval.dts has definitions for a basic evaluation board.
> The firmware supports PSCI 0.2 for cpu wakeup.
> 
> Signed-off-by: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
> [ updated and split dts - jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org ]
> Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
> ---
>  arch/arm64/Kconfig.platforms                      |   5 +
>  arch/arm64/boot/dts/broadcom/Makefile             |   1 +
>  arch/arm64/boot/dts/broadcom/brcm-vulcan-eval.dts |  33 +++++
>  arch/arm64/boot/dts/broadcom/brcm-vulcan.dtsi     | 146 ++++++++++++++++++++++
>  4 files changed, 185 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/broadcom/brcm-vulcan-eval.dts
>  create mode 100644 arch/arm64/boot/dts/broadcom/brcm-vulcan.dtsi

You might want a MAINTAINERS entry too for these new files?

[snip]

> +++ b/arch/arm64/boot/dts/broadcom/brcm-vulcan-eval.dts
> @@ -0,0 +1,33 @@
> +/*
> + * dts file for Broadcom (BRCM) Vulcan Eval Platform
> + *
> + * Copyright (C) 2013-2016, Broadcom Corporation.

My little finger tells me we should be using a plain
Broadcom now and drop the Corporation in the license header.
-- 
Florian
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Re: [PATCH 4/4] arm64: cputype info for Broadcom Vulcan

[Zi Shen Lim]

On Sat, Feb 13, 2016 at 10:46 AM, Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> wrote:
>
> Add Broadcom Vulcan implementor ID and part ID in cputype.h. This is
> to document the values.
>
> Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
> ---
>  arch/arm64/include/asm/cputype.h | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
> index 1a59493..3725d59 100644
> --- a/arch/arm64/include/asm/cputype.h
> +++ b/arch/arm64/include/asm/cputype.h
> @@ -65,6 +65,7 @@
>  #define ARM_CPU_IMP_ARM                        0x41
>  #define ARM_CPU_IMP_APM                        0x50
>  #define ARM_CPU_IMP_CAVIUM             0x43
> +#define ARM_CPU_IMP_BRCM               0x42

It's probably not a big deal... guessing this list is chronologically
ordered and should remain so?

>
>  #define ARM_CPU_PART_AEM_V8            0xD0F
>  #define ARM_CPU_PART_FOUNDATION                0xD00
> @@ -74,6 +75,7 @@
>  #define APM_CPU_PART_POTENZA           0x000
>
>  #define CAVIUM_CPU_PART_THUNDERX       0x0A1
> +#define BRCM_CPU_PART_VULCAN           0x516
>
>  #ifndef __ASSEMBLY__
>
> --
> 1.9.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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Re: [PATCH 1/4] arm64: Broadcom Vulcan support

[Mark Rutland]

Hi,

On Sun, Feb 14, 2016 at 12:16:32AM +0530, Jayachandran C wrote:
> From: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>

> +	compatible = "brcm,vulcan-eval", "brcm,vulcan";

You use "brcm,vulcan" as the compatible string for both the platform and
the CPU nodes. You need different strings.

> +
> +	memory {
> +		device_type = "memory";
> +		reg = <0x00000000 0x80000000 0x0 0x80000000>,  /* 2G @ 2G  */
> +		      <0x00000008 0x80000000 0x0 0x80000000>;  /* 2G @ 34G */
> +	};

> +/memreserve/ 0x80000000 0x00010000;

What is this for?

> +
> +/ {
> +	model = "Broadcom Vulcan";
> +	compatible = "brcm,vulcan";

As above, it doesn't make sense to have the same compatible string for
both the platform as a whole and the CPU.

> +			device_type = "cpu";
> +			compatible = "brcm,vulcan", "arm,armv8";
> +			reg = <0x0 0x0>;
> +			enable-method = "psci";
> +		};

Thanks,
Mark.
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Re: [PATCH 2/4] dt-bindings: Add documentation for Broadcom Vulcan

[Mark Rutland]

On Sun, Feb 14, 2016 at 12:16:33AM +0530, Jayachandran C wrote:
> Update arm/cpus.txt to add brcm,vulcan CPU. Add documentation
> for Broadcom vulcan boards in arm/bcm/brcm,vulcan.txt
> 
> Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
> ---
>  Documentation/devicetree/bindings/arm/bcm/brcm,vulcan.txt | 9 +++++++++
>  Documentation/devicetree/bindings/arm/cpus.txt            | 1 +
>  2 files changed, 10 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,vulcan.txt
> 
> diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan.txt
> new file mode 100644
> index 0000000..dac9eb5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan.txt
> @@ -0,0 +1,9 @@
> +Broadcom Vulcan device tree bindings
> +------------------------------------
> +
> +Boards with Broadcom Vulcan shall have the following properties:
> +
> +Required root node property:
> +
> +Vulcan Evaluation Board
> +compatible = "brcm,vulcan-eval", "brcm,vulcan";

You can't use "brcm,vulcan" as both a board and CPU string.

Please come up with different strings.

Mark.

> diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> index ae9be07..bc43ad7 100644
> --- a/Documentation/devicetree/bindings/arm/cpus.txt
> +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> @@ -167,6 +167,7 @@ nodes to be present and contain the properties described below.
>  			    "arm,cortex-r5"
>  			    "arm,cortex-r7"
>  			    "brcm,brahma-b15"
> +			    "brcm,vulcan"
>  			    "cavium,thunder"
>  			    "faraday,fa526"
>  			    "intel,sa110"
> -- 
> 1.9.1
> 
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Re: [PATCH 4/4] arm64: cputype info for Broadcom Vulcan

[Catalin Marinas]

On Tue, Feb 16, 2016 at 05:16:04PM -0800, Florian Fainelli wrote:
> On 15/02/16 02:12, Will Deacon wrote:
> > On Sun, Feb 14, 2016 at 12:16:35AM +0530, Jayachandran C wrote:
> >> Add Broadcom Vulcan implementor ID and part ID in cputype.h. This is
> >> to document the values.
> >>
> >> Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
> >> ---
> >>  arch/arm64/include/asm/cputype.h | 2 ++
> >>  1 file changed, 2 insertions(+)
> > 
> > Acked-by: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
> 
> Would this be picked by Calatin, or should this be sent along with the
> ARM/ARM64 SoC changes pull requests (just wondering?), thanks!

It can go via the arm-soc tree together with the other patches. If you
need another ack:

Acked-by: Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>
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Re: [1/4] arm64: Broadcom Vulcan support

[Ray Jui]

+ bcm-kernel-feedback-list mailing list

On 2/13/2016 10:46 AM, Jayachandran C. wrote:
> From: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
>
> Add a configuration option and a device tree for Broadcom's Vulcan
> ARM64 processor. brcm-vulcan.dtsi has the on-chip blocks like the
> PCIe controller, GICv3 with ITS, PMU, system timer and pl011 UART.
> brcm-vulcan-eval.dts has definitions for a basic evaluation board.
> The firmware supports PSCI 0.2 for cpu wakeup.
>
> Signed-off-by: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
> [ updated and split dts - jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org ]
> Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
>
> ---
> arch/arm64/Kconfig.platforms                      |   5 +
>  arch/arm64/boot/dts/broadcom/Makefile             |   1 +
>  arch/arm64/boot/dts/broadcom/brcm-vulcan-eval.dts |  33 +++++
>  arch/arm64/boot/dts/broadcom/brcm-vulcan.dtsi     | 146 ++++++++++++++++++++++
>  4 files changed, 185 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/broadcom/brcm-vulcan-eval.dts
>  create mode 100644 arch/arm64/boot/dts/broadcom/brcm-vulcan.dtsi

Could you please name the files "vulcan.dtsi" and "vulcan-eval.dts" so 
it's consistent with the rest of files in the same directory?

Thanks,

Ray
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Re: [PATCH 1/4] arm64: Broadcom Vulcan support

[Jayachandran Chandrashekaran Nair]

On Wed, Feb 17, 2016 at 10:46 PM, Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> wrote:
> Hi,
>
> On Sun, Feb 14, 2016 at 12:16:32AM +0530, Jayachandran C wrote:
>> From: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
>
>> +     compatible = "brcm,vulcan-eval", "brcm,vulcan";
>
> You use "brcm,vulcan" as the compatible string for both the platform and
> the CPU nodes. You need different strings.
>
>> +
>> +     memory {
>> +             device_type = "memory";
>> +             reg = <0x00000000 0x80000000 0x0 0x80000000>,  /* 2G @ 2G  */
>> +                   <0x00000008 0x80000000 0x0 0x80000000>;  /* 2G @ 34G */
>> +     };
>
>> +/memreserve/ 0x80000000 0x00010000;
>
> What is this for?

This seems to left over from the time we were using spin. Will take
it out. Thanks.

>> +
>> +/ {
>> +     model = "Broadcom Vulcan";
>> +     compatible = "brcm,vulcan";
>
> As above, it doesn't make sense to have the same compatible string for
> both the platform as a whole and the CPU.

Will fix this in v2.

>> +                     device_type = "cpu";
>> +                     compatible = "brcm,vulcan", "arm,armv8";
>> +                     reg = <0x0 0x0>;
>> +                     enable-method = "psci";
>> +             };

Thanks for the review.

JC.
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Re: [1/4] arm64: Broadcom Vulcan support

[Florian Fainelli]

On 18/02/16 10:15, Ray Jui wrote:
> + bcm-kernel-feedback-list mailing list
> 
> On 2/13/2016 10:46 AM, Jayachandran C. wrote:
>> From: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
>>
>> Add a configuration option and a device tree for Broadcom's Vulcan
>> ARM64 processor. brcm-vulcan.dtsi has the on-chip blocks like the
>> PCIe controller, GICv3 with ITS, PMU, system timer and pl011 UART.
>> brcm-vulcan-eval.dts has definitions for a basic evaluation board.
>> The firmware supports PSCI 0.2 for cpu wakeup.
>>
>> Signed-off-by: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
>> [ updated and split dts - jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org ]
>> Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
>>
>> ---
>> arch/arm64/Kconfig.platforms                      |   5 +
>>  arch/arm64/boot/dts/broadcom/Makefile             |   1 +
>>  arch/arm64/boot/dts/broadcom/brcm-vulcan-eval.dts |  33 +++++
>>  arch/arm64/boot/dts/broadcom/brcm-vulcan.dtsi     | 146
>> ++++++++++++++++++++++
>>  4 files changed, 185 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/broadcom/brcm-vulcan-eval.dts
>>  create mode 100644 arch/arm64/boot/dts/broadcom/brcm-vulcan.dtsi
> 
> Could you please name the files "vulcan.dtsi" and "vulcan-eval.dts" so
> it's consistent with the rest of files in the same directory?

I would like to take these patches ASAP so I can include them in our
upcoming 4.6 pull requests, can you do a quick respin adressing Ray's
feedback and adding a MAINTAINERS file?

Thanks!
-- 
Florian
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