* [PATCH v1 1/4] clk: rockchip: add the new clock ids for RK3228 VOP
2016-02-24 10:05 [PATCH v1 0/4] Add clock ids for RK3228 HDMI/VOP modules Yakir Yang
@ 2016-02-24 10:08 ` Yakir Yang
2016-02-24 10:14 ` [PATCH v1 3/4] clk: rockchip: add the new clock ids for RK3228 HDMI Yakir Yang
` (3 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Yakir Yang @ 2016-02-24 10:08 UTC (permalink / raw)
To: Michael Turquette, Heiko Stuebner, Rob Herring
Cc: Stephen Boyd, Kumar Gala, Ian Campbell, Pawel Moll, Mark Rutland,
Jeffy Chen, devicetree, linux-clk, linux-kernel, linux-rockchip,
linux-arm-kernel, Yakir Yang
There are four clocks that vop module would need to operate:
DCLK_VOP, HCLK_VOP, SCLK_VOP, ACLK_VOP,
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
include/dt-bindings/clock/rk3228-cru.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h
index a78dd89..5656bf6 100644
--- a/include/dt-bindings/clock/rk3228-cru.h
+++ b/include/dt-bindings/clock/rk3228-cru.h
@@ -49,10 +49,15 @@
#define SCLK_SDMMC_SAMPLE 118
#define SCLK_SDIO_SAMPLE 119
#define SCLK_EMMC_SAMPLE 121
+#define SCLK_VOP 122
+
+/* dclk gates */
+#define DCLK_VOP 190
/* aclk gates */
#define ACLK_DMAC 194
#define ACLK_PERI 210
+#define ACLK_VOP 211
/* pclk gates */
#define PCLK_GPIO0 320
@@ -73,6 +78,7 @@
#define PCLK_PERI 363
/* hclk gates */
+#define HCLK_VOP 452
#define HCLK_NANDC 453
#define HCLK_SDMMC 456
#define HCLK_SDIO 457
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v1 3/4] clk: rockchip: add the new clock ids for RK3228 HDMI
2016-02-24 10:05 [PATCH v1 0/4] Add clock ids for RK3228 HDMI/VOP modules Yakir Yang
2016-02-24 10:08 ` [PATCH v1 1/4] clk: rockchip: add the new clock ids for RK3228 VOP Yakir Yang
@ 2016-02-24 10:14 ` Yakir Yang
2016-02-24 10:16 ` [PATCH v1 4/4] clk: rockchip: set the " Yakir Yang
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Yakir Yang @ 2016-02-24 10:14 UTC (permalink / raw)
To: Michael Turquette, Heiko Stuebner, Rob Herring
Cc: Stephen Boyd, Kumar Gala, Ian Campbell, Pawel Moll, Mark Rutland,
Jeffy Chen, devicetree, linux-clk, linux-kernel, linux-rockchip,
linux-arm-kernel, Yakir Yang
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
include/dt-bindings/clock/rk3228-cru.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h
index 5656bf6..fda9308 100644
--- a/include/dt-bindings/clock/rk3228-cru.h
+++ b/include/dt-bindings/clock/rk3228-cru.h
@@ -50,9 +50,11 @@
#define SCLK_SDIO_SAMPLE 119
#define SCLK_EMMC_SAMPLE 121
#define SCLK_VOP 122
+#define SCLK_HDMI_HDCP 123
/* dclk gates */
#define DCLK_VOP 190
+#define DCLK_HDMI_PHY 191
/* aclk gates */
#define ACLK_DMAC 194
@@ -76,6 +78,8 @@
#define PCLK_PWM 350
#define PCLK_TIMER 353
#define PCLK_PERI 363
+#define PCLK_HDMI_CTRL 364
+#define PCLK_HDMI_PHY 365
/* hclk gates */
#define HCLK_VOP 452
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v1 4/4] clk: rockchip: set the clock ids for RK3228 HDMI
2016-02-24 10:05 [PATCH v1 0/4] Add clock ids for RK3228 HDMI/VOP modules Yakir Yang
2016-02-24 10:08 ` [PATCH v1 1/4] clk: rockchip: add the new clock ids for RK3228 VOP Yakir Yang
2016-02-24 10:14 ` [PATCH v1 3/4] clk: rockchip: add the new clock ids for RK3228 HDMI Yakir Yang
@ 2016-02-24 10:16 ` Yakir Yang
2016-02-24 10:54 ` [PATCH v1 2/4] clk: rockchip: set the clock ids for RK3228 VOP Yakir Yang
2016-02-26 1:14 ` [PATCH v1 0/4] Add clock ids for RK3228 HDMI/VOP modules Heiko Stuebner
4 siblings, 0 replies; 7+ messages in thread
From: Yakir Yang @ 2016-02-24 10:16 UTC (permalink / raw)
To: Michael Turquette, Heiko Stuebner, Rob Herring
Cc: Stephen Boyd, Kumar Gala, Ian Campbell, Pawel Moll, Mark Rutland,
Jeffy Chen, devicetree, linux-clk, linux-kernel, linux-rockchip,
linux-arm-kernel, Yakir Yang
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3228.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c
index 8747b25..a8a6be2 100644
--- a/drivers/clk/rockchip/clk-rk3228.c
+++ b/drivers/clk/rockchip/clk-rk3228.c
@@ -285,7 +285,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
RK2928_CLKSEL_CON(23), 14, 2, MFLAGS, 8, 6, DFLAGS,
RK2928_CLKGATE_CON(3), 5, GFLAGS),
- GATE(0, "sclk_hdmi_hdcp", "xin24m", 0,
+ GATE(SCLK_HDMI_HDCP, "sclk_hdmi_hdcp", "xin24m", 0,
RK2928_CLKGATE_CON(3), 7, GFLAGS),
COMPOSITE(0, "sclk_hdmi_cec", mux_sclk_hdmi_cec_p, 0,
@@ -364,7 +364,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
RK2928_CLKGATE_CON(3), 1, GFLAGS),
MUX(0, "sclk_vop_src", mux_sclk_vop_src_p, 0,
RK2928_CLKSEL_CON(27), 0, 1, MFLAGS),
- DIV(0, "dclk_hdmiphy", "sclk_vop_src", 0,
+ DIV(DCLK_HDMI_PHY, "dclk_hdmiphy", "sclk_vop_src", 0,
RK2928_CLKSEL_CON(29), 0, 3, DFLAGS),
DIV(0, "sclk_vop_pre", "sclk_vop_src", 0,
RK2928_CLKSEL_CON(27), 8, 8, DFLAGS),
@@ -517,7 +517,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
GATE(0, "hclk_vop_noc", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 13, GFLAGS),
GATE(0, "hclk_vio_h2p", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(14), 7, GFLAGS),
GATE(0, "hclk_hdcp_mmu", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(14), 12, GFLAGS),
- GATE(0, "pclk_hdmi_ctrl", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(14), 6, GFLAGS),
+ GATE(PCLK_HDMI_CTRL, "pclk_hdmi_ctrl", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(14), 6, GFLAGS),
GATE(0, "pclk_vio_h2p", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(14), 8, GFLAGS),
GATE(0, "pclk_hdcp", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(14), 11, GFLAGS),
@@ -590,7 +590,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
GATE(0, "pclk_ddrphy", "pclk_phy_pre", 0, RK2928_CLKGATE_CON(10), 3, GFLAGS),
GATE(0, "pclk_acodecphy", "pclk_phy_pre", 0, RK2928_CLKGATE_CON(10), 5, GFLAGS),
- GATE(0, "pclk_hdmiphy", "pclk_phy_pre", 0, RK2928_CLKGATE_CON(10), 7, GFLAGS),
+ GATE(PCLK_HDMI_PHY, "pclk_hdmiphy", "pclk_phy_pre", 0, RK2928_CLKGATE_CON(10), 7, GFLAGS),
GATE(0, "pclk_vdacphy", "pclk_phy_pre", 0, RK2928_CLKGATE_CON(10), 8, GFLAGS),
GATE(0, "pclk_phy_noc", "pclk_phy_pre", 0, RK2928_CLKGATE_CON(10), 9, GFLAGS),
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v1 2/4] clk: rockchip: set the clock ids for RK3228 VOP
2016-02-24 10:05 [PATCH v1 0/4] Add clock ids for RK3228 HDMI/VOP modules Yakir Yang
` (2 preceding siblings ...)
2016-02-24 10:16 ` [PATCH v1 4/4] clk: rockchip: set the " Yakir Yang
@ 2016-02-24 10:54 ` Yakir Yang
2016-02-26 1:14 ` [PATCH v1 0/4] Add clock ids for RK3228 HDMI/VOP modules Heiko Stuebner
4 siblings, 0 replies; 7+ messages in thread
From: Yakir Yang @ 2016-02-24 10:54 UTC (permalink / raw)
To: Michael Turquette, Heiko Stuebner, Rob Herring
Cc: Stephen Boyd, Kumar Gala, Ian Campbell, Pawel Moll, Mark Rutland,
Jeffy Chen, devicetree, linux-clk, linux-kernel, linux-rockchip,
linux-arm-kernel, Yakir Yang
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3228.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c
index 981a502..8747b25 100644
--- a/drivers/clk/rockchip/clk-rk3228.c
+++ b/drivers/clk/rockchip/clk-rk3228.c
@@ -368,7 +368,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
RK2928_CLKSEL_CON(29), 0, 3, DFLAGS),
DIV(0, "sclk_vop_pre", "sclk_vop_src", 0,
RK2928_CLKSEL_CON(27), 8, 8, DFLAGS),
- MUX(0, "dclk_vop", mux_dclk_vop_p, 0,
+ MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, 0,
RK2928_CLKSEL_CON(27), 1, 1, MFLAGS),
COMPOSITE(0, "i2s0_src", mux_pll_src_2plls_p, 0,
@@ -503,7 +503,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
GATE(0, "aclk_iep", "aclk_iep_pre", 0, RK2928_CLKGATE_CON(13), 2, GFLAGS),
GATE(0, "aclk_iep_noc", "aclk_iep_pre", 0, RK2928_CLKGATE_CON(13), 9, GFLAGS),
- GATE(0, "aclk_vop", "aclk_vop_pre", 0, RK2928_CLKGATE_CON(13), 5, GFLAGS),
+ GATE(ACLK_VOP, "aclk_vop", "aclk_vop_pre", 0, RK2928_CLKGATE_CON(13), 5, GFLAGS),
GATE(0, "aclk_vop_noc", "aclk_vop_pre", 0, RK2928_CLKGATE_CON(13), 12, GFLAGS),
GATE(0, "aclk_hdcp", "aclk_hdcp_pre", 0, RK2928_CLKGATE_CON(14), 10, GFLAGS),
@@ -511,7 +511,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
GATE(0, "hclk_rga", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 1, GFLAGS),
GATE(0, "hclk_iep", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 3, GFLAGS),
- GATE(0, "hclk_vop", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 6, GFLAGS),
+ GATE(HCLK_VOP, "hclk_vop", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 6, GFLAGS),
GATE(0, "hclk_vio_ahb_arbi", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 7, GFLAGS),
GATE(0, "hclk_vio_noc", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 8, GFLAGS),
GATE(0, "hclk_vop_noc", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 13, GFLAGS),
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v1 0/4] Add clock ids for RK3228 HDMI/VOP modules
2016-02-24 10:05 [PATCH v1 0/4] Add clock ids for RK3228 HDMI/VOP modules Yakir Yang
` (3 preceding siblings ...)
2016-02-24 10:54 ` [PATCH v1 2/4] clk: rockchip: set the clock ids for RK3228 VOP Yakir Yang
@ 2016-02-26 1:14 ` Heiko Stuebner
2016-02-26 6:24 ` Yakir Yang
4 siblings, 1 reply; 7+ messages in thread
From: Heiko Stuebner @ 2016-02-26 1:14 UTC (permalink / raw)
To: Yakir Yang
Cc: Michael Turquette, Rob Herring, Stephen Boyd, Kumar Gala,
Ian Campbell, Pawel Moll, Mark Rutland, Jeffy Chen, devicetree,
linux-clk, linux-kernel, linux-rockchip, linux-arm-kernel
Am Mittwoch, 24. Februar 2016, 18:05:03 schrieb Yakir Yang:
> Add clocks ids for RK3228 HDMI/VOP modules which driver already have been
> posted.
>
> RK3228 HDMI driver: https://patchwork.kernel.org/patch/7974671
> RK3228 VOP driver: https://patchwork.kernel.org/patch/7952591
>
> Yakir Yang (4):
> clk: rockchip: add the new clock ids for RK3228 VOP
> clk: rockchip: set the clock ids for RK3228 VOP
> clk: rockchip: add the new clock ids for RK3228 HDMI
> clk: rockchip: set the clock ids for RK3228 HDMI
applied all 4 to my clk-branch
Thanks
Heiko
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v1 0/4] Add clock ids for RK3228 HDMI/VOP modules
2016-02-26 1:14 ` [PATCH v1 0/4] Add clock ids for RK3228 HDMI/VOP modules Heiko Stuebner
@ 2016-02-26 6:24 ` Yakir Yang
0 siblings, 0 replies; 7+ messages in thread
From: Yakir Yang @ 2016-02-26 6:24 UTC (permalink / raw)
To: Heiko Stuebner
Cc: Michael Turquette, Rob Herring, Stephen Boyd, Kumar Gala,
Ian Campbell, Pawel Moll, Mark Rutland, Jeffy Chen, devicetree,
linux-clk, linux-kernel, linux-rockchip, linux-arm-kernel
On 02/26/2016 09:14 AM, Heiko Stuebner wrote:
> Am Mittwoch, 24. Februar 2016, 18:05:03 schrieb Yakir Yang:
>> Add clocks ids for RK3228 HDMI/VOP modules which driver already have been
>> posted.
>>
>> RK3228 HDMI driver: https://patchwork.kernel.org/patch/7974671
>> RK3228 VOP driver: https://patchwork.kernel.org/patch/7952591
>>
>> Yakir Yang (4):
>> clk: rockchip: add the new clock ids for RK3228 VOP
>> clk: rockchip: set the clock ids for RK3228 VOP
>> clk: rockchip: add the new clock ids for RK3228 HDMI
>> clk: rockchip: set the clock ids for RK3228 HDMI
> applied all 4 to my clk-branch
Thanks
- Yakir
>
> Thanks
> Heiko
>
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread