[RESPIN 1/6] dt-bindings: EXYNOS: Add exynos-srom device tree binding

[RESPIN 1/6] dt-bindings: EXYNOS: Add exynos-srom device tree binding

[Pankaj Dubey]

This patch adds exynos-srom binding information for SROM Controller
driver on Exynos SoCs.

CC: Rob Herring <robh+dt@kernel.org>
CC: Mark Rutland <mark.rutland@arm.com>
CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
CC: devicetree@vger.kernel.org
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
 .../devicetree/bindings/memory-controllers/exynos-srom.txt   | 12 ++++++++++++
 1 file changed, 12 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt

diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
new file mode 100644
index 0000000..33886d5
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
@@ -0,0 +1,12 @@
+SAMSUNG Exynos SoCs SROM Controller driver.
+
+Required properties:
+- compatible : Should contain "samsung,exynos-srom".
+
+- reg: offset and length of the register set
+
+Example:
+	sromc@12570000 {
+		compatible = "samsung,exynos-srom";
+		reg = <0x12570000 0x10>;
+	};
-- 
2.4.5

Re: [RESPIN 1/6] dt-bindings: EXYNOS: Add exynos-srom device tree binding

[Rob Herring]

On Thu, Feb 25, 2016 at 02:03:37PM +0530, Pankaj Dubey wrote:
> This patch adds exynos-srom binding information for SROM Controller
> driver on Exynos SoCs.
> 
> CC: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> CC: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
> CC: Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>
> CC: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Signed-off-by: Pankaj Dubey <pankaj.dubey-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> Reviewed-by: Krzysztof Kozlowski <k.kozlowski-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> Signed-off-by: Kukjin Kim <kgene-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Signed-off-by: Krzysztof Kozlowski <k.kozlowski-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> ---
>  .../devicetree/bindings/memory-controllers/exynos-srom.txt   | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
> new file mode 100644
> index 0000000..33886d5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
> @@ -0,0 +1,12 @@
> +SAMSUNG Exynos SoCs SROM Controller driver.
> +
> +Required properties:
> +- compatible : Should contain "samsung,exynos-srom".

There should be SoC specific compatible strings in addition to this.

> +
> +- reg: offset and length of the register set
> +
> +Example:
> +	sromc@12570000 {

This should be memory-controller@...

> +		compatible = "samsung,exynos-srom";
> +		reg = <0x12570000 0x10>;

The next patch changes the size to 0x14?

BTW, you could just combine both patches. I guess you didn't to maintain 
authorship?

Rob
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [RESPIN 1/6] dt-bindings: EXYNOS: Add exynos-srom device tree binding

[pankaj.dubey]

Hi,

On Wednesday 02 March 2016 11:23 PM, Rob Herring wrote:
> On Thu, Feb 25, 2016 at 02:03:37PM +0530, Pankaj Dubey wrote:
>> This patch adds exynos-srom binding information for SROM Controller
>> driver on Exynos SoCs.
>>
>> CC: Rob Herring <robh+dt@kernel.org>
>> CC: Mark Rutland <mark.rutland@arm.com>
>> CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
>> CC: devicetree@vger.kernel.org
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>> Signed-off-by: Kukjin Kim <kgene@kernel.org>
>> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>> ---
>>  .../devicetree/bindings/memory-controllers/exynos-srom.txt   | 12 ++++++++++++
>>  1 file changed, 12 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>>
>> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>> new file mode 100644
>> index 0000000..33886d5
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>> @@ -0,0 +1,12 @@
>> +SAMSUNG Exynos SoCs SROM Controller driver.
>> +
>> +Required properties:
>> +- compatible : Should contain "samsung,exynos-srom".
> 
> There should be SoC specific compatible strings in addition to this.
> 

I do not understood need to additional need to SoC specific compatible,
as of now all SoCs having SROM can work with exynos specific common
compatible. Will you see any issues in this?

>> +
>> +- reg: offset and length of the register set
>> +
>> +Example:
>> +	sromc@12570000 {
> 
> This should be memory-controller@...
> 
>> +		compatible = "samsung,exynos-srom";
>> +		reg = <0x12570000 0x10>;
> 
> The next patch changes the size to 0x14?
> 
> BTW, you could just combine both patches. I guess you didn't to maintain 
> authorship?

OK. Will squash both of these patches, unless Pavel do not any objections.

Thanks,
Pankaj Dubey
> 
> Rob
> 
> 

RE: [RESPIN 1/6] dt-bindings: EXYNOS: Add exynos-srom device tree binding

[Pavel Fedin]

 Hello!

>> BTW, you could just combine both patches. I guess you didn't to 
>> maintain authorship?

>OK. Will squash both of these patches, unless Pavel do not any objections.

 I don't.

Kind regards.

Re: [RESPIN 1/6] dt-bindings: EXYNOS: Add exynos-srom device tree binding

[Krzysztof Kozlowski]

On 05.03.2016 13:42, pankaj.dubey wrote:
> Hi,
> 
> On Wednesday 02 March 2016 11:23 PM, Rob Herring wrote:
>> On Thu, Feb 25, 2016 at 02:03:37PM +0530, Pankaj Dubey wrote:
>>> This patch adds exynos-srom binding information for SROM Controller
>>> driver on Exynos SoCs.
>>>
>>> CC: Rob Herring <robh+dt@kernel.org>
>>> CC: Mark Rutland <mark.rutland@arm.com>
>>> CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
>>> CC: devicetree@vger.kernel.org
>>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>>> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>>> Signed-off-by: Kukjin Kim <kgene@kernel.org>
>>> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>>> ---
>>>  .../devicetree/bindings/memory-controllers/exynos-srom.txt   | 12 ++++++++++++
>>>  1 file changed, 12 insertions(+)
>>>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>>> new file mode 100644
>>> index 0000000..33886d5
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>>> @@ -0,0 +1,12 @@
>>> +SAMSUNG Exynos SoCs SROM Controller driver.
>>> +
>>> +Required properties:
>>> +- compatible : Should contain "samsung,exynos-srom".
>>
>> There should be SoC specific compatible strings in addition to this.
>>
> 
> I do not understood need to additional need to SoC specific compatible,
> as of now all SoCs having SROM can work with exynos specific common
> compatible. Will you see any issues in this?

Dear Rob, Pankaj,

I would like to proceed with this patchset. I guess your comment here
was about to change the compatible from generic exynos-like to a model
specific. How about this:
- compatible : Should contain "samsung,exynos4210-srom".

Is this okay?

(the oldest chip mentioning SROM controller as separate block is Exynos4210)


Best regards,
Krzysztof

Re: [RESPIN 1/6] dt-bindings: EXYNOS: Add exynos-srom device tree binding

[pankaj.dubey]

Hi

On Wednesday 02 March 2016 11:23 PM, Rob Herring wrote:
> On Thu, Feb 25, 2016 at 02:03:37PM +0530, Pankaj Dubey wrote:
>> This patch adds exynos-srom binding information for SROM Controller
>> driver on Exynos SoCs.
>>
>> CC: Rob Herring <robh+dt@kernel.org>
>> CC: Mark Rutland <mark.rutland@arm.com>
>> CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
>> CC: devicetree@vger.kernel.org
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>> Signed-off-by: Kukjin Kim <kgene@kernel.org>
>> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>> ---
>>  .../devicetree/bindings/memory-controllers/exynos-srom.txt   | 12 ++++++++++++
>>  1 file changed, 12 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>>
>> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>> new file mode 100644
>> index 0000000..33886d5
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>> @@ -0,0 +1,12 @@
>> +SAMSUNG Exynos SoCs SROM Controller driver.
>> +
>> +Required properties:
>> +- compatible : Should contain "samsung,exynos-srom".
> 
> There should be SoC specific compatible strings in addition to this.
> 

I do not understood need of additional SoC specific compatible here. As
of now all SoCs having SROM can work with exynos specific common
compatible. Do you see any issues if we do not have SoC specific
compatible here.

>> +
>> +- reg: offset and length of the register set
>> +
>> +Example:
>> +	sromc@12570000 {
> 
> This should be memory-controller@...
> 
>> +		compatible = "samsung,exynos-srom";
>> +		reg = <0x12570000 0x10>;
> 
> The next patch changes the size to 0x14?
> 
> BTW, you could just combine both patches. I guess you didn't to maintain 
> authorship?
> 

OK. Will squash both of these patches, unless Pavel do not have any
objections to this.

Thanks,
Pankaj Dubey

> Rob
> 
> 

Re: [RESPIN 1/6] dt-bindings: EXYNOS: Add exynos-srom device tree binding

[pankaj.dubey]

On Saturday 05 March 2016 11:48 AM, pankaj.dubey wrote:
> Hi
> 
> On Wednesday 02 March 2016 11:23 PM, Rob Herring wrote:
>> On Thu, Feb 25, 2016 at 02:03:37PM +0530, Pankaj Dubey wrote:
>>> This patch adds exynos-srom binding information for SROM Controller
>>> driver on Exynos SoCs.
>>>
>>> CC: Rob Herring <robh+dt@kernel.org>
>>> CC: Mark Rutland <mark.rutland@arm.com>
>>> CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
>>> CC: devicetree@vger.kernel.org
>>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>>> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>>> Signed-off-by: Kukjin Kim <kgene@kernel.org>
>>> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>>> ---
>>>  .../devicetree/bindings/memory-controllers/exynos-srom.txt   | 12 ++++++++++++
>>>  1 file changed, 12 insertions(+)
>>>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>>> new file mode 100644
>>> index 0000000..33886d5
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>>> @@ -0,0 +1,12 @@
>>> +SAMSUNG Exynos SoCs SROM Controller driver.
>>> +
>>> +Required properties:
>>> +- compatible : Should contain "samsung,exynos-srom".
>>
>> There should be SoC specific compatible strings in addition to this.
>>
> 
> I do not understood need of additional SoC specific compatible here. As
> of now all SoCs having SROM can work with exynos specific common
> compatible. Do you see any issues if we do not have SoC specific
> compatible here.
> 

Gentle ping.

Thanks,
Pankaj Dubey

[RESPIN 5/6] dt-bindings: EXYNOS: Describe SROMc configuration

[Pankaj Dubey]

From: Pavel Fedin <p.fedin@samsung.com>

Add documentation for new subnode properties, allowing bank configuration.
Based on u-boot implementation, but heavily reworked.

Also, fix size of SROMc mapping in the example.

CC: devicetree@vger.kernel.org
Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
 .../bindings/memory-controllers/exynos-srom.txt    | 73 +++++++++++++++++++++-
 1 file changed, 71 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
index 33886d5..e5c18df 100644
--- a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
@@ -5,8 +5,77 @@ Required properties:
 
 - reg: offset and length of the register set
 
-Example:
+Optional properties:
+The SROM controller can be used to attach external peripherals. In this case
+extra properties, describing the bus behind it, should be specified as below:
+
+- #address-cells: Must be set to 2 to allow device address translation.
+		  Address is specified as (bank#, offset).
+
+- #size-cells: Must be set to 1 to allow device size passing
+
+- ranges: Must be set up to reflect the memory layout with four integer values
+	  per bank:
+		<bank-number> 0 <parent address of bank> <size>
+
+Sub-nodes:
+The actual device nodes should be added as subnodes to the SROMc node. These
+subnodes, except regular device specification, should contain the following
+properties, describing configuration of the relevant SROM bank:
+
+Required properties:
+- reg: bank number, base address (relative to start of the bank) and size of
+       the memory mapped for the device. Note that base address will be
+       typically 0 as this is the start of the bank.
+
+- samsung,srom-timing : array of 6 integers, specifying bank timings in the
+                        following order: Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs.
+                        Each value is specified in cycles and has the following
+                        meaning and valid range:
+                        Tacp : Page mode access cycle at Page mode (0 - 15)
+                        Tcah : Address holding time after CSn (0 - 15)
+                        Tcoh : Chip selection hold on OEn (0 - 15)
+                        Tacc : Access cycle (0 - 31, the actual time is N + 1)
+                        Tcos : Chip selection set-up before OEn (0 - 15)
+                        Tacs : Address set-up before CSn (0 - 15)
+
+Optional properties:
+- reg-io-width : data width in bytes (1 or 2). If omitted, default of 1 is used.
+
+- samsung,srom-page-mode : page mode configuration for the bank:
+			   0 - normal (one data)
+			   1 - four data
+			   If omitted, default of 0 is used.
+
+Example: basic definition, no banks are configured
+	sromc@12570000 {
+		compatible = "samsung,exynos-srom";
+		reg = <0x12570000 0x14>;
+	};
+
+Example: SROMc with SMSC911x ethernet chip on bank 3
 	sromc@12570000 {
+		#address-cells = <2>;
+		#size-cells = <1>;
+		ranges = <0 0 0x04000000 0x20000   // Bank0
+			  1 0 0x05000000 0x20000   // Bank1
+			  2 0 0x06000000 0x20000   // Bank2
+			  3 0 0x07000000 0x20000>; // Bank3
+
 		compatible = "samsung,exynos-srom";
-		reg = <0x12570000 0x10>;
+		reg = <0x12570000 0x14>;
+
+		ethernet@3,0 {
+			compatible = "smsc,lan9115";
+			reg = <3 0 0x10000>;	   // Bank 3, offset = 0
+			phy-mode = "mii";
+			interrupt-parent = <&gpx0>;
+			interrupts = <5 8>;
+			reg-io-width = <2>;
+			smsc,irq-push-pull;
+			smsc,force-internal-phy;
+
+			samsung,srom-page-mode = <1>;
+			samsung,srom-timing = <9 12 1 9 1 1>;
+		};
 	};
-- 
2.4.5

Re: [RESPIN 5/6] dt-bindings: EXYNOS: Describe SROMc configuration

[Rob Herring]

On Thu, Feb 25, 2016 at 02:03:41PM +0530, Pankaj Dubey wrote:
> From: Pavel Fedin <p.fedin-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> 
> Add documentation for new subnode properties, allowing bank configuration.
> Based on u-boot implementation, but heavily reworked.
> 
> Also, fix size of SROMc mapping in the example.

Fix it in the previous patch.

> CC: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Signed-off-by: Pavel Fedin <p.fedin-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> Signed-off-by: Pankaj Dubey <pankaj.dubey-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> Reviewed-by: Krzysztof Kozlowski <k.kozlowski-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Signed-off-by: Krzysztof Kozlowski <k.kozlowski-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> ---
>  .../bindings/memory-controllers/exynos-srom.txt    | 73 +++++++++++++++++++++-
>  1 file changed, 71 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
> index 33886d5..e5c18df 100644
> --- a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
> @@ -5,8 +5,77 @@ Required properties:
>  
>  - reg: offset and length of the register set
>  
> -Example:
> +Optional properties:
> +The SROM controller can be used to attach external peripherals. In this case
> +extra properties, describing the bus behind it, should be specified as below:
> +
> +- #address-cells: Must be set to 2 to allow device address translation.
> +		  Address is specified as (bank#, offset).
> +
> +- #size-cells: Must be set to 1 to allow device size passing
> +
> +- ranges: Must be set up to reflect the memory layout with four integer values
> +	  per bank:
> +		<bank-number> 0 <parent address of bank> <size>
> +
> +Sub-nodes:
> +The actual device nodes should be added as subnodes to the SROMc node. These
> +subnodes, except regular device specification, should contain the following

s/except/in addition to/

> +properties, describing configuration of the relevant SROM bank:
> +
> +Required properties:
> +- reg: bank number, base address (relative to start of the bank) and size of
> +       the memory mapped for the device. Note that base address will be
> +       typically 0 as this is the start of the bank.
> +
> +- samsung,srom-timing : array of 6 integers, specifying bank timings in the
> +                        following order: Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs.
> +                        Each value is specified in cycles and has the following
> +                        meaning and valid range:
> +                        Tacp : Page mode access cycle at Page mode (0 - 15)
> +                        Tcah : Address holding time after CSn (0 - 15)
> +                        Tcoh : Chip selection hold on OEn (0 - 15)
> +                        Tacc : Access cycle (0 - 31, the actual time is N + 1)
> +                        Tcos : Chip selection set-up before OEn (0 - 15)
> +                        Tacs : Address set-up before CSn (0 - 15)
> +
> +Optional properties:
> +- reg-io-width : data width in bytes (1 or 2). If omitted, default of 1 is used.
> +
> +- samsung,srom-page-mode : page mode configuration for the bank:
> +			   0 - normal (one data)
> +			   1 - four data
> +			   If omitted, default of 0 is used.

Make this a bool instead.

Rob
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [RESPIN 5/6] dt-bindings: EXYNOS: Describe SROMc configuration

[pankaj.dubey]

Hi,

On Wednesday 02 March 2016 11:27 PM, Rob Herring wrote:
> On Thu, Feb 25, 2016 at 02:03:41PM +0530, Pankaj Dubey wrote:
>> From: Pavel Fedin <p.fedin@samsung.com>
>>
>> Add documentation for new subnode properties, allowing bank configuration.
>> Based on u-boot implementation, but heavily reworked.
>>
>> Also, fix size of SROMc mapping in the example.
> 
> Fix it in the previous patch.

OK.

> 
>> CC: devicetree@vger.kernel.org
>> Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>> Acked-by: Rob Herring <robh@kernel.org>
>> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>> ---
>>  .../bindings/memory-controllers/exynos-srom.txt    | 73 +++++++++++++++++++++-
>>  1 file changed, 71 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>> index 33886d5..e5c18df 100644
>> --- a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>> @@ -5,8 +5,77 @@ Required properties:
>>  
>>  - reg: offset and length of the register set
>>  
>> -Example:
>> +Optional properties:
>> +The SROM controller can be used to attach external peripherals. In this case
>> +extra properties, describing the bus behind it, should be specified as below:
>> +
>> +- #address-cells: Must be set to 2 to allow device address translation.
>> +		  Address is specified as (bank#, offset).
>> +
>> +- #size-cells: Must be set to 1 to allow device size passing
>> +
>> +- ranges: Must be set up to reflect the memory layout with four integer values
>> +	  per bank:
>> +		<bank-number> 0 <parent address of bank> <size>
>> +
>> +Sub-nodes:
>> +The actual device nodes should be added as subnodes to the SROMc node. These
>> +subnodes, except regular device specification, should contain the following
> 
> s/except/in addition to/
> 

OK. Will update this description as suggested.

>> +properties, describing configuration of the relevant SROM bank:
>> +
>> +Required properties:
>> +- reg: bank number, base address (relative to start of the bank) and size of
>> +       the memory mapped for the device. Note that base address will be
>> +       typically 0 as this is the start of the bank.
>> +
>> +- samsung,srom-timing : array of 6 integers, specifying bank timings in the
>> +                        following order: Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs.
>> +                        Each value is specified in cycles and has the following
>> +                        meaning and valid range:
>> +                        Tacp : Page mode access cycle at Page mode (0 - 15)
>> +                        Tcah : Address holding time after CSn (0 - 15)
>> +                        Tcoh : Chip selection hold on OEn (0 - 15)
>> +                        Tacc : Access cycle (0 - 31, the actual time is N + 1)
>> +                        Tcos : Chip selection set-up before OEn (0 - 15)
>> +                        Tacs : Address set-up before CSn (0 - 15)
>> +
>> +Optional properties:
>> +- reg-io-width : data width in bytes (1 or 2). If omitted, default of 1 is used.
>> +
>> +- samsung,srom-page-mode : page mode configuration for the bank:
>> +			   0 - normal (one data)
>> +			   1 - four data
>> +			   If omitted, default of 0 is used.
> 
> Make this a bool instead.
> 

I do not have strong objections to change this, but I can see doing so
will increase two or three lines in driver, as such this property is not
being used as bool in driver.


Sorry to say this but I do not understand why these comments are coming
now? Whereas you had given your "Acked-by" to the same patch when it was
posted previously by Pavel and we were keeping this driver under
"drivers/soc/samsung". Is it just because we are moving to
"drivers/memory" and it needs to be consistent with other memory
controller drivers?

Thanks,
Pankaj Dubey
> Rob
> 
>