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From: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: "Grygorii Strashko"
	<grygorii.strashko-l0cyMroinI0@public.gmane.org>,
	"Thomas Gleixner" <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>,
	"Jason Cooper" <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
	"Marc Zyngier" <marc.zyngier-5wv7dgnIgG8@public.gmane.org>,
	"Benoît Cousson"
	<bcousson-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
	"Tony Lindgren" <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>,
	"Rob Herring" <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	"Pawel Moll" <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
	"Mark Rutland" <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	"Ian Campbell"
	<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
	"Kumar Gala" <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	"Stephen Warren"
	<swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>,
	"Thierry Reding"
	<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Kevin Hilman <khilman-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Geert Uytterhoeven
	<geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org>,
	Lars-Peter Clausen <lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org>,
	Linus Walleij
	<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 08/15] genirq: Add runtime power management support for IRQ chips
Date: Fri, 18 Mar 2016 14:40:34 +0000	[thread overview]
Message-ID: <56EC1362.2000005@nvidia.com> (raw)
In-Reply-To: <56EC0F7D.8050106-l0cyMroinI0@public.gmane.org>


On 18/03/16 14:23, Grygorii Strashko wrote:
> On 03/18/2016 02:27 PM, Jon Hunter wrote:
>>
>> On 18/03/16 11:11, Grygorii Strashko wrote:
>>> Hi Jon,
>>>
>>> On 03/17/2016 04:19 PM, Jon Hunter wrote:
>>>> Some IRQ chips may be located in a power domain outside of the CPU
>>>> subsystem and hence will require device specific runtime power
>>>> management. In order to support such IRQ chips, add a pointer for a
>>>> device structure to the irq_chip structure, and if this pointer is
>>>> populated by the IRQ chip driver and CONFIG_PM is selected in the kernel
>>>> configuration, then the pm_runtime_get/put APIs for this chip will be
>>>> called when an IRQ is requested/freed, respectively.
>>>>
>>>> When entering system suspend and each interrupt is disabled if there is
>>>> no wake-up set for that interrupt. For an IRQ chip that utilises runtime
>>>> power management, print a warning message for each active interrupt that
>>>> has no wake-up set because these interrupts may be unnecessarily keeping
>>>> the IRQ chip enabled during system suspend.
>>>>
>>>> Signed-off-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>>>> ---
>>>>    include/linux/irq.h    |  5 +++++
>>>>    kernel/irq/chip.c      | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++
>>>>    kernel/irq/internals.h |  1 +
>>>>    kernel/irq/manage.c    | 14 +++++++++++---
>>>>    kernel/irq/pm.c        |  3 +++
>>>>    5 files changed, 72 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/include/linux/irq.h b/include/linux/irq.h
>>>> index c4de62348ff2..82f36390048d 100644
>>>> --- a/include/linux/irq.h
>>>> +++ b/include/linux/irq.h
>>>> @@ -315,6 +315,7 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
>>>>    /**
>>>>     * struct irq_chip - hardware interrupt chip descriptor
>>>>     *
>>>> + * @parent:		pointer to associated device
>>>>     * @name:		name for /proc/interrupts
>>>>     * @irq_startup:	start up the interrupt (defaults to ->enable if NULL)
>>>>     * @irq_shutdown:	shut down the interrupt (defaults to ->disable if NULL)
>>>> @@ -354,6 +355,7 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
>>>>     * @flags:		chip specific flags
>>>>     */
>>>
>>> [..]
>>>
>>>>    
>>>> diff --git a/kernel/irq/pm.c b/kernel/irq/pm.c
>>>> index cea1de0161f1..ab436119084f 100644
>>>> --- a/kernel/irq/pm.c
>>>> +++ b/kernel/irq/pm.c
>>>> @@ -83,6 +83,9 @@ static bool suspend_device_irq(struct irq_desc *desc)
>>>>    		 * suspend_device_irqs().
>>>>    		 */
>>>>    		return true;
>>>> +	} else if (!irq_chip_pm_suspended(&desc->irq_data)) {
>>>> +		pr_warn("irq %d has no wakeup set and has not been freed!\n",
>>>> +			desc->irq_data.irq);
>>>
>>> Sry. But I did not get this part of the patch :(
>>>
>>> static bool suspend_device_irq(struct irq_desc *desc)
>>> {
>>> 	if (!desc->action || irq_desc_is_chained(desc) ||
>>> 	    desc->no_suspend_depth) {
>>> 		pr_err("skip irq %d\n", irq_desc_get_irq(desc));
>>> 		return false;
>>> 	}
>>>
>>> 	if (irqd_is_wakeup_set(&desc->irq_data)) {
>>> 		irqd_set(&desc->irq_data, IRQD_WAKEUP_ARMED);
>>> 		/*
>>> 		 * We return true here to force the caller to issue
>>> 		 * synchronize_irq(). We need to make sure that the
>>> 		 * IRQD_WAKEUP_ARMED is visible before we return from
>>> 		 * suspend_device_irqs().
>>> 		 */
>>> 		pr_err("wakeup irq %d\n", irq_desc_get_irq(desc));
>>> 		return true;
>>> 	}
>>>
>>> ^^^^ Here you've added a warning
>>
>> Yes, to warn if the IRQ is enabled but not a wake-up source ...
>>
>> 	if (irqd_is_wakeup_set(&desc->irq_data)) {
>> 		...
>> 	} else if (!irq_chip_pm_suspended(&desc->irq_data)) {
>> 		...
>> 	}
>>
>>> 	desc->istate |= IRQS_SUSPENDED;
>>> 	__disable_irq(desc);
>>>
>>> ^^^^ Here non wakeup IRQs will be disabled
>>
>> Yes, but this will not turn off the irqchip. It is legitimate for the
>> chip to be enabled during suspend if an IRQ is enabled as a wakeup.
>>
>> The purpose of the warning is to report any IRQs that are enabled at
>> this point, but NOT wake-up sources. These could be unintentionally be
>> keeping the chip active when it does not need to be.
>>
>>> 	pr_err("%s __disable_irq irq %d\n", irq_desc_get_chip(desc)->name, irq_desc_get_irq(desc));
>>>
>>> 	/*
>>> 	 * Hardware which has no wakeup source configuration facility
>>> 	 * requires that the non wakeup interrupts are masked at the
>>> 	 * chip level. The chip implementation indicates that with
>>> 	 * IRQCHIP_MASK_ON_SUSPEND.
>>> 	 */
>>> 	if (irq_desc_get_chip(desc)->flags & IRQCHIP_MASK_ON_SUSPEND) {
>>> 		mask_irq(desc);
>>> 		pr_err("%s mask_irq irq %d\n", irq_desc_get_chip(desc)->name, irq_desc_get_irq(desc));
>>> 	}
>>>
>>> 	return true;
>>> }
>>>
>>> As result, there should be a ton of warnings if one IRQ (for example in GPIO irqchip)
>>> is wakeup source, but all other are not.
>>
>> No there should not be. Remember this is an else-if and ONLY if an IRQ
>> is not a wake-up source AND enabled will you get a warning.
> 
> Sorry, but I don't see the "AND enabled" check any where in this file and
> disabled irqs can be wakeup source - they shouldn't be masked.
> But I'll stop commenting until i reproduce it.
> 
> Or do you mean free? 

Yes, to be correct I mean not a wake-up source AND not freed (requested).

>>
>>> Also I'd like to note that:
>>> - it is not expected that any IRQs have to be freed on enter Suspend
>>
>> True, but surely they should have a wake-up enabled then? If not you are
>> wasting power unnecessarily.
>>
>> I realise that this is different to how interrupts for irqchips work
>> today, but when we discussed this before, the only way to ensure that we
>> can power-down an irqchip with PM is if all IRQs are freed [0]. So it is
>> a slightly different mindset for irqchips with PM, that may be we
>> shouldn't hold references to IRQs forever if we are not using them.
>>
>>> - Primary interrupt controller is expected to be suspended from syscore_suspend()
>>> - not Primary interrupt controllers may be Suspended from:
>>>    -- dpm_suspend() or dpm_suspend_late() - usual case for external interrupt controllers
>>>    GPIO expanders (I2C, SPI ..)
>>>    -- dpm_suspend_noirq() - usual case for SoC peripherals like OMAP GPIO
>>> 	dpm_suspend_noirq
>>> 	|- suspend_device_irqs()
>>> 	|- device_suspend_noirq() [1] <-- OMAP GPIO do suspend here.
>>>    -- as always, some arches/maches may require hacks in platform code.
>>>    
>>> So, In my opinion, suspend has to be handled by each irqchip driver separately,
>>> most probably at suspend_noirq level [1], because only  irqchip driver
>>> now sees a full picture and knows if it can suspend or not, and when, and how.
>>> (may require to use pm_runtime_force_suspend/resume()).
>>
>> I understand what you are saying, but at least in my mind if would be
>> better if the clients of the IRQ chips using PM freed their interrupts
>> when entering suspend. Quite possibly I am overlooking a use-case here
>> or overhead of doing this, 
> 
> ok. seems you do mean "free".
> 
> oh :( That will require updating of all drivers (and if it will be taken into account that
> wakeup can be configured from sysfs + devm_ - it will be painful).

Will it? I know that there are a few gpio chips that have some hacked
ways to get around the PM issue, but I wonder how many drivers this
really impacts. What sysfs entries are you referring too?

>> but it would avoid every irqchip having to
>> handle this themselves and having a custom handler.
> 
> irqchip like TI OMAP GPIO will need custom handling any way even if it's not expected
> to be Powered off during Suspend or deep CPUIdle states, simply because its state
> in suspend is unknown - PM state managed automatically (and depends on many factors)
> and wakeup can be handled by special HW in case if GPIO bank was really switched off.
> 
>>> I propose do not touch common/generic suspend code now. Any common code can be always
>>> refactored later once there will be real drivers updated to use irqchip RPM
>>> and which will support Suspend.
>>
>> If this is strongly opposed, I would concede to making this a pr_debug()
>> as I think it could be useful.
> 
> Probably yes, because most of the drivers now and IRQ PM core are not ready
> for this approach. 

May be this calls for a new flag to not WARN if non-wakeup IRQs are not
freed when entering suspend.

Cheers
Jon

  parent reply	other threads:[~2016-03-18 14:40 UTC|newest]

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-17 14:19 [PATCH 00/15] Add support for Tegra210 AGIC Jon Hunter
2016-03-17 14:19 ` [PATCH 01/15] ARM: tegra: Correct interrupt type for ARM TWD Jon Hunter
     [not found]   ` <1458224359-32665-2-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-01 23:25     ` Kevin Hilman
2016-04-05 14:04     ` Thierry Reding
2016-03-17 14:19 ` [PATCH 02/15] ARM: OMAP: " Jon Hunter
     [not found]   ` <1458224359-32665-3-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-18 15:41     ` Grygorii Strashko
     [not found]       ` <56EC2191.2060800-l0cyMroinI0@public.gmane.org>
2016-03-29 14:02         ` Jon Hunter
     [not found]           ` <56FA8AEA.3000208-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-30 21:23             ` Tony Lindgren
     [not found] ` <1458224359-32665-1-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-17 14:19   ` [PATCH 03/15] irqchip/gic: Don't unnecessarily write the IRQ configuration Jon Hunter
     [not found]     ` <1458224359-32665-4-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-09 10:50       ` Marc Zyngier
2016-03-17 14:19   ` [PATCH 04/15] irqchip/gic: WARN if setting the interrupt type fails Jon Hunter
     [not found]     ` <1458224359-32665-5-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-17 14:51       ` Thomas Gleixner
2016-03-17 15:04         ` Jon Hunter
2016-03-17 15:18           ` Jason Cooper
     [not found]             ` <20160317151800.GH1184-fahSIxCzskDQ+YiMSub0/l6hYfS7NtTn@public.gmane.org>
2016-03-17 16:20               ` Jon Hunter
2016-03-18  9:20                 ` Geert Uytterhoeven
     [not found]                   ` <CAMuHMdU8PDUVZ8=S04fkahez1dh7JHjpj2-3w+Vfz05X=ZFMUQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-03-18  9:54                     ` Jon Hunter
     [not found]                       ` <56EBD061.6030502-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-18 10:22                         ` Geert Uytterhoeven
     [not found]           ` <56EAC761.1040801-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-09 10:58             ` Marc Zyngier
2016-04-11 15:31               ` Jon Hunter
     [not found]                 ` <570BC34A.5030806-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-11 15:39                   ` Marc Zyngier
     [not found]                     ` <570BC528.9050601-5wv7dgnIgG8@public.gmane.org>
2016-04-12  8:50                       ` Jon Hunter
2016-04-12 10:14                         ` Marc Zyngier
2016-03-17 14:19   ` [PATCH 07/15] irqdomain: Don't set type when mapping an IRQ Jon Hunter
     [not found]     ` <1458224359-32665-8-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-17 14:55       ` Thomas Gleixner
2016-03-17 15:06         ` Jon Hunter
2016-03-17 18:19       ` Jon Hunter
2016-03-17 14:19   ` [PATCH 08/15] genirq: Add runtime power management support for IRQ chips Jon Hunter
     [not found]     ` <1458224359-32665-9-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-17 15:02       ` Marc Zyngier
2016-03-17 15:13         ` Jon Hunter
2016-03-17 15:28           ` Marc Zyngier
     [not found]             ` <56EACD21.20309-5wv7dgnIgG8@public.gmane.org>
2016-03-22 11:46               ` Linus Walleij
2016-03-18 11:11       ` Grygorii Strashko
     [not found]         ` <56EBE244.6070400-l0cyMroinI0@public.gmane.org>
2016-03-18 12:27           ` Jon Hunter
2016-03-18 14:23             ` Grygorii Strashko
     [not found]               ` <56EC0F7D.8050106-l0cyMroinI0@public.gmane.org>
2016-03-18 14:40                 ` Jon Hunter [this message]
     [not found]                   ` <56EC1362.2000005-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-18 14:56                     ` Jon Hunter
     [not found]                       ` <56EC1719.5020408-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-18 17:52                         ` Grygorii Strashko
2016-03-21 10:09                           ` Jon Hunter
2016-03-17 15:02     ` Thomas Gleixner
2016-03-17 15:46       ` Jon Hunter
2016-03-17 14:19 ` [PATCH 05/15] irqchip: Mask the non-type/sense bits when translating an IRQ Jon Hunter
     [not found]   ` <1458224359-32665-6-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-09 11:03     ` Marc Zyngier
     [not found]       ` <20160409120333.3982c53b-5wv7dgnIgG8@public.gmane.org>
2016-04-19 14:14         ` Jon Hunter
     [not found]           ` <57163D2F.5020005-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-19 14:23             ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 06/15] irqdomain: Ensure type settings match for an existing mapping Jon Hunter
     [not found]   ` <1458224359-32665-7-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-17 18:18     ` Jon Hunter
2016-03-18 10:03       ` Grygorii Strashko
     [not found]         ` <56EBD272.1040404-l0cyMroinI0@public.gmane.org>
2016-03-18 10:33           ` Jon Hunter
2016-03-17 14:19 ` [PATCH 09/15] irqchip/gic: Don't initialise chip if mapping IO space fails Jon Hunter
     [not found]   ` <1458224359-32665-10-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-09 11:09     ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 10/15] irqchip/gic: Remove static irq_chip definition for eoimode1 Jon Hunter
     [not found]   ` <1458224359-32665-11-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-22 11:49     ` Linus Walleij
2016-04-09 11:38   ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 11/15] irqchip/gic: Return an error if GIC initialisation fails Jon Hunter
     [not found]   ` <1458224359-32665-12-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-09 11:43     ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 12/15] irqchip/gic: Pass GIC pointer to save/restore functions Jon Hunter
2016-04-09 11:52   ` Marc Zyngier
2016-03-17 14:19 ` [PATCH 13/15] irqchip/gic: Prepare for adding platform driver Jon Hunter
     [not found]   ` <1458224359-32665-14-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-29 13:04     ` Geert Uytterhoeven
     [not found]       ` <CAMuHMdVwZgsPNdkWooLHg5H9_Mmv_mKa=zh9T4K-mfjPUEk4CQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-03-29 13:59         ` Jon Hunter
2016-03-17 14:19 ` [PATCH 14/15] dt-bindings: arm-gic: Drop 'clock-names' from binding document Jon Hunter
     [not found]   ` <1458224359-32665-15-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-17 20:14     ` Rob Herring
2016-03-18  8:37       ` Jon Hunter
     [not found]         ` <56EBBE38.6070303-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12  8:54           ` Jon Hunter
2016-03-18  9:13     ` Geert Uytterhoeven
     [not found]       ` <CAMuHMdV0QiWR0bML44zhAx+MStmQhQWKd=b_TMKnEdu_hw_ReA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-03-18 10:13         ` Jon Hunter
     [not found]           ` <56EBD4E5.1060002-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-18 10:52             ` Geert Uytterhoeven
     [not found]               ` <CAMuHMdWXqS9cru74Ckr47gFVTf2MkmjZUtMt4MeXW_1V7x+KHw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-03-18 10:56                 ` Jon Hunter
     [not found]                   ` <56EBDEFA.30102-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-18 12:05                     ` Geert Uytterhoeven
     [not found]                       ` <CAMuHMdUkGiX6YWzbRVJaJ4BNskE8PUXq-7Zob40f=CEZyjtJiA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-03-18 12:42                         ` Jon Hunter
2016-03-18 12:47                       ` Grygorii Strashko
     [not found]                         ` <56EBF8E0.8020700-l0cyMroinI0@public.gmane.org>
2016-03-18 13:02                           ` Geert Uytterhoeven
2016-03-18 18:36                             ` Grygorii Strashko
2016-03-17 14:19 ` [PATCH 15/15] irqchip/gic: Add support for tegra AGIC interrupt controller Jon Hunter

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