* [BUG] build error due to AGILEX_NAND_X_CLK
@ 2020-08-19 3:22 Chunfeng Yun
2020-08-19 16:30 ` Dinh Nguyen
0 siblings, 1 reply; 2+ messages in thread
From: Chunfeng Yun @ 2020-08-19 3:22 UTC (permalink / raw)
To: Dinh Nguyen; +Cc: linux-arm-kernel, linux-mediatek, devicetree
Hi Dinh,
There is build error for arm64:
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:313.15-16 syntax error
FATAL ERROR: Unable to parse input tree
it's introduced by patch:
commit d4ae4dd346cd49302d157b129ead2f60d3a82534
Author: Dinh Nguyen <dinguyen@kernel.org>
Date: Tue Jun 30 13:44:37 2020 -0500
arm64: dts: agilex: add nand clocks
Add the clock properties for the NAND dts node.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index e300330..ac1b242 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -309,6 +309,10 @@
<0xffb80000 0x1000>;
reg-names = "nand_data", "denali_reg";
interrupts = <0 97 4>;
+ clocks = <&clkmgr AGILEX_NAND_CLK>,
+ <&clkmgr AGILEX_NAND_X_CLK>,
+ <&clkmgr AGILEX_NAND_ECC_CLK>;
+ clock-names = "nand", "nand_x", "ecc";
resets = <&rst NAND_RESET>, <&rst
NAND_OCP_RESET>;
status = "disabled";
};
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2020-08-19 3:22 [BUG] build error due to AGILEX_NAND_X_CLK Chunfeng Yun
2020-08-19 16:30 ` Dinh Nguyen
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