[PATCH 0/3] clk: meson: sm1: add earcrx clocks

[PATCH 0/3] clk: meson: sm1: add earcrx clocks

[Jerome Brunet]

This patchset adds the eARC-Rx clocks on sm1 SoCs.

This pushes the maximum register of the axg-audio controller up
again so a SoC parameter is inserted to handle that correctly.

Jerome Brunet (3):
  dt-bindings: clock: axg-audio: add earcrx clock ids
  clk: meson: axg-audio: setup regmap max_register based on the SoC
  clk: meson: axg-audio: add sm1 earcrx clocks

 drivers/clk/meson/axg-audio.c              | 38 ++++++++++++++++++++--
 drivers/clk/meson/axg-audio.h              |  2 ++
 include/dt-bindings/clock/axg-audio-clkc.h |  7 ++++
 3 files changed, 45 insertions(+), 2 deletions(-)

-- 
2.43.0

[PATCH 1/3] dt-bindings: clock: axg-audio: add earcrx clock ids

[Jerome Brunet]

Add clock IDs for the eARC Rx device found on sm1 SoCs

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 include/dt-bindings/clock/axg-audio-clkc.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/include/dt-bindings/clock/axg-audio-clkc.h b/include/dt-bindings/clock/axg-audio-clkc.h
index 08c82c22fa5f..607f23b83fa7 100644
--- a/include/dt-bindings/clock/axg-audio-clkc.h
+++ b/include/dt-bindings/clock/axg-audio-clkc.h
@@ -155,5 +155,12 @@
 #define AUD_CLKID_SYSCLK_B_DIV		175
 #define AUD_CLKID_SYSCLK_A_EN		176
 #define AUD_CLKID_SYSCLK_B_EN		177
+#define AUD_CLKID_EARCRX		178
+#define AUD_CLKID_EARCRX_CMDC_SEL	179
+#define AUD_CLKID_EARCRX_CMDC_DIV	180
+#define AUD_CLKID_EARCRX_CMDC		181
+#define AUD_CLKID_EARCRX_DMAC_SEL	182
+#define AUD_CLKID_EARCRX_DMAC_DIV	183
+#define AUD_CLKID_EARCRX_DMAC		184
 
 #endif /* __AXG_AUDIO_CLKC_BINDINGS_H */
-- 
2.43.0

[PATCH 2/3] clk: meson: axg-audio: setup regmap max_register based on the SoC

[Jerome Brunet]

The register region of axg-audio tends to grow with the addition of
new supported SoC. Mapping slightly more has not been causing problem
so far but it is not viable to continue like this long term.

Setup the max register based on what is necessary on the related SoC.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 drivers/clk/meson/axg-audio.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c
index e03a5bf899c0..2426f3dbb7a2 100644
--- a/drivers/clk/meson/axg-audio.c
+++ b/drivers/clk/meson/axg-audio.c
@@ -1726,11 +1726,10 @@ static const struct reset_control_ops axg_audio_rstc_ops = {
 	.status = axg_audio_reset_status,
 };
 
-static const struct regmap_config axg_audio_regmap_cfg = {
+static struct regmap_config axg_audio_regmap_cfg = {
 	.reg_bits	= 32,
 	.val_bits	= 32,
 	.reg_stride	= 4,
-	.max_register	= AUDIO_CLK_SPDIFOUT_B_CTRL,
 };
 
 struct audioclk_data {
@@ -1739,6 +1738,7 @@ struct audioclk_data {
 	struct meson_clk_hw_data hw_clks;
 	unsigned int reset_offset;
 	unsigned int reset_num;
+	unsigned int max_register;
 };
 
 static int axg_audio_clkc_probe(struct platform_device *pdev)
@@ -1760,6 +1760,7 @@ static int axg_audio_clkc_probe(struct platform_device *pdev)
 	if (IS_ERR(regs))
 		return PTR_ERR(regs);
 
+	axg_audio_regmap_cfg.max_register = data->max_register;
 	map = devm_regmap_init_mmio(dev, regs, &axg_audio_regmap_cfg);
 	if (IS_ERR(map)) {
 		dev_err(dev, "failed to init regmap: %ld\n", PTR_ERR(map));
@@ -1828,6 +1829,7 @@ static const struct audioclk_data axg_audioclk_data = {
 		.hws = axg_audio_hw_clks,
 		.num = ARRAY_SIZE(axg_audio_hw_clks),
 	},
+	.max_register = AUDIO_CLK_PDMIN_CTRL1,
 };
 
 static const struct audioclk_data g12a_audioclk_data = {
@@ -1839,6 +1841,7 @@ static const struct audioclk_data g12a_audioclk_data = {
 	},
 	.reset_offset = AUDIO_SW_RESET,
 	.reset_num = 26,
+	.max_register = AUDIO_CLK_SPDIFOUT_B_CTRL,
 };
 
 static const struct audioclk_data sm1_audioclk_data = {
@@ -1850,6 +1853,7 @@ static const struct audioclk_data sm1_audioclk_data = {
 	},
 	.reset_offset = AUDIO_SM1_SW_RESET0,
 	.reset_num = 39,
+	.max_register = AUDIO_CLK_SPDIFOUT_B_CTRL,
 };
 
 static const struct of_device_id clkc_match_table[] = {
-- 
2.43.0

[PATCH 3/3] clk: meson: axg-audio: add sm1 earcrx clocks

[Jerome Brunet]

Add CMDC, DMAC and peripheral clocks for the eARC RX device found on the
sm1 SoC family

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 drivers/clk/meson/axg-audio.c | 32 +++++++++++++++++++++++++++++++-
 drivers/clk/meson/axg-audio.h |  2 ++
 2 files changed, 33 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c
index 2426f3dbb7a2..06dc1e1f45e5 100644
--- a/drivers/clk/meson/axg-audio.c
+++ b/drivers/clk/meson/axg-audio.c
@@ -753,6 +753,9 @@ static struct clk_regmap toddr_d =
 	AUD_PCLK_GATE(toddr_d, AUDIO_CLK_GATE_EN1, 1);
 static struct clk_regmap loopback_b =
 	AUD_PCLK_GATE(loopback_b, AUDIO_CLK_GATE_EN1, 2);
+static struct clk_regmap earcrx =
+	AUD_PCLK_GATE(earcrx, AUDIO_CLK_GATE_EN1, 6);
+
 
 static struct clk_regmap sm1_mst_a_mclk_sel =
 	AUD_MST_MCLK_MUX(mst_a_mclk, AUDIO_SM1_MCLK_A_CTRL);
@@ -766,6 +769,10 @@ static struct clk_regmap sm1_mst_e_mclk_sel =
 	AUD_MST_MCLK_MUX(mst_e_mclk, AUDIO_SM1_MCLK_E_CTRL);
 static struct clk_regmap sm1_mst_f_mclk_sel =
 	AUD_MST_MCLK_MUX(mst_f_mclk, AUDIO_SM1_MCLK_F_CTRL);
+static struct clk_regmap sm1_earcrx_cmdc_clk_sel =
+	AUD_MST_MCLK_MUX(earcrx_cmdc_clk, AUDIO_EARCRX_CMDC_CLK_CTRL);
+static struct clk_regmap sm1_earcrx_dmac_clk_sel =
+	AUD_MST_MCLK_MUX(earcrx_dmac_clk, AUDIO_EARCRX_DMAC_CLK_CTRL);
 
 static struct clk_regmap sm1_mst_a_mclk_div =
 	AUD_MST_MCLK_DIV(mst_a_mclk, AUDIO_SM1_MCLK_A_CTRL);
@@ -779,6 +786,11 @@ static struct clk_regmap sm1_mst_e_mclk_div =
 	AUD_MST_MCLK_DIV(mst_e_mclk, AUDIO_SM1_MCLK_E_CTRL);
 static struct clk_regmap sm1_mst_f_mclk_div =
 	AUD_MST_MCLK_DIV(mst_f_mclk, AUDIO_SM1_MCLK_F_CTRL);
+static struct clk_regmap sm1_earcrx_cmdc_clk_div =
+	AUD_MST_MCLK_DIV(earcrx_cmdc_clk, AUDIO_EARCRX_CMDC_CLK_CTRL);
+static struct clk_regmap sm1_earcrx_dmac_clk_div =
+	AUD_MST_MCLK_DIV(earcrx_dmac_clk, AUDIO_EARCRX_DMAC_CLK_CTRL);
+
 
 static struct clk_regmap sm1_mst_a_mclk =
 	AUD_MST_MCLK_GATE(mst_a_mclk, AUDIO_SM1_MCLK_A_CTRL);
@@ -792,6 +804,10 @@ static struct clk_regmap sm1_mst_e_mclk =
 	AUD_MST_MCLK_GATE(mst_e_mclk, AUDIO_SM1_MCLK_E_CTRL);
 static struct clk_regmap sm1_mst_f_mclk =
 	AUD_MST_MCLK_GATE(mst_f_mclk, AUDIO_SM1_MCLK_F_CTRL);
+static struct clk_regmap sm1_earcrx_cmdc_clk =
+	AUD_MST_MCLK_GATE(earcrx_cmdc_clk, AUDIO_EARCRX_CMDC_CLK_CTRL);
+static struct clk_regmap sm1_earcrx_dmac_clk =
+	AUD_MST_MCLK_GATE(earcrx_dmac_clk, AUDIO_EARCRX_DMAC_CLK_CTRL);
 
 static struct clk_regmap sm1_tdm_mclk_pad_0 = AUD_TDM_PAD_CTRL(
 	tdm_mclk_pad_0, AUDIO_SM1_MST_PAD_CTRL0, 0, mclk_pad_ctrl_parent_data);
@@ -1232,6 +1248,13 @@ static struct clk_hw *sm1_audio_hw_clks[] = {
 	[AUD_CLKID_SYSCLK_A_EN]		= &sm1_sysclk_a_en.hw,
 	[AUD_CLKID_SYSCLK_B_DIV]	= &sm1_sysclk_b_div.hw,
 	[AUD_CLKID_SYSCLK_B_EN]		= &sm1_sysclk_b_en.hw,
+	[AUD_CLKID_EARCRX]		= &earcrx.hw,
+	[AUD_CLKID_EARCRX_CMDC_SEL]	= &sm1_earcrx_cmdc_clk_sel.hw,
+	[AUD_CLKID_EARCRX_CMDC_DIV]	= &sm1_earcrx_cmdc_clk_div.hw,
+	[AUD_CLKID_EARCRX_CMDC]		= &sm1_earcrx_cmdc_clk.hw,
+	[AUD_CLKID_EARCRX_DMAC_SEL]	= &sm1_earcrx_dmac_clk_sel.hw,
+	[AUD_CLKID_EARCRX_DMAC_DIV]	= &sm1_earcrx_dmac_clk_div.hw,
+	[AUD_CLKID_EARCRX_DMAC]		= &sm1_earcrx_dmac_clk.hw,
 };
 
 
@@ -1646,6 +1669,13 @@ static struct clk_regmap *const sm1_clk_regmaps[] = {
 	&sm1_sysclk_a_en,
 	&sm1_sysclk_b_div,
 	&sm1_sysclk_b_en,
+	&earcrx,
+	&sm1_earcrx_cmdc_clk_sel,
+	&sm1_earcrx_cmdc_clk_div,
+	&sm1_earcrx_cmdc_clk,
+	&sm1_earcrx_dmac_clk_sel,
+	&sm1_earcrx_dmac_clk_div,
+	&sm1_earcrx_dmac_clk,
 };
 
 struct axg_audio_reset_data {
@@ -1853,7 +1883,7 @@ static const struct audioclk_data sm1_audioclk_data = {
 	},
 	.reset_offset = AUDIO_SM1_SW_RESET0,
 	.reset_num = 39,
-	.max_register = AUDIO_CLK_SPDIFOUT_B_CTRL,
+	.max_register = AUDIO_EARCRX_DMAC_CLK_CTRL,
 };
 
 static const struct of_device_id clkc_match_table[] = {
diff --git a/drivers/clk/meson/axg-audio.h b/drivers/clk/meson/axg-audio.h
index 01a3da19933e..9e7765b630c9 100644
--- a/drivers/clk/meson/axg-audio.h
+++ b/drivers/clk/meson/axg-audio.h
@@ -64,5 +64,7 @@
 #define AUDIO_SM1_SW_RESET1	0x02C
 #define AUDIO_CLK81_CTRL	0x030
 #define AUDIO_CLK81_EN		0x034
+#define AUDIO_EARCRX_CMDC_CLK_CTRL	0x0D0
+#define AUDIO_EARCRX_DMAC_CLK_CTRL	0x0D4
 
 #endif /*__AXG_AUDIO_CLKC_H */
-- 
2.43.0

Re: [PATCH 2/3] clk: meson: axg-audio: setup regmap max_register based on the SoC

[Neil Armstrong]

On 19/07/2024 11:39, Jerome Brunet wrote:
> The register region of axg-audio tends to grow with the addition of
> new supported SoC. Mapping slightly more has not been causing problem
> so far but it is not viable to continue like this long term.
> 
> Setup the max register based on what is necessary on the related SoC.
> 
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
>   drivers/clk/meson/axg-audio.c | 8 ++++++--
>   1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c
> index e03a5bf899c0..2426f3dbb7a2 100644
> --- a/drivers/clk/meson/axg-audio.c
> +++ b/drivers/clk/meson/axg-audio.c
> @@ -1726,11 +1726,10 @@ static const struct reset_control_ops axg_audio_rstc_ops = {
>   	.status = axg_audio_reset_status,
>   };
>   
> -static const struct regmap_config axg_audio_regmap_cfg = {
> +static struct regmap_config axg_audio_regmap_cfg = {
>   	.reg_bits	= 32,
>   	.val_bits	= 32,
>   	.reg_stride	= 4,
> -	.max_register	= AUDIO_CLK_SPDIFOUT_B_CTRL,
>   };
>   
>   struct audioclk_data {
> @@ -1739,6 +1738,7 @@ struct audioclk_data {
>   	struct meson_clk_hw_data hw_clks;
>   	unsigned int reset_offset;
>   	unsigned int reset_num;
> +	unsigned int max_register;
>   };
>   
>   static int axg_audio_clkc_probe(struct platform_device *pdev)
> @@ -1760,6 +1760,7 @@ static int axg_audio_clkc_probe(struct platform_device *pdev)
>   	if (IS_ERR(regs))
>   		return PTR_ERR(regs);
>   
> +	axg_audio_regmap_cfg.max_register = data->max_register;
>   	map = devm_regmap_init_mmio(dev, regs, &axg_audio_regmap_cfg);
>   	if (IS_ERR(map)) {
>   		dev_err(dev, "failed to init regmap: %ld\n", PTR_ERR(map));
> @@ -1828,6 +1829,7 @@ static const struct audioclk_data axg_audioclk_data = {
>   		.hws = axg_audio_hw_clks,
>   		.num = ARRAY_SIZE(axg_audio_hw_clks),
>   	},
> +	.max_register = AUDIO_CLK_PDMIN_CTRL1,
>   };
>   
>   static const struct audioclk_data g12a_audioclk_data = {
> @@ -1839,6 +1841,7 @@ static const struct audioclk_data g12a_audioclk_data = {
>   	},
>   	.reset_offset = AUDIO_SW_RESET,
>   	.reset_num = 26,
> +	.max_register = AUDIO_CLK_SPDIFOUT_B_CTRL,
>   };
>   
>   static const struct audioclk_data sm1_audioclk_data = {
> @@ -1850,6 +1853,7 @@ static const struct audioclk_data sm1_audioclk_data = {
>   	},
>   	.reset_offset = AUDIO_SM1_SW_RESET0,
>   	.reset_num = 39,
> +	.max_register = AUDIO_CLK_SPDIFOUT_B_CTRL,
>   };
>   
>   static const struct of_device_id clkc_match_table[] = {

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

Re: [PATCH 3/3] clk: meson: axg-audio: add sm1 earcrx clocks

[Neil Armstrong]

On 19/07/2024 11:39, Jerome Brunet wrote:
> Add CMDC, DMAC and peripheral clocks for the eARC RX device found on the
> sm1 SoC family
> 
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
>   drivers/clk/meson/axg-audio.c | 32 +++++++++++++++++++++++++++++++-
>   drivers/clk/meson/axg-audio.h |  2 ++
>   2 files changed, 33 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c
> index 2426f3dbb7a2..06dc1e1f45e5 100644
> --- a/drivers/clk/meson/axg-audio.c
> +++ b/drivers/clk/meson/axg-audio.c
> @@ -753,6 +753,9 @@ static struct clk_regmap toddr_d =
>   	AUD_PCLK_GATE(toddr_d, AUDIO_CLK_GATE_EN1, 1);
>   static struct clk_regmap loopback_b =
>   	AUD_PCLK_GATE(loopback_b, AUDIO_CLK_GATE_EN1, 2);
> +static struct clk_regmap earcrx =
> +	AUD_PCLK_GATE(earcrx, AUDIO_CLK_GATE_EN1, 6);
> +
>   
>   static struct clk_regmap sm1_mst_a_mclk_sel =
>   	AUD_MST_MCLK_MUX(mst_a_mclk, AUDIO_SM1_MCLK_A_CTRL);
> @@ -766,6 +769,10 @@ static struct clk_regmap sm1_mst_e_mclk_sel =
>   	AUD_MST_MCLK_MUX(mst_e_mclk, AUDIO_SM1_MCLK_E_CTRL);
>   static struct clk_regmap sm1_mst_f_mclk_sel =
>   	AUD_MST_MCLK_MUX(mst_f_mclk, AUDIO_SM1_MCLK_F_CTRL);
> +static struct clk_regmap sm1_earcrx_cmdc_clk_sel =
> +	AUD_MST_MCLK_MUX(earcrx_cmdc_clk, AUDIO_EARCRX_CMDC_CLK_CTRL);
> +static struct clk_regmap sm1_earcrx_dmac_clk_sel =
> +	AUD_MST_MCLK_MUX(earcrx_dmac_clk, AUDIO_EARCRX_DMAC_CLK_CTRL);
>   
>   static struct clk_regmap sm1_mst_a_mclk_div =
>   	AUD_MST_MCLK_DIV(mst_a_mclk, AUDIO_SM1_MCLK_A_CTRL);
> @@ -779,6 +786,11 @@ static struct clk_regmap sm1_mst_e_mclk_div =
>   	AUD_MST_MCLK_DIV(mst_e_mclk, AUDIO_SM1_MCLK_E_CTRL);
>   static struct clk_regmap sm1_mst_f_mclk_div =
>   	AUD_MST_MCLK_DIV(mst_f_mclk, AUDIO_SM1_MCLK_F_CTRL);
> +static struct clk_regmap sm1_earcrx_cmdc_clk_div =
> +	AUD_MST_MCLK_DIV(earcrx_cmdc_clk, AUDIO_EARCRX_CMDC_CLK_CTRL);
> +static struct clk_regmap sm1_earcrx_dmac_clk_div =
> +	AUD_MST_MCLK_DIV(earcrx_dmac_clk, AUDIO_EARCRX_DMAC_CLK_CTRL);
> +
>   
>   static struct clk_regmap sm1_mst_a_mclk =
>   	AUD_MST_MCLK_GATE(mst_a_mclk, AUDIO_SM1_MCLK_A_CTRL);
> @@ -792,6 +804,10 @@ static struct clk_regmap sm1_mst_e_mclk =
>   	AUD_MST_MCLK_GATE(mst_e_mclk, AUDIO_SM1_MCLK_E_CTRL);
>   static struct clk_regmap sm1_mst_f_mclk =
>   	AUD_MST_MCLK_GATE(mst_f_mclk, AUDIO_SM1_MCLK_F_CTRL);
> +static struct clk_regmap sm1_earcrx_cmdc_clk =
> +	AUD_MST_MCLK_GATE(earcrx_cmdc_clk, AUDIO_EARCRX_CMDC_CLK_CTRL);
> +static struct clk_regmap sm1_earcrx_dmac_clk =
> +	AUD_MST_MCLK_GATE(earcrx_dmac_clk, AUDIO_EARCRX_DMAC_CLK_CTRL);
>   
>   static struct clk_regmap sm1_tdm_mclk_pad_0 = AUD_TDM_PAD_CTRL(
>   	tdm_mclk_pad_0, AUDIO_SM1_MST_PAD_CTRL0, 0, mclk_pad_ctrl_parent_data);
> @@ -1232,6 +1248,13 @@ static struct clk_hw *sm1_audio_hw_clks[] = {
>   	[AUD_CLKID_SYSCLK_A_EN]		= &sm1_sysclk_a_en.hw,
>   	[AUD_CLKID_SYSCLK_B_DIV]	= &sm1_sysclk_b_div.hw,
>   	[AUD_CLKID_SYSCLK_B_EN]		= &sm1_sysclk_b_en.hw,
> +	[AUD_CLKID_EARCRX]		= &earcrx.hw,
> +	[AUD_CLKID_EARCRX_CMDC_SEL]	= &sm1_earcrx_cmdc_clk_sel.hw,
> +	[AUD_CLKID_EARCRX_CMDC_DIV]	= &sm1_earcrx_cmdc_clk_div.hw,
> +	[AUD_CLKID_EARCRX_CMDC]		= &sm1_earcrx_cmdc_clk.hw,
> +	[AUD_CLKID_EARCRX_DMAC_SEL]	= &sm1_earcrx_dmac_clk_sel.hw,
> +	[AUD_CLKID_EARCRX_DMAC_DIV]	= &sm1_earcrx_dmac_clk_div.hw,
> +	[AUD_CLKID_EARCRX_DMAC]		= &sm1_earcrx_dmac_clk.hw,
>   };
>   
>   
> @@ -1646,6 +1669,13 @@ static struct clk_regmap *const sm1_clk_regmaps[] = {
>   	&sm1_sysclk_a_en,
>   	&sm1_sysclk_b_div,
>   	&sm1_sysclk_b_en,
> +	&earcrx,
> +	&sm1_earcrx_cmdc_clk_sel,
> +	&sm1_earcrx_cmdc_clk_div,
> +	&sm1_earcrx_cmdc_clk,
> +	&sm1_earcrx_dmac_clk_sel,
> +	&sm1_earcrx_dmac_clk_div,
> +	&sm1_earcrx_dmac_clk,
>   };
>   
>   struct axg_audio_reset_data {
> @@ -1853,7 +1883,7 @@ static const struct audioclk_data sm1_audioclk_data = {
>   	},
>   	.reset_offset = AUDIO_SM1_SW_RESET0,
>   	.reset_num = 39,
> -	.max_register = AUDIO_CLK_SPDIFOUT_B_CTRL,
> +	.max_register = AUDIO_EARCRX_DMAC_CLK_CTRL,
>   };
>   
>   static const struct of_device_id clkc_match_table[] = {
> diff --git a/drivers/clk/meson/axg-audio.h b/drivers/clk/meson/axg-audio.h
> index 01a3da19933e..9e7765b630c9 100644
> --- a/drivers/clk/meson/axg-audio.h
> +++ b/drivers/clk/meson/axg-audio.h
> @@ -64,5 +64,7 @@
>   #define AUDIO_SM1_SW_RESET1	0x02C
>   #define AUDIO_CLK81_CTRL	0x030
>   #define AUDIO_CLK81_EN		0x034
> +#define AUDIO_EARCRX_CMDC_CLK_CTRL	0x0D0
> +#define AUDIO_EARCRX_DMAC_CLK_CTRL	0x0D4
>   
>   #endif /*__AXG_AUDIO_CLKC_H */

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

Re: [PATCH 1/3] dt-bindings: clock: axg-audio: add earcrx clock ids

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 236 bytes --]

On Fri, Jul 19, 2024 at 11:39:30AM +0200, Jerome Brunet wrote:
> Add clock IDs for the eARC Rx device found on sm1 SoCs
> 
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>

Acked-by: Conor Dooley <conor.dooley@microchip.com>

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH 0/3] clk: meson: sm1: add earcrx clocks

[Jerome Brunet]

Applied to clk-meson (clk-meson-next), thanks!

[1/3] dt-bindings: clock: axg-audio: add earcrx clock ids
      https://github.com/BayLibre/clk-meson/commit/02672e609fa9
[2/3] clk: meson: axg-audio: setup regmap max_register based on the SoC
      https://github.com/BayLibre/clk-meson/commit/dd8ab39a8b41
[3/3] clk: meson: axg-audio: add sm1 earcrx clocks
      https://github.com/BayLibre/clk-meson/commit/4cb834703c64

Best regards,
--
Jerome