From: Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
Cc: thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 4/7] soc/tegra: pmc: Add interface to set voltage of IO rails
Date: Fri, 15 Apr 2016 22:03:57 +0530 [thread overview]
Message-ID: <571117F5.2090504@nvidia.com> (raw)
In-Reply-To: <571119D5.3040309-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
On Friday 15 April 2016 10:11 PM, Stephen Warren wrote:
> On 04/15/2016 10:21 AM, Laxman Dewangan wrote:
>>
>> On Friday 15 April 2016 09:54 PM, Stephen Warren wrote:
>>> On 04/12/2016 08:56 AM, Laxman Dewangan wrote:
>>>> NVIDIA Tegra210 supports some of the IO interface which can operate
>>>> at 1.8V or 3.3V I/O rail voltage levels. SW needs to configure
>>>> Tegra PMC register to set different voltage level of IO interface
>>>> based
>>>> on IO rail voltage from power supply i.e. power regulators.
>>>>
>>>> Add APIs to set and get IO rail voltage from the client driver.
>>>
>>>> diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
>>>
>>>> +static struct tegra_io_rail_voltage_bit_info
>>>> tegra210_io_rail_voltage_info[] = {
>>>> + TEGRA_IO_RAIL_VOLTAGE(SDMMC1, 12),
>>>> + TEGRA_IO_RAIL_VOLTAGE(SDMMC3, 13),
>>>> + TEGRA_IO_RAIL_VOLTAGE(AUDIO_HV, 18),
>>>> + TEGRA_IO_RAIL_VOLTAGE(DMIC, 20),
>>>> + TEGRA_IO_RAIL_VOLTAGE(GPIO, 21),
>>>> + TEGRA_IO_RAIL_VOLTAGE(SPI_HV, 23),
>>>> +};
>>>
>>> That table is likely specific to Tegra210, yet ...
>>>
>>>> +static int tegra_io_rail_voltage_get_bit_pos(int io_rail_id)
>>>> +int tegra_io_rail_voltage_set(int io_rail, int val)
>>>> +int tegra_io_rail_voltage_get(int io_rail)
>>>
>>> ... these functions are all named as if they are generic. Presumably
>>> they will indeed be needed for the next chip too? How will you prevent
>>> their use, or turn these functions into no-ops, or return errors, on
>>> other SoCs?
>>
>> It will return error for the Soc which does to support or the parameter
>> to the apis which are not applicable.
>
> Are you saying that will happen in the current code? I don't see where
> there's anything that validates that.
>
> Or does "will" mean "I will do that in the next patch revision"?
I have code like this in this patch
+int tegra_pmc_pad_voltage_update(unsigned long offset, unsigned long mask,
+ unsigned long val)
+{
+ unsigned long flags;
+
+ if (!pmc->soc->has_pad_voltage_config)
+ return -ENODEV;
+
So this flag is try only for T210 and all previous chip has false setting.
next prev parent reply other threads:[~2016-04-15 16:33 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-12 14:56 [PATCH 0/7] pinctrl: soc/tegra: Add support to configure IO rail voltage and pad power states Laxman Dewangan
[not found] ` <1460473007-11535-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12 14:56 ` [PATCH 1/7] soc/tegra: pmc: Use BIT macro for register field definition Laxman Dewangan
[not found] ` <1460473007-11535-2-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12 15:26 ` Thierry Reding
2016-04-12 16:58 ` Laxman Dewangan
2016-04-15 7:44 ` Linus Walleij
2016-04-12 14:56 ` [PATCH 2/7] soc/tegra: pmc: Add new Tegra210 IO rails Laxman Dewangan
[not found] ` <1460473007-11535-3-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12 15:28 ` Thierry Reding
[not found] ` <20160412152830.GB30211-EkSeR96xj6Pcmrwk2tT4+A@public.gmane.org>
2016-04-12 16:59 ` Laxman Dewangan
2016-04-12 18:03 ` Jon Hunter
2016-04-12 17:57 ` Laxman Dewangan
2016-04-12 14:56 ` [PATCH 3/7] soc/tegra: pmc: Add interface to get IO rail power status Laxman Dewangan
[not found] ` <1460473007-11535-4-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12 18:06 ` kbuild test robot
2016-04-12 18:13 ` Jon Hunter
2016-04-12 14:56 ` [PATCH 4/7] soc/tegra: pmc: Add interface to set voltage of IO rails Laxman Dewangan
2016-04-13 8:47 ` Jon Hunter
2016-04-13 9:00 ` Laxman Dewangan
2016-04-13 9:25 ` Jon Hunter
[not found] ` <570E109D.6070805-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-13 9:20 ` Laxman Dewangan
2016-04-13 9:56 ` Jon Hunter
[not found] ` <1460473007-11535-5-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 7:54 ` Linus Walleij
[not found] ` <CACRpkdbueJ=0+WtNefQ7GHoqU5HY7WFYjL2geFq4vkpTbZesZA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-04-15 8:00 ` Mark Brown
[not found] ` <20160415080027.GB3217-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2016-04-15 8:25 ` Laxman Dewangan
[not found] ` <5710A583.2010102-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 9:19 ` Linus Walleij
2016-04-15 16:24 ` Stephen Warren
2016-04-15 16:21 ` Laxman Dewangan
[not found] ` <57111524.60708-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 16:41 ` Stephen Warren
[not found] ` <571119D5.3040309-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2016-04-15 16:33 ` Laxman Dewangan [this message]
2016-04-15 16:59 ` Stephen Warren
2016-04-12 14:56 ` [PATCH 5/7] soc/tegra: pmc: Register sub-devices of PMC Laxman Dewangan
[not found] ` <1460473007-11535-6-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 16:31 ` Stephen Warren
2016-04-12 14:56 ` [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Laxman Dewangan
2016-04-13 9:04 ` Jon Hunter
[not found] ` <570E0BAE.8090404-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-13 9:08 ` Laxman Dewangan
2016-04-13 9:31 ` Jon Hunter
2016-04-15 14:16 ` Jon Hunter
2016-04-15 14:12 ` Laxman Dewangan
[not found] ` <5710F6CA.6060700-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 15:14 ` Jon Hunter
[not found] ` <57110560.80004-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 15:14 ` Laxman Dewangan
2016-04-15 15:45 ` Jon Hunter
2016-04-15 16:41 ` Laxman Dewangan
2016-04-15 17:44 ` Jon Hunter
[not found] ` <5711288D.7060701-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 17:49 ` Laxman Dewangan
2016-04-15 18:30 ` Jon Hunter
[not found] ` <57113340.6090701-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 18:43 ` Laxman Dewangan
2016-04-15 16:35 ` Stephen Warren
2016-04-15 16:31 ` Laxman Dewangan
2016-04-12 14:56 ` [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and power state of io pads Laxman Dewangan
2016-04-15 8:08 ` Linus Walleij
2016-04-15 8:39 ` Laxman Dewangan
2016-04-15 9:25 ` Linus Walleij
2016-04-15 9:55 ` Laxman Dewangan
2016-04-15 11:15 ` Linus Walleij
[not found] ` <CACRpkdbr-9Z1JKMVmwNFyMq+Pg+3hT5c9rKZ1y4wZecnidW9Cg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-04-15 11:47 ` Laxman Dewangan
2016-04-15 14:03 ` Linus Walleij
2016-04-15 13:59 ` Laxman Dewangan
[not found] ` <5710F3DC.7090906-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-19 9:49 ` Laxman Dewangan
2016-04-26 13:32 ` Laxman Dewangan
2016-04-26 15:31 ` Stephen Warren
[not found] ` <5710A8A4.90309-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 16:38 ` Stephen Warren
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