From: Jon Hunter <jonathanh@nvidia.com>
To: Laxman Dewangan <ldewangan@nvidia.com>,
swarren@wwwdotorg.org, thierry.reding@gmail.com,
linus.walleij@linaro.org, gnurou@gmail.com, robh+dt@kernel.org,
mark.rutland@arm.com
Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org
Subject: Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control
Date: Fri, 15 Apr 2016 19:30:24 +0100 [thread overview]
Message-ID: <57113340.6090701@nvidia.com> (raw)
In-Reply-To: <571129B9.7050602@nvidia.com>
On 15/04/16 18:49, Laxman Dewangan wrote:
>
> On Friday 15 April 2016 11:14 PM, Jon Hunter wrote:
>> On 15/04/16 17:41, Laxman Dewangan wrote:
>>> On Friday 15 April 2016 09:15 PM, Jon Hunter wrote:
>>>> On 15/04/16 16:14, Laxman Dewangan wrote:
>>>>> I used pins as this is the property from pincon generic so that I can
>>>>> use the generic implementation.
>>>>>
>>>>> Here, I will not go to the pin level control as HW does not support
>>>>> pin
>>>>> level control.
>>>>>
>>>>> I will say the unit should be interface level. Should we say
>>>>> IO_GROUP_CSIA, IO_GROUP_CSIB etc?
>>>> So we need to reflect the hardware in device-tree and although yes the
>>>> power-down for the CSI_x_xxx pads are all controlled together as a
>>>> single group, it does not feel right that we add a pseudo pin called
>>>> csix to represent these.
>>>>
>>>> The CSI_x_xxx pads are already in device-tree and so why not add a
>>>> property to each of these pads which has the IO rail information for
>>>> power-down and voltage-select?
>>> Which dt binding docs have these?
>>> I looked for nvidia,tegra210-pinmux.txt and not able to find csi_xxx.
>> For CSI you are right they are not included by the current DT binding
>> docs, however, the sdmmc1/3 pads are. So that makes things a bit more
>> messy as some are and some are not.
>
> Yaah and so lets have the names in new dt files. Names may be same but
> define all possible names f groups in dt binding and need not to refer
> from other file which does not have all.
I still do not like that. In the case of sdmmc we now have two pinctrl
drivers to deal with for a single set of pins. That does not seem
correct IMO.
>>> Here I dont want to refer the individual pins as control should be as
>>> group.
>> I understand, however, at least for power-down control I don't see why
>> we cannot refer to the individual pins and once all are inactive then
>> the rail can be powered down.
>>
>> For switching the voltage it is a bit more complex, but may be we could
>> still look-up the IO rail based upon the pads the device uses.
>>
>
> Yes, it can be done with ref count also for power down.
Exactly.
> But interfaces are complex. As a client, it is easy to say power down
> SDMMC1 IO interface rather than saying power down 10 pins (names) of
> that group.
Right and like I said, we could always look up the IO rail from the pins
associated once at probe time and then control it from there.
Cheers
Jon
next prev parent reply other threads:[~2016-04-15 18:30 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-12 14:56 [PATCH 0/7] pinctrl: soc/tegra: Add support to configure IO rail voltage and pad power states Laxman Dewangan
[not found] ` <1460473007-11535-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12 14:56 ` [PATCH 1/7] soc/tegra: pmc: Use BIT macro for register field definition Laxman Dewangan
[not found] ` <1460473007-11535-2-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12 15:26 ` Thierry Reding
2016-04-12 16:58 ` Laxman Dewangan
2016-04-15 7:44 ` Linus Walleij
2016-04-12 14:56 ` [PATCH 2/7] soc/tegra: pmc: Add new Tegra210 IO rails Laxman Dewangan
[not found] ` <1460473007-11535-3-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12 15:28 ` Thierry Reding
[not found] ` <20160412152830.GB30211-EkSeR96xj6Pcmrwk2tT4+A@public.gmane.org>
2016-04-12 16:59 ` Laxman Dewangan
2016-04-12 18:03 ` Jon Hunter
2016-04-12 17:57 ` Laxman Dewangan
2016-04-12 14:56 ` [PATCH 3/7] soc/tegra: pmc: Add interface to get IO rail power status Laxman Dewangan
[not found] ` <1460473007-11535-4-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12 18:06 ` kbuild test robot
2016-04-12 18:13 ` Jon Hunter
2016-04-12 14:56 ` [PATCH 4/7] soc/tegra: pmc: Add interface to set voltage of IO rails Laxman Dewangan
2016-04-13 8:47 ` Jon Hunter
2016-04-13 9:00 ` Laxman Dewangan
2016-04-13 9:25 ` Jon Hunter
[not found] ` <570E109D.6070805-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-13 9:20 ` Laxman Dewangan
2016-04-13 9:56 ` Jon Hunter
[not found] ` <1460473007-11535-5-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 7:54 ` Linus Walleij
[not found] ` <CACRpkdbueJ=0+WtNefQ7GHoqU5HY7WFYjL2geFq4vkpTbZesZA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-04-15 8:00 ` Mark Brown
[not found] ` <20160415080027.GB3217-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2016-04-15 8:25 ` Laxman Dewangan
[not found] ` <5710A583.2010102-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 9:19 ` Linus Walleij
2016-04-15 16:24 ` Stephen Warren
2016-04-15 16:21 ` Laxman Dewangan
[not found] ` <57111524.60708-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 16:41 ` Stephen Warren
[not found] ` <571119D5.3040309-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2016-04-15 16:33 ` Laxman Dewangan
2016-04-15 16:59 ` Stephen Warren
2016-04-12 14:56 ` [PATCH 5/7] soc/tegra: pmc: Register sub-devices of PMC Laxman Dewangan
[not found] ` <1460473007-11535-6-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 16:31 ` Stephen Warren
2016-04-12 14:56 ` [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Laxman Dewangan
2016-04-13 9:04 ` Jon Hunter
[not found] ` <570E0BAE.8090404-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-13 9:08 ` Laxman Dewangan
2016-04-13 9:31 ` Jon Hunter
2016-04-15 14:16 ` Jon Hunter
2016-04-15 14:12 ` Laxman Dewangan
[not found] ` <5710F6CA.6060700-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 15:14 ` Jon Hunter
[not found] ` <57110560.80004-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 15:14 ` Laxman Dewangan
2016-04-15 15:45 ` Jon Hunter
2016-04-15 16:41 ` Laxman Dewangan
2016-04-15 17:44 ` Jon Hunter
[not found] ` <5711288D.7060701-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 17:49 ` Laxman Dewangan
2016-04-15 18:30 ` Jon Hunter [this message]
[not found] ` <57113340.6090701-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 18:43 ` Laxman Dewangan
2016-04-15 16:35 ` Stephen Warren
2016-04-15 16:31 ` Laxman Dewangan
2016-04-12 14:56 ` [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and power state of io pads Laxman Dewangan
2016-04-15 8:08 ` Linus Walleij
2016-04-15 8:39 ` Laxman Dewangan
2016-04-15 9:25 ` Linus Walleij
2016-04-15 9:55 ` Laxman Dewangan
2016-04-15 11:15 ` Linus Walleij
[not found] ` <CACRpkdbr-9Z1JKMVmwNFyMq+Pg+3hT5c9rKZ1y4wZecnidW9Cg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-04-15 11:47 ` Laxman Dewangan
2016-04-15 14:03 ` Linus Walleij
2016-04-15 13:59 ` Laxman Dewangan
[not found] ` <5710F3DC.7090906-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-19 9:49 ` Laxman Dewangan
2016-04-26 13:32 ` Laxman Dewangan
2016-04-26 15:31 ` Stephen Warren
[not found] ` <5710A8A4.90309-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 16:38 ` Stephen Warren
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