From: Archit Taneja <architt@codeaurora.org>
To: Philipp Zabel <p.zabel@pengutronix.de>
Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 5/9] dt-bindings: msm/dsi: Some binding doc cleanups
Date: Wed, 4 May 2016 13:41:46 +0530 [thread overview]
Message-ID: <5729AEC2.6010708@codeaurora.org> (raw)
In-Reply-To: <1462284301.3617.71.camel@pengutronix.de>
On 05/03/2016 07:35 PM, Philipp Zabel wrote:
> Am Dienstag, den 03.05.2016, 16:27 +0530 schrieb Archit Taneja:
>> Some cleanups:
>>
>> - Use simpler names for DT nodes in the example
>> - Fix phandle for specifying data lane mapping in the example.
>> - Use references instead of dumping Document links everywhere
>>
>> Signed-off-by: Archit Taneja <architt@codeaurora.org>
>> ---
>> .../devicetree/bindings/display/msm/dsi.txt | 23 +++++++++++-----------
>> 1 file changed, 12 insertions(+), 11 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt b/Documentation/devicetree/bindings/display/msm/dsi.txt
>> index f5948c4..bf41d7c 100644
>> --- a/Documentation/devicetree/bindings/display/msm/dsi.txt
>> +++ b/Documentation/devicetree/bindings/display/msm/dsi.txt
>> @@ -11,8 +11,7 @@ Required properties:
>> be 0 or 1, since we have 2 DSI controllers at most for now.
>> - interrupts: The interrupt signal from the DSI block.
>> - power-domains: Should be <&mmcc MDSS_GDSC>.
>> -- clocks: device clocks
>> - See Documentation/devicetree/bindings/clocks/clock-bindings.txt for details.
>> +- clocks: Phandles to device clocks as descirbed in [1]
>
> s/descirbed/described/
>
>> - clock-names: the following clocks are required:
>> * "mdp_core_clk"
>> * "iface_clk"
>> @@ -31,8 +30,7 @@ Required properties:
>>
>> Optional properties:
>> - panel@0: Node of panel connected to this DSI controller.
>> - See files in Documentation/devicetree/bindings/display/panel/ for each supported
>> - panel.
>> + See files in [2] for each supported panel.
>> - qcom,dual-dsi-mode: Boolean value indicating if the DSI controller is
>> driving a panel which needs 2 DSI links.
>> - qcom,master-dsi: Boolean value indicating if the DSI controller is driving
>> @@ -48,7 +46,7 @@ Optional properties:
>>
>> DSI Endpoint properties:
>> - remote-endpoint: set to phandle of the connected panel's endpoint.
>> - See Documentation/devicetree/bindings/graph.txt for device graph info.
>> + See [3] for device graph info.
>> - qcom,data-lane-map: this describes how the logical DSI lanes are mapped
>> to the physical lanes on the given platform. The value contained in
>> index n describes what logical data lane is mapped to the physical data
>> @@ -89,8 +87,7 @@ Required properties:
>> - qcom,dsi-phy-index: The ID of DSI PHY hardware instance. This should
>> be 0 or 1, since we have 2 DSI PHYs at most for now.
>> - power-domains: Should be <&mmcc MDSS_GDSC>.
>> -- clocks: device clocks
>> - See Documentation/devicetree/bindings/clocks/clock-bindings.txt for details.
>> +- clocks: Phandles to device clocks as descirbed in [1]
>
> s/descirbed/described/
Thanks, will fix these.
>
>> - clock-names: the following clocks are required:
>> * "iface_clk"
>> - vddio-supply: phandle to vdd-io regulator device node
>> @@ -99,8 +96,12 @@ Optional properties:
>> - qcom,dsi-phy-regulator-ldo-mode: Boolean value indicating if the LDO mode PHY
>> regulator is wanted.
>>
>> +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
>> +[2] Documentation/devicetree/bindings/display/panel/
>> +[3] Documentation/devicetree/bindings/graph.txt
>> +
>> Example:
>> - mdss_dsi0: qcom,mdss_dsi@fd922800 {
>> + dsi0: dsi@fd922800 {
>> compatible = "qcom,mdss-dsi-ctrl";
>> qcom,dsi-host-index = <0>;
>> interrupt-parent = <&mdss_mdp>;
>> @@ -128,7 +129,7 @@ Example:
>> vdd-supply = <&pma8084_l22>;
>> vddio-supply = <&pma8084_l12>;
>>
>> - qcom,dsi-phy = <&mdss_dsi_phy0>;
>> + qcom,dsi-phy = <&dsi_phy0>;
>>
>>
>> qcom,dual-dsi-mode;
>> qcom,master-dsi;
>> @@ -156,12 +157,12 @@ Example:
>> port {
>> dsi0_out: endpoint {
>> remote-endpoint = <&panel_in>;
>> - lanes = <0 1 2 3>;
>> + qcom,data-lane-map = <0 1 2 3>;
>
> See my comment about the CSI-2 data-lanes binding in the other mail,
> could the existing binding be reused?
Yes, I'll incorporate the existing binding.
Thanks for the review.
Archit
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next prev parent reply other threads:[~2016-05-04 8:11 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-03 10:57 [PATCH 0/9] drm/msm: Fix issues with DT bindings Archit Taneja
2016-05-03 10:57 ` [PATCH 1/9] drm/msm: Get mdss components via parsing ports Archit Taneja
2016-05-03 10:57 ` [PATCH 2/9] drm/msm: Drop the gpu binding Archit Taneja
2016-05-03 12:42 ` Rob Herring
2016-05-04 6:45 ` Archit Taneja
2016-05-03 10:57 ` [PATCH 3/9] drm/msm/mdp: mdp4: Update LCDC/LVDS port parsing Archit Taneja
2016-05-03 13:50 ` Philipp Zabel
2016-05-03 10:57 ` [PATCH 4/9] dt-bindings: msm/mdp: Remove connector and gpu bindings Archit Taneja
2016-05-04 13:38 ` Rob Herring
2016-05-04 17:49 ` Archit Taneja
[not found] ` <1462273081-5814-1-git-send-email-architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-05-03 10:57 ` [PATCH 5/9] dt-bindings: msm/dsi: Some binding doc cleanups Archit Taneja
2016-05-03 14:05 ` Philipp Zabel
2016-05-04 8:11 ` Archit Taneja [this message]
2016-05-03 10:58 ` [PATCH 8/9] dt-bindings: msm/dsi: Modify port and PHY bindings Archit Taneja
2016-05-03 14:02 ` Philipp Zabel
2016-05-04 8:09 ` Archit Taneja
2016-05-03 10:57 ` [PATCH 6/9] drm/msm/dsi: Modify port parsing Archit Taneja
2016-05-03 10:57 ` [PATCH 7/9] drm/msm/dsi: Use generic PHY bindings Archit Taneja
2016-05-03 10:58 ` [PATCH 9/9] dt-bindings: msm/dsi: Add assigned clocks bindings Archit Taneja
2016-05-04 13:44 ` Rob Herring
2016-05-04 18:04 ` Archit Taneja
[not found] ` <572A39B7.5020008-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-05-11 14:08 ` Rob Herring
2016-06-10 10:46 ` [PATCH v2 00/10] drm/msm: Fix issues with DT bindings Archit Taneja
2016-06-10 10:46 ` [PATCH v2 02/10] drm/msm/mdp4: Clean up some MDP4 clocks Archit Taneja
2016-06-10 10:46 ` [PATCH v2 04/10] drm/msm/dsi: Modify port parsing Archit Taneja
2016-06-10 10:46 ` [PATCH v2 05/10] drm/msm/dsi: Use generic PHY bindings Archit Taneja
2016-06-10 10:46 ` [PATCH v2 06/10] drm/msm/dsi: Use a standard DT binding for data lanes Archit Taneja
[not found] ` <1465555600-25742-1-git-send-email-architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-06-10 10:46 ` [PATCH v2 01/10] drm/msm/mdp5: Don't get source of MDP core clock Archit Taneja
2016-06-10 10:46 ` [PATCH v2 03/10] dt-bindings: msm/mdp: Fix up clock related bindings Archit Taneja
2016-06-13 19:03 ` Rob Herring
2016-06-16 5:08 ` Archit Taneja
2016-06-10 10:46 ` [PATCH v2 07/10] dt-bindings: msm/dsi: Use standard data lanes binding Archit Taneja
2016-06-13 19:53 ` Rob Herring
2016-06-10 10:46 ` [PATCH v2 10/10] dt-bindings: msm/dsi: Some binding doc cleanups Archit Taneja
2016-06-14 12:33 ` Rob Herring
2016-06-10 10:46 ` [PATCH v2 08/10] dt-bindings: msm/dsi: Modify port and PHY bindings Archit Taneja
2016-06-14 12:31 ` Rob Herring
2016-06-10 10:46 ` [PATCH v2 09/10] dt-bindings: msm/dsi: Add assigned clocks bindings Archit Taneja
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