From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.1 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56C43C352A3 for ; Mon, 10 Feb 2020 10:29:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 22CD92080C for ; Mon, 10 Feb 2020 10:29:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=de.bosch.com header.i=@de.bosch.com header.b="WdI8ImR2" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727003AbgBJK3b (ORCPT ); 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Mon, 10 Feb 2020 11:21:26 +0100 (CET) X-AuditID: 0a3aad10-8b5ff70000004724-8e-5e412ea649b3 Received: from si0vm1949.rbesz01.com ( [10.58.173.29]) (using TLS with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by fe0vm7918.rbesz01.com (SMG Outbound) with SMTP id DB.97.18212.6AE214E5; Mon, 10 Feb 2020 11:21:26 +0100 (CET) Received: from SI-HUB2000.de.bosch.com (si-hub2000.de.bosch.com [10.4.103.108]) by si0vm1949.rbesz01.com (Postfix) with ESMTPS id 48GMPy4CPTz6CjZNp; Mon, 10 Feb 2020 11:21:26 +0100 (CET) Received: from [10.34.222.178] (10.34.222.178) by SI-HUB2000.de.bosch.com (10.4.103.108) with Microsoft SMTP Server id 15.1.1847.3; Mon, 10 Feb 2020 11:21:26 +0100 Subject: Re: [PATCH RFC 2/2] memory: add Renesas RPC-IF driver To: Sergei Shtylyov CC: , , Philipp Zabel , Mason Yang , , Chris Brandt , References: <4db876ed-1ccc-e3be-311d-30cd52f40259@cogentembedded.com> From: "Behme Dirk (CM/ESO2)" Message-ID: <5760bcdb-e44b-6f18-7262-9526684e5780@de.bosch.com> Date: Mon, 10 Feb 2020 11:21:26 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.4.2 MIME-Version: 1.0 In-Reply-To: <4db876ed-1ccc-e3be-311d-30cd52f40259@cogentembedded.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.34.222.178] X-Brightmail-Tracker: H4sIAAAAAAAAA22Sf0wbZRjHea/X9tpwchwUHotTdwtKNsdAkR264OYi6R8aFpNpNA49xtHW AcW7QsaMEXQyuulgccDoCJUNx8QsQSbyY3OyZiFlThigAh0lMBvjGEJHgz/AWe9WWPuH/7z5 vt/n+bzfe597CQXtU+sJc5GVF4q4AkalxbXPnFu3+UzyjpwU1/kk1lH/Cc46rgwq2dHeRhXb eWseYyvuTKhZW/9txHqmXDh7rc2t3k4YpmsDmOF6yzmVofpuiuGPa8dwg7/j4V3K17Xb8vgC cykvbMl8S2sarptQFLdu2m+/1a8uRwHmMNIQQKVBXeuX6DDSEjRVj8HN5qPK4OYSAk9NLx7c tCKo7T6ikpEYKhPmPqpUyjqWYsFTcepek4IKIPD1VK2eVYFgYOGIWu5SUelwu8WOZE1Sz8Hl Qz6JIAicSoTR5XTZ1lF7oL+rUh1siYaBBi8uaw2VBePNc/e0QgprcAyhoI4Ht9eBBfUj0PV7 oyJ4n/XQ6TmurkG0PewoexhuD8PtYfhnCG9Dunw+pbRwa0Yqmyzk8uKBlNTkvZbCDhT8O1Q3 6rma70QYgZzoaQJjdOQ+3Y4c+oFcS16ZiRNNbwolBbzI6Mn352x76Jj7tliSW2gWRbOlyImA UDCxZEaCxJF5XNkBXrAEMSdKIHAmnjQS2W/QlJGz8vt4vpgX1qrPEgQDZNJmCYwWeCO/P99c YF0rM+tIFBERQceFV8JjMULjRE8RkVL24hNytljMFYpm4yr+YBCn19wQehVt1ceTj8kMJVdN JUX3U/UPkYNZmTm0LqwQImfROCIQE0OS8jdHSk89lAdkuTyi6FUzBD3ZIjGUPwqaPhCgqXsJ QfvYdxicHxnG4OKiH4PJT+04DHzfgYP7r3YldB+cUcJIr10NS5N9avgnUKmB36aGNDBctaCB k6cXNXCpbiUSpm4ORsHlmZUomPQfi4ZqWwcNSxe6peXsBRqu1I7REPjKHwvDLrcOpmaXddA0 MR0HrrO+OGj0/QLw8bcNeug5+I0eXN4vEmalWWLSLMfStsuztHLW/5nlqhu6nL4cbeTyT/CC dWl8aPRvdzpn+/m1be2vvD2/PmmDpv6u31H3p/HDmffGAqdHd/8w513Y3ffjv/qRwMkbnoul r1YN5WVd9z6ac7SzzPKC8dBOm/OnvvL2XWcm7ry7s6balk2/M/PrljRb4ssr8W2bpp/P3ruc +FLGfNTK8RftvubEx8WvP79xoovBRROXulEhiNx/JizsOoMEAAA= Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Sergei, On 10.12.2019 20:39, Sergei Shtylyov wrote: > Add the memory driver for Renesas RPC-IF which registers either SPI or > HyperFLash device depending on the contents of the device tree subnode. > It also provides the absract "back end" device APIs that can be used by > the "front end" SPI/MTD drivers to talk to the real hardware. > > Based on the original patch by Mason Yang . > > Signed-off-by: Sergei Shtylyov FYI, please find below [1] the changes I did locally on this driver. It seems to read & write successfully on my custom M3 (R8A7796) device, now. Best regards Dirk [1] From d72b805cc461ab1e9747c973e9be84e7abb8f828 Mon Sep 17 00:00:00 2001 From: Dirk Behme Date: Tue, 4 Feb 2020 08:39:31 +0100 Subject: [PATCH] memory: renesas-rpc-if: Correct the STRTIM and some other clean up This is required to make the driver work correctly in my M3 environment. Signed-off-by: Dirk Behme --- drivers/memory/renesas-rpc-if.c | 42 ++++++++++++++++++++------------- 1 file changed, 25 insertions(+), 17 deletions(-) diff --git a/drivers/memory/renesas-rpc-if.c b/drivers/memory/renesas-rpc-if.c index 04be92b64bfa..f4356b066384 100644 --- a/drivers/memory/renesas-rpc-if.c +++ b/drivers/memory/renesas-rpc-if.c @@ -129,10 +129,11 @@ #define RPCIF_PHYCNT 0x007C /* R/W */ #define RPCIF_PHYCNT_CAL BIT(31) -#define RPCIF_PHYCNT_OCTA_AA BIT(22) -#define RPCIF_PHYCNT_OCTA_SA BIT(23) +#define RPCIF_PHYCNT_OCTA(v) (((v) & 0x3) << 22) #define RPCIF_PHYCNT_EXDS BIT(21) #define RPCIF_PHYCNT_OCT BIT(20) +#define RPCIF_PHYCNT_DDRCAL BIT(19) +#define RPCIF_PHYCNT_HS BIT(18) #define RPCIF_PHYCNT_STRTIM(v) (((v) & 0x7) << 15) #define RPCIF_PHYCNT_WBUF2 BIT(4) #define RPCIF_PHYCNT_WBUF BIT(2) @@ -219,6 +220,8 @@ EXPORT_SYMBOL(rpcif_disable_rpm); void rpcif_hw_init(struct rpcif *rpc, bool hyperflash) { + u32 dummy; + pm_runtime_get_sync(rpc->dev); /* @@ -227,9 +230,9 @@ void rpcif_hw_init(struct rpcif *rpc, bool hyperflash) * 0x0 : the delay is biggest, * 0x1 : the delay is 2nd biggest, * On H3 ES1.x, the value should be 0, while on others, - * the value should be 6. + * the value should be 7. */ - regmap_write(rpc->regmap, RPCIF_PHYCNT, /* RPCIF_PHYCNT_STRTIM(6) | */ + regmap_write(rpc->regmap, RPCIF_PHYCNT, RPCIF_PHYCNT_STRTIM(7) | RPCIF_PHYCNT_PHYMEM(hyperflash ? 3 : 0) | 0x260); /* @@ -250,6 +253,10 @@ void rpcif_hw_init(struct rpcif *rpc, bool hyperflash) regmap_write(rpc->regmap, RPCIF_CMNCR, RPCIF_CMNCR_SFDE | RPCIF_CMNCR_MOIIO_HIZ | RPCIF_CMNCR_IOFV_HIZ | RPCIF_CMNCR_BSZ(hyperflash ? 1 : 0)); + /* Set RCF after BSZ update */ + regmap_write(rpc->regmap, RPCIF_DRCR, RPCIF_DRCR_RCF); + /* Dummy read according to spec */ + regmap_read(rpc->regmap, RPCIF_DRCR, &dummy); regmap_write(rpc->regmap, RPCIF_SSLDR, RPCIF_SSLDR_SPNDL(7) | RPCIF_SSLDR_SLNDL(7) | RPCIF_SSLDR_SCKDL(7)); @@ -291,11 +298,11 @@ void rpcif_prepare(struct rpcif *rpc, const struct rpcif_op *op, u64 *offs, rpc->xferlen = 0; if (op->cmd.buswidth) { - rpc->enable |= RPCIF_SMENR_CDE | + rpc->enable = RPCIF_SMENR_CDE | RPCIF_SMENR_CDB(rpcif_bit_size(op->cmd.buswidth)); - rpc->command |= RPCIF_SMCMR_CMD(op->cmd.opcode); + rpc->command = RPCIF_SMCMR_CMD(op->cmd.opcode); if (op->cmd.ddr) - rpc->ddr |= RPCIF_SMDRENR_HYPE(0x5); + rpc->ddr = RPCIF_SMDRENR_HYPE(0x5); } if (op->ocmd.buswidth) { rpc->enable |= RPCIF_SMENR_OCDE | @@ -432,6 +439,8 @@ int rpcif_io_xfer(struct rpcif *rpc) * mode instead. */ if (!(smenr & RPCIF_SMENR_ADE(0xf)) && rpc->dirmap) { + u32 dummy; + regmap_update_bits(rpc->regmap, RPCIF_CMNCR, RPCIF_CMNCR_MD, 0); regmap_write(rpc->regmap, RPCIF_DRCR, @@ -446,6 +455,8 @@ int rpcif_io_xfer(struct rpcif *rpc) regmap_write(rpc->regmap, RPCIF_DRDRENR, rpc->ddr); memcpy_fromio(rpc->buffer, rpc->dirmap, rpc->xferlen); regmap_write(rpc->regmap, RPCIF_DRCR, RPCIF_DRCR_RCF); + /* Dummy read according to spec */ + regmap_read(rpc->regmap, RPCIF_DRCR, &dummy); break; } while (pos < rpc->xferlen) { @@ -506,6 +517,7 @@ ssize_t rpcif_dirmap_read(struct rpcif *rpc, u64 offs, size_t len, void *buf) { loff_t from = offs & (RPCIF_DIRMAP_SIZE - 1); size_t size = RPCIF_DIRMAP_SIZE - from; + u32 ret; if (len > size) len = size; @@ -513,19 +525,15 @@ ssize_t rpcif_dirmap_read(struct rpcif *rpc, u64 offs, size_t len, void *buf) pm_runtime_get_sync(rpc->dev); regmap_update_bits(rpc->regmap, RPCIF_CMNCR, RPCIF_CMNCR_MD, 0); - regmap_write(rpc->regmap, RPCIF_DRCR, - RPCIF_DRCR_RBURST(32) | RPCIF_DRCR_RBE); - regmap_write(rpc->regmap, RPCIF_DRCMR, rpc->command); - regmap_write(rpc->regmap, RPCIF_DREAR, - RPCIF_DREAR_EAV(offs >> 25) | RPCIF_DREAR_EAC(1)); - regmap_write(rpc->regmap, RPCIF_DROPR, rpc->option); - regmap_write(rpc->regmap, RPCIF_DRENR, - rpc->enable & ~RPCIF_SMENR_SPIDE(0xF)); - regmap_write(rpc->regmap, RPCIF_DRDMCR, rpc->dummy); - regmap_write(rpc->regmap, RPCIF_DRDRENR, rpc->ddr); + ret = wait_msg_xfer_end(rpc); + if (ret) { + len = 0; + goto err_out; + } memcpy_fromio(buf, rpc->dirmap + from, len); +err_out: pm_runtime_put(rpc->dev); return len; -- 2.20.0