From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: Thierry Reding
<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Wolfram Sang <wsa-z923LK4zBo2bacvFa/9K2g@public.gmane.org>,
Alexandre Courbot
<gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Subject: Re: [PATCH] ARM: tegra: add DT binding for Tegra186 BPMP I2C
Date: Mon, 18 Jul 2016 10:16:27 -0600 [thread overview]
Message-ID: <578D00DB.4080307@wwwdotorg.org> (raw)
In-Reply-To: <20160716210728.GA22144@rob-hp-laptop>
On 07/16/2016 03:07 PM, Rob Herring wrote:
> On Thu, Jul 07, 2016 at 01:37:11PM -0600, Stephen Warren wrote:
>> From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>>
>> In Tegra186, the BPMP (Boot and Power Management Processor) owns certain
>> HW devices, such as the I2C controller for the power management I2C bus.
>> Software running on other CPUs must perform IPC to the BPMP in order to
>> execute transactions on that I2C bus. This binding describes an I2C bus
>> that is accessed in such a fashion.
>>
>> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> ---
>> .../bindings/i2c/nvidia,tegra186-bpmp-i2c.txt | 35 ++++++++++++++++++++++
>> 1 file changed, 35 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt
>>
>> diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt b/Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt
>> new file mode 100644
>> index 000000000000..eb9f70723ab7
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt
>> @@ -0,0 +1,35 @@
>> +NVIDIA Tegra186 BPMP I2C controller
>> +
>> +In Tegra186, the BPMP (Boot and Power Management Processor) owns certain HW
>> +devices, such as the I2C controller for the power management I2C bus. Software
>> +running on other CPUs must perform IPC to the BPMP in order to execute
>> +transactions on that I2C bus. This binding describes an I2C bus that is
>> +accessed in such a fashion.
>> +
>> +Required properties:
>> +- compatible:
>> + Array of strings.
>> + One of:
>> + - "nvidia,tegra186-bpmp-i2c".
>> +- address-cells: Address cells for I2C device address.
>> + Single-cell integer.
>> + Must be <1>.
>> +- size-cells:
>> + Single-cell integer.
>> + Must be <0>.
>> +- nvidia,bpmp:
>> + The phandle to the BPMP device.
>
> Any reason to not make this a sub-node of the BPMP device?
That would be possible too.
My thought process was along the lines of: The system has an I2C bus,
which deserves a DT node. That fact seemed more important than the
access mechanism; the fact it's accessed via BPMP rather than direct
register access felt a bit more like an implementation detail. Still, I
suppose we could flip it around and store the node underneath the BPMP
if you want; let me know.
next prev parent reply other threads:[~2016-07-18 16:16 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-07 19:37 [PATCH] ARM: tegra: add DT binding for Tegra186 BPMP I2C Stephen Warren
[not found] ` <20160707193711.5891-1-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2016-07-16 21:07 ` Rob Herring
2016-07-18 16:16 ` Stephen Warren [this message]
[not found] ` <578D00DB.4080307-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2016-07-18 21:00 ` Rob Herring
[not found] ` <CAL_JsqKuV+nMCBChBGAHzVWBPEbtDB3T=nOukR9159izEz6maQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-07-18 23:31 ` Stephen Warren
[not found] ` <578D66DA.5030307-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2016-07-19 1:52 ` Rob Herring
[not found] ` <CAL_JsqLqCC+rN61Wu5J08MsnV9anFrNr=2eHWWcjEcUZAapucA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-07-19 2:02 ` Stephen Warren
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