From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kishon Vijay Abraham I Subject: Re: [PATCH v4 0/2] phy: rockchip-inno-usb2: correct 480MHz clk_ops callbacks and stable time Date: Tue, 15 Nov 2016 18:30:27 +0530 Message-ID: <582B06EB.1050700@ti.com> References: <1479182047-3399-1-git-send-email-wulf@rock-chips.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1479182047-3399-1-git-send-email-wulf-TNX95d0MmH7DzftRWevZcw@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+glpar-linux-rockchip=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: William Wu , heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org Cc: huangtao-TNX95d0MmH7DzftRWevZcw@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, groeck-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org, frank.wang-TNX95d0MmH7DzftRWevZcw@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, dianders-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, briannorris-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org On Tuesday 15 November 2016 09:24 AM, William Wu wrote: > This series try to correct the 480MHz output clock of USB2 PHY > clk_ops callback and fix the delay time. It aims to make the > 480MHz clock gate more sensible and stable. > > Tested on rk3366/rk3399 EVB board. merged to phy -next. Thanks Kishon > > William Wu (2): > phy: rockchip-inno-usb2: correct clk_ops callback > phy: rockchip-inno-usb2: correct 480MHz output clock stable time > > drivers/phy/phy-rockchip-inno-usb2.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) >