* [PATCH V3 1/7] PM / Domains: Introduce "performance-states" binding
[not found] ` <cover.1487926924.git.viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
@ 2017-02-24 9:06 ` Viresh Kumar
[not found] ` <132e9200102bf2f1175567f0862596d098363d9e.1487926924.git.viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-02-24 9:06 ` [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes Viresh Kumar
1 sibling, 1 reply; 17+ messages in thread
From: Viresh Kumar @ 2017-02-24 9:06 UTC (permalink / raw)
To: Rafael Wysocki, ulf.hansson-QSEj5FYQhm4dnm+yROfE0A, Kevin Hilman
Cc: linaro-kernel-cunTk1MwBs8s++Sfvej+rw,
linux-pm-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Stephen Boyd, Nishanth Menon,
Vincent Guittot, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
lina.iyer-QSEj5FYQhm4dnm+yROfE0A, rnayak-sgV2jX0FEOL9JmXXK+q4OQ,
Viresh Kumar, devicetree-u79uwXL29TY76Z2rM5mHXA
Some platforms have the capability to configure the performance state of
their power domains. The process of configuring the performance state is
pretty much platform dependent and we may need to work with a wide range
of configurables. For some platforms, like Qcom, it can be a positive
integer value alone, while in other cases it can be voltage levels, etc.
The power-domain framework until now was only designed for the idle
state management of the device and this needs to change in order to
reuse the power-domain framework for active state management of the
devices.
This patch adds DT bindings to describe the performance states of a
power domain. The power domain node needs to contain a
"performance-states" node, which itself is an array of per-state nodes.
Each per-state node represents individual performance state of a device.
Individual nodes are identified by their (mandatory) "reg" field. These
nodes can also contain an optional "domain-microvolt" property. More
properties can be added later on once we have more platforms using it.
If the consumers don't need the capability of switching to different
domain performance states at runtime, then they can simply define their
required domain performance state in their node directly using the
"domain-performance-state" property. Otherwise the consumers can define
their requirements with help of other infrastructure, for example the
OPP table (added in a later commit).
Signed-off-by: Viresh Kumar <viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Tested-by: Rajendra Nayak <rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
---
.../devicetree/bindings/power/power_domain.txt | 67 ++++++++++++++++++++++
1 file changed, 67 insertions(+)
diff --git a/Documentation/devicetree/bindings/power/power_domain.txt b/Documentation/devicetree/bindings/power/power_domain.txt
index 723e1ad937da..9be09e576f68 100644
--- a/Documentation/devicetree/bindings/power/power_domain.txt
+++ b/Documentation/devicetree/bindings/power/power_domain.txt
@@ -38,6 +38,33 @@ phandle arguments (so called PM domain specifiers) of length specified by the
domain's idle states. In the absence of this property, the domain would be
considered as capable of being powered-on or powered-off.
+- performance-states : This describes the performance states of a PM domain.
+ The performance-states node reflects the performance states of this PM domain
+ and not the performance states of the devices or sub-domains in the PM domain.
+ Sub domains can have their own performance states. Sub domains without their
+ own performance states are governed by the performance states of the parent
+ domain and the "domain-performance-state" properties of their consumers refer
+ to the "reg" properties of the nodes in the parent domain.
+
+ Required properties of the performance-states node:
+ - compatible: Allow performance states to express their compatibility. It
+ should be: "domain-performance-state".
+
+ - nodes: The performance-states node should contain one or
+ more nodes, each representing a supported performance state.
+
+ Required properties of the performance state nodes:
+ - reg: A positive integer value representing the performance level
+ associated with a performance state. The integer value '0' represents the
+ lowest performance level and the highest value represents the highest
+ performance level. The exact meaning and performance implications of
+ individual values is left to be defined by the user platform.
+
+ Optional properties of performance state nodes:
+ - domain-microvolt: voltage in micro Volts. A single regulator's voltage is
+ specified with an array of size one or three. Single entry is for target
+ voltage and three entries are for <target min max> voltages.
+
Example:
power: power-controller@12340000 {
@@ -118,4 +145,44 @@ The node above defines a typical PM domain consumer device, which is located
inside a PM domain with index 0 of a power controller represented by a node
with the label "power".
+Optional properties:
+- domain-performance-state: A positive integer value representing the minimum
+ performance level (of the parent domain) required by the consumer for its
+ working. The integer value '0' represents the lowest performance level and the
+ highest value represents the highest performance level. The value of
+ domain-performance-state field should match one of the "reg" fields in the
+ "performance-states" table of the parent power domain.
+
+
+Example:
+
+ parent: power-controller@12340000 {
+ compatible = "foo,power-controller";
+ reg = <0x12340000 0x1000>;
+ #power-domain-cells = <0>;
+
+ performance-states {
+ compatible = "domain-performance-state";
+ pstate@1 {
+ reg = <1>;
+ domain-microvolt = <970000 975000 985000>;
+ };
+ pstate@2 {
+ reg = <2>;
+ domain-microvolt = <1000000 1075000 1085000>;
+ };
+ pstate@3 {
+ reg = <3>;
+ domain-microvolt = <1100000 1175000 1185000>;
+ };
+ };
+ };
+
+ leaky-device@12350000 {
+ compatible = "foo,i-leak-current";
+ reg = <0x12350000 0x1000>;
+ power-domains = <&power 0>;
+ domain-performance-state = <2>;
+ };
+
[1]. Documentation/devicetree/bindings/power/domain-idle-state.txt
--
2.7.1.410.g6faf27b
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes
[not found] ` <cover.1487926924.git.viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-02-24 9:06 ` [PATCH V3 1/7] PM / Domains: Introduce "performance-states" binding Viresh Kumar
@ 2017-02-24 9:06 ` Viresh Kumar
[not found] ` <ceb1bf5f696138c30b30743c24b619336d438d7c.1487926924.git.viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
1 sibling, 1 reply; 17+ messages in thread
From: Viresh Kumar @ 2017-02-24 9:06 UTC (permalink / raw)
To: Rafael Wysocki, ulf.hansson-QSEj5FYQhm4dnm+yROfE0A, Kevin Hilman,
Viresh Kumar, Nishanth Menon, Stephen Boyd
Cc: linaro-kernel-cunTk1MwBs8s++Sfvej+rw,
linux-pm-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Vincent Guittot,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, lina.iyer-QSEj5FYQhm4dnm+yROfE0A,
rnayak-sgV2jX0FEOL9JmXXK+q4OQ, Viresh Kumar,
devicetree-u79uwXL29TY76Z2rM5mHXA
If the consumers don't need the capability of switching to different
domain performance states at runtime, then they can simply define their
required domain performance state in their nodes directly.
But if the device needs the capability of switching to different domain
performance states, as they may need to support different clock rates,
then the per OPP node can be used to contain that information.
This patch introduces the domain-performance-state (already defined by
Power Domain bindings) to the per OPP node.
Signed-off-by: Viresh Kumar <viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Tested-by: Rajendra Nayak <rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
---
Documentation/devicetree/bindings/opp/opp.txt | 64 +++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/Documentation/devicetree/bindings/opp/opp.txt b/Documentation/devicetree/bindings/opp/opp.txt
index 9f5ca4457b5f..7f6bb52521b6 100644
--- a/Documentation/devicetree/bindings/opp/opp.txt
+++ b/Documentation/devicetree/bindings/opp/opp.txt
@@ -154,6 +154,15 @@ properties.
- status: Marks the node enabled/disabled.
+- domain-performance-state: A positive integer value representing the minimum
+ performance level (of the parent domain) required by the consumer as defined
+ by ../power/power_domain.txt binding document. The OPP nodes can contain the
+ "domain-performance-state" property, only if the device node contains a
+ "power-domains" property. The OPP nodes aren't allowed to contain the
+ "domain-performance-state" property partially, i.e. Either all OPP nodes in
+ the OPP table have the "domain-performance-state" property or none of them
+ have it.
+
Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states together.
/ {
@@ -528,3 +537,58 @@ Example 5: opp-supported-hw
};
};
};
+
+Example 7: domain-Performance-state:
+(example: For 1GHz require domain state 1 and for 1.1 & 1.2 GHz require state 2)
+
+/ {
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ domain-performance-state = <1>;
+ };
+ opp@1100000000 {
+ opp-hz = /bits/ 64 <1100000000>;
+ domain-performance-state = <2>;
+ };
+ opp@1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ domain-performance-state = <2>;
+ };
+ };
+
+ foo_domain: power-controller@12340000 {
+ compatible = "foo,power-controller";
+ reg = <0x12340000 0x1000>;
+ #power-domain-cells = <0>;
+
+ performance-states {
+ compatible = "domain-performance-state";
+ pstate@1 {
+ reg = <1>;
+ domain-microvolt = <970000 975000 985000>;
+ };
+ pstate@2 {
+ reg = <2>;
+ domain-microvolt = <1000000 1075000 1085000>;
+ };
+ };
+ }
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "arm,cortex-a9";
+ reg = <0>;
+ clocks = <&clk_controller 0>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
+ power-domains = <&foo_domain>;
+ };
+ };
+};
--
2.7.1.410.g6faf27b
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH V3 1/7] PM / Domains: Introduce "performance-states" binding
[not found] ` <132e9200102bf2f1175567f0862596d098363d9e.1487926924.git.viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
@ 2017-02-28 0:31 ` Rob Herring
2017-02-28 5:36 ` Viresh Kumar
0 siblings, 1 reply; 17+ messages in thread
From: Rob Herring @ 2017-02-28 0:31 UTC (permalink / raw)
To: Viresh Kumar
Cc: Rafael Wysocki, ulf.hansson-QSEj5FYQhm4dnm+yROfE0A, Kevin Hilman,
linaro-kernel-cunTk1MwBs8s++Sfvej+rw,
linux-pm-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Stephen Boyd, Nishanth Menon,
Vincent Guittot, lina.iyer-QSEj5FYQhm4dnm+yROfE0A,
rnayak-sgV2jX0FEOL9JmXXK+q4OQ, devicetree-u79uwXL29TY76Z2rM5mHXA
On Fri, Feb 24, 2017 at 02:36:33PM +0530, Viresh Kumar wrote:
> Some platforms have the capability to configure the performance state of
> their power domains. The process of configuring the performance state is
> pretty much platform dependent and we may need to work with a wide range
> of configurables. For some platforms, like Qcom, it can be a positive
> integer value alone, while in other cases it can be voltage levels, etc.
>
> The power-domain framework until now was only designed for the idle
> state management of the device and this needs to change in order to
> reuse the power-domain framework for active state management of the
> devices.
>
> This patch adds DT bindings to describe the performance states of a
> power domain. The power domain node needs to contain a
> "performance-states" node, which itself is an array of per-state nodes.
> Each per-state node represents individual performance state of a device.
> Individual nodes are identified by their (mandatory) "reg" field. These
> nodes can also contain an optional "domain-microvolt" property. More
> properties can be added later on once we have more platforms using it.
>
> If the consumers don't need the capability of switching to different
> domain performance states at runtime, then they can simply define their
> required domain performance state in their node directly using the
> "domain-performance-state" property. Otherwise the consumers can define
> their requirements with help of other infrastructure, for example the
> OPP table (added in a later commit).
>
> Signed-off-by: Viresh Kumar <viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> Tested-by: Rajendra Nayak <rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> ---
> .../devicetree/bindings/power/power_domain.txt | 67 ++++++++++++++++++++++
> 1 file changed, 67 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/power/power_domain.txt b/Documentation/devicetree/bindings/power/power_domain.txt
> index 723e1ad937da..9be09e576f68 100644
> --- a/Documentation/devicetree/bindings/power/power_domain.txt
> +++ b/Documentation/devicetree/bindings/power/power_domain.txt
> @@ -38,6 +38,33 @@ phandle arguments (so called PM domain specifiers) of length specified by the
> domain's idle states. In the absence of this property, the domain would be
> considered as capable of being powered-on or powered-off.
>
> +- performance-states : This describes the performance states of a PM domain.
> + The performance-states node reflects the performance states of this PM domain
> + and not the performance states of the devices or sub-domains in the PM domain.
> + Sub domains can have their own performance states. Sub domains without their
> + own performance states are governed by the performance states of the parent
> + domain and the "domain-performance-state" properties of their consumers refer
> + to the "reg" properties of the nodes in the parent domain.
> +
> + Required properties of the performance-states node:
> + - compatible: Allow performance states to express their compatibility. It
> + should be: "domain-performance-state".
> +
> + - nodes: The performance-states node should contain one or
> + more nodes, each representing a supported performance state.
> +
> + Required properties of the performance state nodes:
> + - reg: A positive integer value representing the performance level
> + associated with a performance state. The integer value '0' represents the
> + lowest performance level and the highest value represents the highest
> + performance level. The exact meaning and performance implications of
> + individual values is left to be defined by the user platform.
> +
> + Optional properties of performance state nodes:
> + - domain-microvolt: voltage in micro Volts. A single regulator's voltage is
> + specified with an array of size one or three. Single entry is for target
> + voltage and three entries are for <target min max> voltages.
> +
> Example:
>
> power: power-controller@12340000 {
> @@ -118,4 +145,44 @@ The node above defines a typical PM domain consumer device, which is located
> inside a PM domain with index 0 of a power controller represented by a node
> with the label "power".
>
> +Optional properties:
> +- domain-performance-state: A positive integer value representing the minimum
> + performance level (of the parent domain) required by the consumer for its
> + working. The integer value '0' represents the lowest performance level and the
> + highest value represents the highest performance level. The value of
> + domain-performance-state field should match one of the "reg" fields in the
> + "performance-states" table of the parent power domain.
> +
> +
> +Example:
> +
> + parent: power-controller@12340000 {
> + compatible = "foo,power-controller";
> + reg = <0x12340000 0x1000>;
> + #power-domain-cells = <0>;
> +
> + performance-states {
> + compatible = "domain-performance-state";
> + pstate@1 {
> + reg = <1>;
> + domain-microvolt = <970000 975000 985000>;
This doesn't look like "<target> <min> <max>".
With that fixed,
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> + };
> + pstate@2 {
> + reg = <2>;
> + domain-microvolt = <1000000 1075000 1085000>;
> + };
> + pstate@3 {
> + reg = <3>;
> + domain-microvolt = <1100000 1175000 1185000>;
> + };
> + };
> + };
> +
> + leaky-device@12350000 {
> + compatible = "foo,i-leak-current";
> + reg = <0x12350000 0x1000>;
> + power-domains = <&power 0>;
> + domain-performance-state = <2>;
> + };
> +
> [1]. Documentation/devicetree/bindings/power/domain-idle-state.txt
> --
> 2.7.1.410.g6faf27b
>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes
[not found] ` <ceb1bf5f696138c30b30743c24b619336d438d7c.1487926924.git.viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
@ 2017-02-28 0:39 ` Rob Herring
2017-02-28 6:57 ` Viresh Kumar
0 siblings, 1 reply; 17+ messages in thread
From: Rob Herring @ 2017-02-28 0:39 UTC (permalink / raw)
To: Viresh Kumar
Cc: Rafael Wysocki, ulf.hansson-QSEj5FYQhm4dnm+yROfE0A, Kevin Hilman,
Viresh Kumar, Nishanth Menon, Stephen Boyd,
linaro-kernel-cunTk1MwBs8s++Sfvej+rw,
linux-pm-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Vincent Guittot,
lina.iyer-QSEj5FYQhm4dnm+yROfE0A, rnayak-sgV2jX0FEOL9JmXXK+q4OQ,
devicetree-u79uwXL29TY76Z2rM5mHXA
On Fri, Feb 24, 2017 at 02:36:34PM +0530, Viresh Kumar wrote:
> If the consumers don't need the capability of switching to different
> domain performance states at runtime, then they can simply define their
> required domain performance state in their nodes directly.
>
> But if the device needs the capability of switching to different domain
> performance states, as they may need to support different clock rates,
> then the per OPP node can be used to contain that information.
>
> This patch introduces the domain-performance-state (already defined by
> Power Domain bindings) to the per OPP node.
>
We already have OPP voltages, why are those not sufficient?
> Signed-off-by: Viresh Kumar <viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> Tested-by: Rajendra Nayak <rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> ---
> Documentation/devicetree/bindings/opp/opp.txt | 64 +++++++++++++++++++++++++++
> 1 file changed, 64 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/opp/opp.txt b/Documentation/devicetree/bindings/opp/opp.txt
> index 9f5ca4457b5f..7f6bb52521b6 100644
> --- a/Documentation/devicetree/bindings/opp/opp.txt
> +++ b/Documentation/devicetree/bindings/opp/opp.txt
> @@ -154,6 +154,15 @@ properties.
>
> - status: Marks the node enabled/disabled.
>
> +- domain-performance-state: A positive integer value representing the minimum
> + performance level (of the parent domain) required by the consumer as defined
> + by ../power/power_domain.txt binding document. The OPP nodes can contain the
> + "domain-performance-state" property, only if the device node contains a
> + "power-domains" property. The OPP nodes aren't allowed to contain the
> + "domain-performance-state" property partially, i.e. Either all OPP nodes in
> + the OPP table have the "domain-performance-state" property or none of them
> + have it.
> +
> Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states together.
>
> / {
> @@ -528,3 +537,58 @@ Example 5: opp-supported-hw
> };
> };
> };
> +
> +Example 7: domain-Performance-state:
> +(example: For 1GHz require domain state 1 and for 1.1 & 1.2 GHz require state 2)
> +
> +/ {
> + cpu0_opp_table: opp_table0 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp@1000000000 {
> + opp-hz = /bits/ 64 <1000000000>;
> + domain-performance-state = <1>;
Thinking about this some more, there's a problem here that you have no
link to foo_domain. I guess that resides in the cpu's node?
Perhaps instead of a number, this should be a phandle to pstate@1. Then
you just get the parent if you need to know the domain.
> + };
> + opp@1100000000 {
> + opp-hz = /bits/ 64 <1100000000>;
> + domain-performance-state = <2>;
> + };
> + opp@1200000000 {
> + opp-hz = /bits/ 64 <1200000000>;
> + domain-performance-state = <2>;
> + };
> + };
> +
> + foo_domain: power-controller@12340000 {
> + compatible = "foo,power-controller";
> + reg = <0x12340000 0x1000>;
> + #power-domain-cells = <0>;
> +
> + performance-states {
> + compatible = "domain-performance-state";
> + pstate@1 {
> + reg = <1>;
> + domain-microvolt = <970000 975000 985000>;
> + };
> + pstate@2 {
> + reg = <2>;
> + domain-microvolt = <1000000 1075000 1085000>;
> + };
> + };
> + }
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + compatible = "arm,cortex-a9";
> + reg = <0>;
> + clocks = <&clk_controller 0>;
> + clock-names = "cpu";
> + operating-points-v2 = <&cpu0_opp_table>;
> + power-domains = <&foo_domain>;
> + };
> + };
> +};
> --
> 2.7.1.410.g6faf27b
>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH V3 1/7] PM / Domains: Introduce "performance-states" binding
2017-02-28 0:31 ` Rob Herring
@ 2017-02-28 5:36 ` Viresh Kumar
0 siblings, 0 replies; 17+ messages in thread
From: Viresh Kumar @ 2017-02-28 5:36 UTC (permalink / raw)
To: Rob Herring
Cc: Rafael Wysocki, ulf.hansson-QSEj5FYQhm4dnm+yROfE0A, Kevin Hilman,
linaro-kernel-cunTk1MwBs8s++Sfvej+rw,
linux-pm-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Stephen Boyd, Nishanth Menon,
Vincent Guittot, lina.iyer-QSEj5FYQhm4dnm+yROfE0A,
rnayak-sgV2jX0FEOL9JmXXK+q4OQ, devicetree-u79uwXL29TY76Z2rM5mHXA
On 27-02-17, 18:31, Rob Herring wrote:
> On Fri, Feb 24, 2017 at 02:36:33PM +0530, Viresh Kumar wrote:
> > Some platforms have the capability to configure the performance state of
> > their power domains. The process of configuring the performance state is
> > pretty much platform dependent and we may need to work with a wide range
> > of configurables. For some platforms, like Qcom, it can be a positive
> > integer value alone, while in other cases it can be voltage levels, etc.
> >
> > The power-domain framework until now was only designed for the idle
> > state management of the device and this needs to change in order to
> > reuse the power-domain framework for active state management of the
> > devices.
> >
> > This patch adds DT bindings to describe the performance states of a
> > power domain. The power domain node needs to contain a
> > "performance-states" node, which itself is an array of per-state nodes.
> > Each per-state node represents individual performance state of a device.
> > Individual nodes are identified by their (mandatory) "reg" field. These
> > nodes can also contain an optional "domain-microvolt" property. More
> > properties can be added later on once we have more platforms using it.
> >
> > If the consumers don't need the capability of switching to different
> > domain performance states at runtime, then they can simply define their
> > required domain performance state in their node directly using the
> > "domain-performance-state" property. Otherwise the consumers can define
> > their requirements with help of other infrastructure, for example the
> > OPP table (added in a later commit).
> >
> > Signed-off-by: Viresh Kumar <viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> > Tested-by: Rajendra Nayak <rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> > ---
> > .../devicetree/bindings/power/power_domain.txt | 67 ++++++++++++++++++++++
> > 1 file changed, 67 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/power/power_domain.txt b/Documentation/devicetree/bindings/power/power_domain.txt
> > index 723e1ad937da..9be09e576f68 100644
> > --- a/Documentation/devicetree/bindings/power/power_domain.txt
> > +++ b/Documentation/devicetree/bindings/power/power_domain.txt
> > @@ -38,6 +38,33 @@ phandle arguments (so called PM domain specifiers) of length specified by the
> > domain's idle states. In the absence of this property, the domain would be
> > considered as capable of being powered-on or powered-off.
> >
> > +- performance-states : This describes the performance states of a PM domain.
> > + The performance-states node reflects the performance states of this PM domain
> > + and not the performance states of the devices or sub-domains in the PM domain.
> > + Sub domains can have their own performance states. Sub domains without their
> > + own performance states are governed by the performance states of the parent
> > + domain and the "domain-performance-state" properties of their consumers refer
> > + to the "reg" properties of the nodes in the parent domain.
> > +
> > + Required properties of the performance-states node:
> > + - compatible: Allow performance states to express their compatibility. It
> > + should be: "domain-performance-state".
> > +
> > + - nodes: The performance-states node should contain one or
> > + more nodes, each representing a supported performance state.
> > +
> > + Required properties of the performance state nodes:
> > + - reg: A positive integer value representing the performance level
> > + associated with a performance state. The integer value '0' represents the
> > + lowest performance level and the highest value represents the highest
> > + performance level. The exact meaning and performance implications of
> > + individual values is left to be defined by the user platform.
> > +
> > + Optional properties of performance state nodes:
> > + - domain-microvolt: voltage in micro Volts. A single regulator's voltage is
> > + specified with an array of size one or three. Single entry is for target
> > + voltage and three entries are for <target min max> voltages.
> > +
> > Example:
> >
> > power: power-controller@12340000 {
> > @@ -118,4 +145,44 @@ The node above defines a typical PM domain consumer device, which is located
> > inside a PM domain with index 0 of a power controller represented by a node
> > with the label "power".
> >
> > +Optional properties:
> > +- domain-performance-state: A positive integer value representing the minimum
> > + performance level (of the parent domain) required by the consumer for its
> > + working. The integer value '0' represents the lowest performance level and the
> > + highest value represents the highest performance level. The value of
> > + domain-performance-state field should match one of the "reg" fields in the
> > + "performance-states" table of the parent power domain.
> > +
> > +
> > +Example:
> > +
> > + parent: power-controller@12340000 {
> > + compatible = "foo,power-controller";
> > + reg = <0x12340000 0x1000>;
> > + #power-domain-cells = <0>;
> > +
> > + performance-states {
> > + compatible = "domain-performance-state";
> > + pstate@1 {
> > + reg = <1>;
> > + domain-microvolt = <970000 975000 985000>;
>
> This doesn't look like "<target> <min> <max>".
Wow, even the examples in the OPP document have these screwed up :(
> With that fixed,
>
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Thanks.
--
viresh
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes
2017-02-28 0:39 ` Rob Herring
@ 2017-02-28 6:57 ` Viresh Kumar
2017-02-28 14:10 ` Rob Herring
0 siblings, 1 reply; 17+ messages in thread
From: Viresh Kumar @ 2017-02-28 6:57 UTC (permalink / raw)
To: Rob Herring
Cc: Rafael Wysocki, ulf.hansson-QSEj5FYQhm4dnm+yROfE0A, Kevin Hilman,
Viresh Kumar, Nishanth Menon, Stephen Boyd,
linaro-kernel-cunTk1MwBs8s++Sfvej+rw,
linux-pm-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Vincent Guittot,
lina.iyer-QSEj5FYQhm4dnm+yROfE0A, rnayak-sgV2jX0FEOL9JmXXK+q4OQ,
devicetree-u79uwXL29TY76Z2rM5mHXA
On 27-02-17, 18:39, Rob Herring wrote:
> On Fri, Feb 24, 2017 at 02:36:34PM +0530, Viresh Kumar wrote:
> > If the consumers don't need the capability of switching to different
> > domain performance states at runtime, then they can simply define their
> > required domain performance state in their nodes directly.
> >
> > But if the device needs the capability of switching to different domain
> > performance states, as they may need to support different clock rates,
> > then the per OPP node can be used to contain that information.
> >
> > This patch introduces the domain-performance-state (already defined by
> > Power Domain bindings) to the per OPP node.
> >
>
> We already have OPP voltages, why are those not sufficient?
Those are for the regulator that ONLY controls the device, and
domain-performance-state belongs to the parent domain which controls many
devices.
> > +Example 7: domain-Performance-state:
> > +(example: For 1GHz require domain state 1 and for 1.1 & 1.2 GHz require state 2)
> > +
> > +/ {
> > + cpu0_opp_table: opp_table0 {
> > + compatible = "operating-points-v2";
> > + opp-shared;
> > +
> > + opp@1000000000 {
> > + opp-hz = /bits/ 64 <1000000000>;
>
> Thinking about this some more, there's a problem here that you have no
> link to foo_domain. I guess that resides in the cpu's node?
Right, the "cpus" node below demonstrates that.
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu@0 {
> > + compatible = "arm,cortex-a9";
> > + reg = <0>;
> > + clocks = <&clk_controller 0>;
> > + clock-names = "cpu";
> > + operating-points-v2 = <&cpu0_opp_table>;
> > + power-domains = <&foo_domain>;
> > + };
> > + };
> > +};
> > + domain-performance-state = <1>;
> Perhaps instead of a number, this should be a phandle to pstate@1. Then
> you just get the parent if you need to know the domain.
That's what I did in V2, but then I turned it down considering the parent/child
relationships we may have.
There are multiple cases we can have:
A.) DeviceX ---> Parent-domain-1 (Contains Perfomance states)
B.) DeviceX ---> Parent-domain-1 ---> Parent domain-2 (Contains Perfomance states)
---> Parent domain-2 (Contains Perfomance states)
|
|
C.) DeviceX ---> Parent-domain-1 |
|
|
---> Parent domain-3 (Contains Perfomance states)
The case A.) represents a simple case where the parent domain of the device
contains the performance states. The phandle can work pretty well in this case.
But the other cases B.) and C.) are a bit complicated as the direct parent
domain doesn't allow changing the performance states, but its parents. And so I
went ahead with numbers instead of phandles. Yes, we will still be able to get
to the performance state node with the help of phandles, but will that be the
right thing to do ?
--
viresh
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes
2017-02-28 6:57 ` Viresh Kumar
@ 2017-02-28 14:10 ` Rob Herring
[not found] ` <CAL_JsqLx6Y=JgaVtJPFwERQ_=5qwqp5EY1+B=cdfBJO55Vct4w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-03-01 6:12 ` Viresh Kumar
0 siblings, 2 replies; 17+ messages in thread
From: Rob Herring @ 2017-02-28 14:10 UTC (permalink / raw)
To: Viresh Kumar
Cc: Rafael Wysocki, Ulf Hansson, Kevin Hilman, Viresh Kumar,
Nishanth Menon, Stephen Boyd,
linaro-kernel-cunTk1MwBs8s++Sfvej+rw@public.gmane.org,
linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Vincent Guittot, Lina Iyer, Rajendra Nayak,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
On Tue, Feb 28, 2017 at 12:57 AM, Viresh Kumar <viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
> On 27-02-17, 18:39, Rob Herring wrote:
>> On Fri, Feb 24, 2017 at 02:36:34PM +0530, Viresh Kumar wrote:
>> > If the consumers don't need the capability of switching to different
>> > domain performance states at runtime, then they can simply define their
>> > required domain performance state in their nodes directly.
>> >
>> > But if the device needs the capability of switching to different domain
>> > performance states, as they may need to support different clock rates,
>> > then the per OPP node can be used to contain that information.
>> >
>> > This patch introduces the domain-performance-state (already defined by
>> > Power Domain bindings) to the per OPP node.
>> >
>>
>> We already have OPP voltages, why are those not sufficient?
>
> Those are for the regulator that ONLY controls the device, and
> domain-performance-state belongs to the parent domain which controls many
> devices.
>
>> > +Example 7: domain-Performance-state:
>> > +(example: For 1GHz require domain state 1 and for 1.1 & 1.2 GHz require state 2)
>> > +
>> > +/ {
>> > + cpu0_opp_table: opp_table0 {
>> > + compatible = "operating-points-v2";
>> > + opp-shared;
>> > +
>> > + opp@1000000000 {
>> > + opp-hz = /bits/ 64 <1000000000>;
>>
>> Thinking about this some more, there's a problem here that you have no
>> link to foo_domain. I guess that resides in the cpu's node?
>
> Right, the "cpus" node below demonstrates that.
>
>> > + cpus {
>> > + #address-cells = <1>;
>> > + #size-cells = <0>;
>> > +
>> > + cpu@0 {
>> > + compatible = "arm,cortex-a9";
>> > + reg = <0>;
>> > + clocks = <&clk_controller 0>;
>> > + clock-names = "cpu";
>> > + operating-points-v2 = <&cpu0_opp_table>;
>> > + power-domains = <&foo_domain>;
>> > + };
>> > + };
>> > +};
>
>> > + domain-performance-state = <1>;
>
>> Perhaps instead of a number, this should be a phandle to pstate@1. Then
>> you just get the parent if you need to know the domain.
>
> That's what I did in V2, but then I turned it down considering the parent/child
> relationships we may have.
>
> There are multiple cases we can have:
>
> A.) DeviceX ---> Parent-domain-1 (Contains Perfomance states)
>
> B.) DeviceX ---> Parent-domain-1 ---> Parent domain-2 (Contains Perfomance states)
>
> ---> Parent domain-2 (Contains Perfomance states)
> |
> |
> C.) DeviceX ---> Parent-domain-1 |
> |
> |
> ---> Parent domain-3 (Contains Perfomance states)
I'm a bit confused. How does a domain have 2 parent domains?
You have the same problem either way. If I have performance state 2
for the device, that corresponds to domain 2 or 3?
> The case A.) represents a simple case where the parent domain of the device
> contains the performance states. The phandle can work pretty well in this case.
> But the other cases B.) and C.) are a bit complicated as the direct parent
> domain doesn't allow changing the performance states, but its parents. And so I
> went ahead with numbers instead of phandles. Yes, we will still be able to get
> to the performance state node with the help of phandles, but will that be the
> right thing to do ?
>
> --
> viresh
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes
[not found] ` <CAL_JsqLx6Y=JgaVtJPFwERQ_=5qwqp5EY1+B=cdfBJO55Vct4w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-02-28 15:14 ` Ulf Hansson
[not found] ` <CAPDyKFo5TjTa-hTzNp5KCpozU87L22piCXaSjWMTr4xVkgP+Pg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 17+ messages in thread
From: Ulf Hansson @ 2017-02-28 15:14 UTC (permalink / raw)
To: Rob Herring
Cc: Viresh Kumar, Rafael Wysocki, Kevin Hilman, Viresh Kumar,
Nishanth Menon, Stephen Boyd,
linaro-kernel-cunTk1MwBs8s++Sfvej+rw@public.gmane.org,
linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Vincent Guittot, Lina Iyer, Rajendra Nayak,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
[...]
>> ---> Parent domain-2 (Contains Perfomance states)
>> |
>> |
>> C.) DeviceX ---> Parent-domain-1 |
>> |
>> |
>> ---> Parent domain-3 (Contains Perfomance states)
>
> I'm a bit confused. How does a domain have 2 parent domains?
This comes from the early design of the generic PM domain, thus I
assume we have some HW with such complex PM topology. However, I don't
know if it is actually being used.
Moreover, the corresponding DT bindings for "power-domains" parents,
can easily be extended to cover more than one parent. See more in
Documentation/devicetree/bindings/power/power_domain.txt
[...]
Kind regards
Uffe
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes
[not found] ` <CAPDyKFo5TjTa-hTzNp5KCpozU87L22piCXaSjWMTr4xVkgP+Pg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-02-28 15:52 ` Rob Herring
2017-02-28 19:13 ` Geert Uytterhoeven
` (2 more replies)
0 siblings, 3 replies; 17+ messages in thread
From: Rob Herring @ 2017-02-28 15:52 UTC (permalink / raw)
To: Ulf Hansson
Cc: Viresh Kumar, Rafael Wysocki, Kevin Hilman, Viresh Kumar,
Nishanth Menon, Stephen Boyd,
linaro-kernel-cunTk1MwBs8s++Sfvej+rw@public.gmane.org,
linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Vincent Guittot, Lina Iyer, Rajendra Nayak,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
On Tue, Feb 28, 2017 at 9:14 AM, Ulf Hansson <ulf.hansson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
> [...]
>
>>> ---> Parent domain-2 (Contains Perfomance states)
>>> |
>>> |
>>> C.) DeviceX ---> Parent-domain-1 |
>>> |
>>> |
>>> ---> Parent domain-3 (Contains Perfomance states)
>>
>> I'm a bit confused. How does a domain have 2 parent domains?
>
> This comes from the early design of the generic PM domain, thus I
> assume we have some HW with such complex PM topology. However, I don't
> know if it is actually being used.
>
> Moreover, the corresponding DT bindings for "power-domains" parents,
> can easily be extended to cover more than one parent. See more in
> Documentation/devicetree/bindings/power/power_domain.txt
I could easily see device having 2 power domains. For example a cpu
may have separate domains for RAM/caches and logic. And nesting of
power domains is certainly common, but a power domain being contained
in 2 different parents? I don't even see how that is possible in the
physical design. Now if we're mixing PM and power domains again and
the cpu device is pointing to the cpu PM domain which contains 2 power
domains, then certainly that is possible.
Rob
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes
2017-02-28 15:52 ` Rob Herring
@ 2017-02-28 19:13 ` Geert Uytterhoeven
2017-03-01 6:14 ` Viresh Kumar
2017-03-01 6:27 ` Rajendra Nayak
2 siblings, 0 replies; 17+ messages in thread
From: Geert Uytterhoeven @ 2017-02-28 19:13 UTC (permalink / raw)
To: Rob Herring
Cc: Ulf Hansson, Viresh Kumar, Rafael Wysocki, Kevin Hilman,
Viresh Kumar, Nishanth Menon, Stephen Boyd,
linaro-kernel@lists.linaro.org, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org, Vincent Guittot, Lina Iyer,
Rajendra Nayak, devicetree@vger.kernel.org
Hi Rob,
On Tue, Feb 28, 2017 at 4:52 PM, Rob Herring <robh@kernel.org> wrote:
> On Tue, Feb 28, 2017 at 9:14 AM, Ulf Hansson <ulf.hansson@linaro.org> wrote:
>> [...]
>>
>>>> ---> Parent domain-2 (Contains Perfomance states)
>>>> |
>>>> |
>>>> C.) DeviceX ---> Parent-domain-1 |
>>>> |
>>>> |
>>>> ---> Parent domain-3 (Contains Perfomance states)
>>>
>>> I'm a bit confused. How does a domain have 2 parent domains?
>>
>> This comes from the early design of the generic PM domain, thus I
>> assume we have some HW with such complex PM topology. However, I don't
>> know if it is actually being used.
>>
>> Moreover, the corresponding DT bindings for "power-domains" parents,
>> can easily be extended to cover more than one parent. See more in
>> Documentation/devicetree/bindings/power/power_domain.txt
>
> I could easily see device having 2 power domains. For example a cpu
> may have separate domains for RAM/caches and logic. And nesting of
> power domains is certainly common, but a power domain being contained
> in 2 different parents? I don't even see how that is possible in the
> physical design. Now if we're mixing PM and power domains again and
> the cpu device is pointing to the cpu PM domain which contains 2 power
> domains, then certainly that is possible.
One of them could be a power area, the other a clock domain.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes
2017-02-28 14:10 ` Rob Herring
[not found] ` <CAL_JsqLx6Y=JgaVtJPFwERQ_=5qwqp5EY1+B=cdfBJO55Vct4w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-03-01 6:12 ` Viresh Kumar
1 sibling, 0 replies; 17+ messages in thread
From: Viresh Kumar @ 2017-03-01 6:12 UTC (permalink / raw)
To: Rob Herring
Cc: Rafael Wysocki, Ulf Hansson, Kevin Hilman, Viresh Kumar,
Nishanth Menon, Stephen Boyd, linaro-kernel@lists.linaro.org,
linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
Vincent Guittot, Lina Iyer, Rajendra Nayak,
devicetree@vger.kernel.org
On 28-02-17, 08:10, Rob Herring wrote:
> On Tue, Feb 28, 2017 at 12:57 AM, Viresh Kumar <viresh.kumar@linaro.org> wrote:
> > That's what I did in V2, but then I turned it down considering the parent/child
> > relationships we may have.
> >
> > There are multiple cases we can have:
> >
> > A.) DeviceX ---> Parent-domain-1 (Contains Perfomance states)
> >
> > B.) DeviceX ---> Parent-domain-1 ---> Parent domain-2 (Contains Perfomance states)
Okay, how about this case first? Should we still use a phandle or an index
value?
> >
> > ---> Parent domain-2 (Contains Perfomance states)
> > |
> > |
> > C.) DeviceX ---> Parent-domain-1 |
> > |
> > |
> > ---> Parent domain-3 (Contains Perfomance states)
>
> I'm a bit confused. How does a domain have 2 parent domains?
The framework supported it and so I thought it should be fairly common. Even in
the last version, I coded the notifier to handle cases where we have only one
parent domain. But then Kevin pointed out that we shouldn't be doing any such
special things. But binding doesn't say anything about it though, and I was just
presenting an example.
> You have the same problem either way. If I have performance state 2
> for the device, that corresponds to domain 2 or 3?
Right now I have used the same performance state for both the domains in the
code, as I am not sure if we will have such a case. And probably we can figure
this out when we have a case with separate levels for both parents. It would be
trivial to extend the bindings to include a list instead of a single value here.
So, to conclude, should I use a phandle here or it is fine the way it is written
right now ? With direct numbers, its easy to parse it in the OPP framework for
example, as that's the value the QoS framework will use. Else we need to parse
the phandle and read the "reg" value from there.
--
viresh
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes
2017-02-28 15:52 ` Rob Herring
2017-02-28 19:13 ` Geert Uytterhoeven
@ 2017-03-01 6:14 ` Viresh Kumar
2017-03-01 8:45 ` Geert Uytterhoeven
2017-03-01 6:27 ` Rajendra Nayak
2 siblings, 1 reply; 17+ messages in thread
From: Viresh Kumar @ 2017-03-01 6:14 UTC (permalink / raw)
To: Rob Herring
Cc: Ulf Hansson, Rafael Wysocki, Kevin Hilman, Viresh Kumar,
Nishanth Menon, Stephen Boyd, linaro-kernel@lists.linaro.org,
linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
Vincent Guittot, Lina Iyer, Rajendra Nayak,
devicetree@vger.kernel.org
On 28-02-17, 09:52, Rob Herring wrote:
> On Tue, Feb 28, 2017 at 9:14 AM, Ulf Hansson <ulf.hansson@linaro.org> wrote:
> > This comes from the early design of the generic PM domain, thus I
> > assume we have some HW with such complex PM topology. However, I don't
> > know if it is actually being used.
> >
> > Moreover, the corresponding DT bindings for "power-domains" parents,
> > can easily be extended to cover more than one parent. See more in
> > Documentation/devicetree/bindings/power/power_domain.txt
>
> I could easily see device having 2 power domains. For example a cpu
> may have separate domains for RAM/caches and logic.
An important thing here is that PM domain doesn't support such devices. i.e. a
device isn't allowed to have multiple PM domains today. So a way to support such
devices can be to create a virtual PM domain, that has two parents and device as
its child.
--
viresh
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes
2017-02-28 15:52 ` Rob Herring
2017-02-28 19:13 ` Geert Uytterhoeven
2017-03-01 6:14 ` Viresh Kumar
@ 2017-03-01 6:27 ` Rajendra Nayak
2017-03-01 23:13 ` Rob Herring
2 siblings, 1 reply; 17+ messages in thread
From: Rajendra Nayak @ 2017-03-01 6:27 UTC (permalink / raw)
To: Rob Herring, Ulf Hansson
Cc: Viresh Kumar, Rafael Wysocki, Kevin Hilman, Viresh Kumar,
Nishanth Menon, Stephen Boyd, linaro-kernel@lists.linaro.org,
linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
Vincent Guittot, Lina Iyer, devicetree@vger.kernel.org,
Jon Hunter
On 02/28/2017 09:22 PM, Rob Herring wrote:
> On Tue, Feb 28, 2017 at 9:14 AM, Ulf Hansson <ulf.hansson@linaro.org> wrote:
>> [...]
>>
>>>> ---> Parent domain-2 (Contains Perfomance states)
>>>> |
>>>> |
>>>> C.) DeviceX ---> Parent-domain-1 |
>>>> |
>>>> |
>>>> ---> Parent domain-3 (Contains Perfomance states)
>>>
>>> I'm a bit confused. How does a domain have 2 parent domains?
>>
>> This comes from the early design of the generic PM domain, thus I
>> assume we have some HW with such complex PM topology. However, I don't
>> know if it is actually being used.
>>
>> Moreover, the corresponding DT bindings for "power-domains" parents,
>> can easily be extended to cover more than one parent. See more in
>> Documentation/devicetree/bindings/power/power_domain.txt
>
> I could easily see device having 2 power domains. For example a cpu
> may have separate domains for RAM/caches and logic. And nesting of
yet the bindings for power-domains (for consumer devices) only allows for
one powerdomain to be associated with a device.
> power domains is certainly common, but a power domain being contained
> in 2 different parents? I don't even see how that is possible in the
> physical design. Now if we're mixing PM and power domains again and
> the cpu device is pointing to the cpu PM domain which contains 2 power
> domains, then certainly that is possible.
>
> Rob
>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes
2017-03-01 6:14 ` Viresh Kumar
@ 2017-03-01 8:45 ` Geert Uytterhoeven
2017-03-01 8:54 ` Viresh Kumar
0 siblings, 1 reply; 17+ messages in thread
From: Geert Uytterhoeven @ 2017-03-01 8:45 UTC (permalink / raw)
To: Viresh Kumar
Cc: Rob Herring, Ulf Hansson, Rafael Wysocki, Kevin Hilman,
Viresh Kumar, Nishanth Menon, Stephen Boyd,
linaro-kernel@lists.linaro.org, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org, Vincent Guittot, Lina Iyer,
Rajendra Nayak, devicetree@vger.kernel.org
On Wed, Mar 1, 2017 at 7:14 AM, Viresh Kumar <viresh.kumar@linaro.org> wrote:
> On 28-02-17, 09:52, Rob Herring wrote:
>> On Tue, Feb 28, 2017 at 9:14 AM, Ulf Hansson <ulf.hansson@linaro.org> wrote:
>> > This comes from the early design of the generic PM domain, thus I
>> > assume we have some HW with such complex PM topology. However, I don't
>> > know if it is actually being used.
>> >
>> > Moreover, the corresponding DT bindings for "power-domains" parents,
>> > can easily be extended to cover more than one parent. See more in
>> > Documentation/devicetree/bindings/power/power_domain.txt
>>
>> I could easily see device having 2 power domains. For example a cpu
>> may have separate domains for RAM/caches and logic.
>
> An important thing here is that PM domain doesn't support such devices. i.e. a
> device isn't allowed to have multiple PM domains today. So a way to support such
> devices can be to create a virtual PM domain, that has two parents and device as
> its child.
As clock domains (and their support code) are fairly orthogonal to power
areas, currently our power area controller driver just forwards the
clock handling
to the clock driver (cfr. rcar-sysc).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes
2017-03-01 8:45 ` Geert Uytterhoeven
@ 2017-03-01 8:54 ` Viresh Kumar
0 siblings, 0 replies; 17+ messages in thread
From: Viresh Kumar @ 2017-03-01 8:54 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Rob Herring, Ulf Hansson, Rafael Wysocki, Kevin Hilman,
Viresh Kumar, Nishanth Menon, Stephen Boyd,
linaro-kernel@lists.linaro.org, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org, Vincent Guittot, Lina Iyer,
Rajendra Nayak, devicetree@vger.kernel.org
On 01-03-17, 09:45, Geert Uytterhoeven wrote:
> On Wed, Mar 1, 2017 at 7:14 AM, Viresh Kumar <viresh.kumar@linaro.org> wrote:
> > On 28-02-17, 09:52, Rob Herring wrote:
> >> On Tue, Feb 28, 2017 at 9:14 AM, Ulf Hansson <ulf.hansson@linaro.org> wrote:
> >> > This comes from the early design of the generic PM domain, thus I
> >> > assume we have some HW with such complex PM topology. However, I don't
> >> > know if it is actually being used.
> >> >
> >> > Moreover, the corresponding DT bindings for "power-domains" parents,
> >> > can easily be extended to cover more than one parent. See more in
> >> > Documentation/devicetree/bindings/power/power_domain.txt
> >>
> >> I could easily see device having 2 power domains. For example a cpu
> >> may have separate domains for RAM/caches and logic.
> >
> > An important thing here is that PM domain doesn't support such devices. i.e. a
> > device isn't allowed to have multiple PM domains today. So a way to support such
> > devices can be to create a virtual PM domain, that has two parents and device as
> > its child.
>
> As clock domains (and their support code) are fairly orthogonal to power
> areas, currently our power area controller driver just forwards the
> clock handling
> to the clock driver (cfr. rcar-sysc).
Perhaps Rajendra can explain better but Qcom have a case where they need to
program two power domains as well.
--
viresh
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes
2017-03-01 6:27 ` Rajendra Nayak
@ 2017-03-01 23:13 ` Rob Herring
2017-03-02 3:30 ` Rajendra Nayak
0 siblings, 1 reply; 17+ messages in thread
From: Rob Herring @ 2017-03-01 23:13 UTC (permalink / raw)
To: Rajendra Nayak
Cc: Ulf Hansson, Viresh Kumar, Rafael Wysocki, Kevin Hilman,
Viresh Kumar, Nishanth Menon, Stephen Boyd,
linaro-kernel@lists.linaro.org, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org, Vincent Guittot, Lina Iyer,
devicetree@vger.kernel.org, Jon Hunter
On Wed, Mar 1, 2017 at 12:27 AM, Rajendra Nayak <rnayak@codeaurora.org> wrote:
>
>
> On 02/28/2017 09:22 PM, Rob Herring wrote:
>> On Tue, Feb 28, 2017 at 9:14 AM, Ulf Hansson <ulf.hansson@linaro.org> wrote:
>>> [...]
>>>
>>>>> ---> Parent domain-2 (Contains Perfomance states)
>>>>> |
>>>>> |
>>>>> C.) DeviceX ---> Parent-domain-1 |
>>>>> |
>>>>> |
>>>>> ---> Parent domain-3 (Contains Perfomance states)
>>>>
>>>> I'm a bit confused. How does a domain have 2 parent domains?
>>>
>>> This comes from the early design of the generic PM domain, thus I
>>> assume we have some HW with such complex PM topology. However, I don't
>>> know if it is actually being used.
>>>
>>> Moreover, the corresponding DT bindings for "power-domains" parents,
>>> can easily be extended to cover more than one parent. See more in
>>> Documentation/devicetree/bindings/power/power_domain.txt
>>
>> I could easily see device having 2 power domains. For example a cpu
>> may have separate domains for RAM/caches and logic. And nesting of
>
> yet the bindings for power-domains (for consumer devices) only allows for
> one powerdomain to be associated with a device.
There's nothing in the binding only allowing that. If that was true,
then #powerdomain-cells would be pointless as the property size would
tell you the number of cells. Now it may be that we simply don't have
any cases with more than 1. Hopefully that's not because bindings are
working around PM domain limitations/requirements.
Rob
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes
2017-03-01 23:13 ` Rob Herring
@ 2017-03-02 3:30 ` Rajendra Nayak
0 siblings, 0 replies; 17+ messages in thread
From: Rajendra Nayak @ 2017-03-02 3:30 UTC (permalink / raw)
To: Rob Herring
Cc: Ulf Hansson, Viresh Kumar, Rafael Wysocki, Kevin Hilman,
Viresh Kumar, Nishanth Menon, Stephen Boyd,
linaro-kernel@lists.linaro.org, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org, Vincent Guittot, Lina Iyer,
devicetree@vger.kernel.org, Jon Hunter
On 03/02/2017 04:43 AM, Rob Herring wrote:
> On Wed, Mar 1, 2017 at 12:27 AM, Rajendra Nayak <rnayak@codeaurora.org> wrote:
>>
>>
>> On 02/28/2017 09:22 PM, Rob Herring wrote:
>>> On Tue, Feb 28, 2017 at 9:14 AM, Ulf Hansson <ulf.hansson@linaro.org> wrote:
>>>> [...]
>>>>
>>>>>> ---> Parent domain-2 (Contains Perfomance states)
>>>>>> |
>>>>>> |
>>>>>> C.) DeviceX ---> Parent-domain-1 |
>>>>>> |
>>>>>> |
>>>>>> ---> Parent domain-3 (Contains Perfomance states)
>>>>>
>>>>> I'm a bit confused. How does a domain have 2 parent domains?
>>>>
>>>> This comes from the early design of the generic PM domain, thus I
>>>> assume we have some HW with such complex PM topology. However, I don't
>>>> know if it is actually being used.
>>>>
>>>> Moreover, the corresponding DT bindings for "power-domains" parents,
>>>> can easily be extended to cover more than one parent. See more in
>>>> Documentation/devicetree/bindings/power/power_domain.txt
>>>
>>> I could easily see device having 2 power domains. For example a cpu
>>> may have separate domains for RAM/caches and logic. And nesting of
>>
>> yet the bindings for power-domains (for consumer devices) only allows for
>> one powerdomain to be associated with a device.
>
> There's nothing in the binding only allowing that. If that was true,
> then #powerdomain-cells would be pointless
Is't #powerdomain-cells a powerdomain provider property? and used to
specify if a powerdomain provider supports providing 1 or many powerdomains?
I was talking about the power domain consumer property.
Looking at Documentation/devicetree/bindings/power/power_domain.txt..
==PM domain consumers==
Required properties:
- power-domains : A phandle and PM domain specifier as defined by bindings of
the power controller specified by phandle.
It clearly says 'A phandle'. If there was a way to specify multiple power-domains
for a consumer device should it not be saying a list of phandles? Like we do for
clocks and regulators?
> as the property size would
> tell you the number of cells. Now it may be that we simply don't have
> any cases with more than 1. Hopefully that's not because bindings are
> working around PM domain limitations/requirements.
>
> Rob
>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2017-03-02 3:30 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
[not found] <cover.1487926924.git.viresh.kumar@linaro.org>
[not found] ` <cover.1487926924.git.viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-02-24 9:06 ` [PATCH V3 1/7] PM / Domains: Introduce "performance-states" binding Viresh Kumar
[not found] ` <132e9200102bf2f1175567f0862596d098363d9e.1487926924.git.viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-02-28 0:31 ` Rob Herring
2017-02-28 5:36 ` Viresh Kumar
2017-02-24 9:06 ` [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes Viresh Kumar
[not found] ` <ceb1bf5f696138c30b30743c24b619336d438d7c.1487926924.git.viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-02-28 0:39 ` Rob Herring
2017-02-28 6:57 ` Viresh Kumar
2017-02-28 14:10 ` Rob Herring
[not found] ` <CAL_JsqLx6Y=JgaVtJPFwERQ_=5qwqp5EY1+B=cdfBJO55Vct4w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-02-28 15:14 ` Ulf Hansson
[not found] ` <CAPDyKFo5TjTa-hTzNp5KCpozU87L22piCXaSjWMTr4xVkgP+Pg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-02-28 15:52 ` Rob Herring
2017-02-28 19:13 ` Geert Uytterhoeven
2017-03-01 6:14 ` Viresh Kumar
2017-03-01 8:45 ` Geert Uytterhoeven
2017-03-01 8:54 ` Viresh Kumar
2017-03-01 6:27 ` Rajendra Nayak
2017-03-01 23:13 ` Rob Herring
2017-03-02 3:30 ` Rajendra Nayak
2017-03-01 6:12 ` Viresh Kumar
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).