Re: [PATCH V3 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume

[Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>]

On Thursday 06 April 2017 08:56 PM, Jon Hunter wrote:
> On 06/04/17 15:21, Laxman Dewangan wrote:
>> In some of NVIDIA Tegra's platform, PWM controller is used to
>> control the PWM controlled regulators. PWM signal is connected to
>> the VID pin of the regulator where duty cycle of PWM signal decide
>> the voltage level of the regulator output.
>>
>> The tristate (high impedance of PWM pin form Tegra) also define
> s/form/from/
> s/define/defines/
>
>> one of the state of PWM regulator which needs to be configure in
>> suspend state of system.
> It maybe clearer to say that when the system enters suspend the
> regulator requires the pwm output to be tristated.

Not necessarily that every PWM regulator interfaces needs it.  It 
depends on the devices.
So I will say:

When system enters suspend, in some of PWM regulator interface, it is 
required to to set the PWM output to be tristated.


>   	pwm: pwm@7000a000 {
> @@ -29,3 +42,33 @@ Example:
>   		resets = <&tegra_car 17>;
>   		reset-names = "pwm";
>   	};
> +
> +
> +Example with the pin configuration for suspend and resume:
> +=========================================================
> +Pin PE7 is used as PWM interface.
> Nit-pick. On what devices? Sounds like this is verbatim. Maybe state
> what device this is an example for.

Let me phrase it as:
Suppose pin PE7 (On tegra210) interfaced with the regulator device and 
this requires PWM output to be tristated when system enters suspend.
Following will be DT binding to achieve this: