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From: Laxman Dewangan <ldewangan@nvidia.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: robh+dt@kernel.org, jonathanh@nvidia.com, mark.rutland@arm.com,
	linux-pwm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH V2 2/4] pwm: tegra: Increase precision in pwm rate calculation
Date: Thu, 6 Apr 2017 22:33:55 +0530	[thread overview]
Message-ID: <58E674FB.3080006@nvidia.com> (raw)
In-Reply-To: <20170406162417.GB19312@ulmo.ba.sec>

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On Thursday 06 April 2017 09:54 PM, Thierry Reding wrote:
> * PGP Signed by an unknown key
>
> On Thu, Apr 06, 2017 at 07:50:59PM +0530, Laxman Dewangan wrote:
>> The rate of the PWM calculated as follows:
>> 	hz = NSEC_PER_SEC / period_ns;
>>   	rate = (rate + (hz / 2)) / hz;
>>
>> This has the precision loss in lower PWM rate.
>> Changing this to have more precision as:
>> 	hz = DIV_ROUND_CLOSE(NSEC_PER_SEC * 100, period_ns);
>> 	rate = DIV_ROUND_CLOSE(rate * 100, hz)
> DIV_ROUND_CLOSEST(). And I much prefer this to the actual code below. I
> don't think it's necessary to have a local variable for the precision.
Do you suggest to use DIV_ROUND_CLOSEST() instead of 
DIV_ROUND_CLOSEST_ULL()?

This is ULL division and so we need to use this one.

Or am I missing something

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  reply	other threads:[~2017-04-06 17:03 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-06 14:20 [PATCH V2 0/4] pwm: tegra: Pin configuration in suspend/resume and cleanups Laxman Dewangan
2017-04-06 14:20 ` [PATCH V2 2/4] pwm: tegra: Increase precision in pwm rate calculation Laxman Dewangan
     [not found]   ` <1491488461-24621-3-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-04-06 16:24     ` Thierry Reding
2017-04-06 17:03       ` Laxman Dewangan [this message]
2017-04-06 16:28     ` Thierry Reding
     [not found] ` <1491488461-24621-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-04-06 14:20   ` [PATCH V2 1/4] pwm: tegra: Use DIV_ROUND_CLOSEST_ULL() instead of local implementation Laxman Dewangan
2017-04-06 16:28     ` Thierry Reding
2017-04-06 14:21   ` [PATCH V3 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume Laxman Dewangan
2017-04-06 15:26     ` Jon Hunter
     [not found]       ` <f43c83a9-8ae0-73b0-d41d-97d3bc6c253e-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-04-06 16:48         ` Laxman Dewangan
     [not found]           ` <58E67152.1080400-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-04-07  7:49             ` Jon Hunter
2017-04-06 14:21   ` [PATCH V4 4/4] pwm: tegra: Add support to configure pin state " Laxman Dewangan
2017-04-06 15:17     ` Jon Hunter
2017-04-06 16:40       ` Laxman Dewangan
     [not found]         ` <58E66F8F.1030802-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-04-07  7:51           ` Jon Hunter

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