From: Dan Scally <dan.scally@ideasonboard.com>
To: Linus Walleij <linusw@kernel.org>,
Jacopo Mondi <jacopo.mondi@ideasonboard.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>
Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-renesas-soc@vger.kernel.org,
Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v3 1/5] dt-bindings: media: renesas,r9a09g057-ivc: Describe additional interrupts
Date: Wed, 7 Oct 2026 11:43:35 +0100 [thread overview]
Message-ID: <5966b6e4-77c9-40d5-8ba1-b005fcd60022@ideasonboard.com> (raw)
In-Reply-To: <20260928-mali-c55-renesas-dts-v3-1-2cf7eb746ebb@kernel.org>
Hi Linus
On 28/09/2026 13:21, Linus Walleij wrote:
> The RZ/V2H IVC provides input frame-start and frame-stop completion
> interrupts alongside its input frame-end interrupt.
>
> Describe these optional interrupts, keeping frame end first and requiring
> only that entry to preserve support for existing device trees. Extend the
> example to show all three interrupts using mock interrupt numbers.
>
> Assisted-by: LLM
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Linus Walleij <linusw@kernel.org>
> ---
> .../devicetree/bindings/media/renesas,r9a09g057-ivc.yaml | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/media/renesas,r9a09g057-ivc.yaml b/Documentation/devicetree/bindings/media/renesas,r9a09g057-ivc.yaml
> index c09cbd8c9e35..3eeb1a92c9cf 100644
> --- a/Documentation/devicetree/bindings/media/renesas,r9a09g057-ivc.yaml
> +++ b/Documentation/devicetree/bindings/media/renesas,r9a09g057-ivc.yaml
> @@ -21,7 +21,11 @@ properties:
> maxItems: 1
>
> interrupts:
> - maxItems: 1
> + minItems: 1
> + items:
> + - description: Image input frame-end interrupt
> + - description: Image input frame-start interrupt
> + - description: Frame-stop processing completion interrupt
Perhaps interrupt-names too?
Thanks
Dan
>
> clocks:
> items:
> @@ -92,7 +96,10 @@ examples:
> <&cpg 0xd3>;
> reset-names = "reg", "axi", "isp";
>
> - interrupts = <GIC_SPI 861 IRQ_TYPE_EDGE_RISING>;
> + /* Example interrupt numbers. */
> + interrupts = <GIC_SPI 103 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 104 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
>
> port {
> ivc_out: endpoint {
>
next prev parent reply other threads:[~2026-10-07 10:43 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-28 12:21 [PATCH v3 0/5] arm64: dts: renesas: Enable ISP and IVC on RZ/V2H EVK Linus Walleij
2026-09-28 12:21 ` [PATCH v3 1/5] dt-bindings: media: renesas,r9a09g057-ivc: Describe additional interrupts Linus Walleij
2026-10-06 11:07 ` Lad, Prabhakar
2026-10-07 10:43 ` Dan Scally [this message]
2026-09-28 12:21 ` [PATCH v3 2/5] dt-bindings: media: arm,mali-c55: Describe DMA line-tick interrupts Linus Walleij
2026-10-05 17:39 ` Rob Herring (Arm)
2026-10-06 11:11 ` Lad, Prabhakar
2026-10-07 10:49 ` Dan Scally
2026-10-08 13:26 ` Linus Walleij
2026-09-28 12:21 ` [PATCH v3 3/5] dt-bindings: media: arm,mali-c55: Add power domain Linus Walleij
2026-10-05 17:39 ` Rob Herring (Arm)
2026-10-06 11:13 ` Lad, Prabhakar
2026-10-07 10:50 ` Dan Scally
2026-09-28 12:21 ` [PATCH v3 4/5] arm64: dts: renesas: r9a09g057: Add IVC and ISP nodes Linus Walleij
2026-09-28 12:21 ` [PATCH v3 5/5] arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add ISP and IVC nodes Linus Walleij
2026-10-06 18:33 ` Lad, Prabhakar
2026-10-08 13:18 ` Linus Walleij
2026-10-05 22:14 ` [PATCH v3 0/5] arm64: dts: renesas: Enable ISP and IVC on RZ/V2H EVK Linus Walleij
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