From: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
To: "Maulik Shah (mkshah)" <maulik.shah@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Linus Walleij <linusw@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Richard Cochran <richardcochran@gmail.com>
Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org
Subject: Re: [PATCH 2/2] pinctrl: qcom: Add Shikra pinctrl driver
Date: Mon, 4 May 2026 13:20:42 +0530 [thread overview]
Message-ID: <5973b8ad-819c-4d14-9e7d-415e2605fcc7@oss.qualcomm.com> (raw)
In-Reply-To: <38bb1b79-67da-4a23-a0e8-3c3da77933d7@oss.qualcomm.com>
On 4/30/2026 9:36 AM, Maulik Shah (mkshah) wrote:
>
> On 4/29/2026 6:41 PM, Komal Bajaj wrote:
>> Add pinctrl driver for TLMM block found in Shikra SoC.
>
> [...]
>
>> +#define UFS_RESET(pg_name, ctl, io) \
>> + { \
>> + .grp = PINCTRL_PINGROUP(#pg_name, \
>> + pg_name##_pins, \
>> + ARRAY_SIZE(pg_name##_pins)), \
>> + .ctl_reg = ctl, \
>> + .io_reg = io, \
>> + .intr_cfg_reg = 0, \
>> + .intr_status_reg = 0, \
>> + .mux_bit = -1, \
>> + .pull_bit = 3, \
>> + .drv_bit = 0, \
>> + .oe_bit = -1, \
>> + .in_bit = -1, \
>> + .out_bit = 0, \
>> + .intr_enable_bit = -1, \
>> + .intr_status_bit = -1, \
>> + .intr_target_bit = -1, \
>> + .intr_raw_status_bit = -1, \
>> + .intr_polarity_bit = -1, \
>> + .intr_detection_bit = -1, \
>> + .intr_detection_width = -1, \
>> + }
> UFS_RESET macro is not used anywhere in the file, please remove it.
>
> I assume the macro keeps getting added since the file pinctrl-<target> is
> fully/partially auto generated. Would be good to fix auto generation to
> avoid getting this added as default in future.
>
> The unused ones were removed via [1].
>
> [1] https://lore.kernel.org/all/4429f44e-f7e5-449c-824c-83daa339b383@oss.qualcomm.com/
>
> [...]
>
Thanks Maulik for review, will update the driver to cleanup unused
macros in next version.
>> +static const struct msm_gpio_wakeirq_map shikra_mpm_map[] = {
>> + {1, 9}, {2, 31}, {5, 49}, {6, 53}, {9, 72}, {10, 10},
> It would be better to have spacing before/after brackets inline with other pinctrl drivers.
> {1, 9}, should be { 1, 9 }.
Noted.
Thanks
Komal
>
>> + {12, 22}, {14, 26}, {17, 29}, {18, 24}, {20, 32}, {22, 33},
>> + {25, 34}, {27, 35}, {28, 36}, {29, 37}, {30, 38}, {31, 39},
>> + {32, 40}, {33, 41}, {38, 42}, {40, 43}, {43, 44}, {44, 45},
>> + {45, 46}, {46, 47}, {47, 48}, {48, 60}, {50, 50}, {51, 51},
>> + {52, 61}, {53, 62}, {57, 52}, {58, 63}, {60, 54}, {63, 64},
>> + {73, 55}, {74, 56}, {75, 57}, {77, 3}, {80, 4}, {84, 5},
>> + {85, 67}, {86, 69}, {88, 70}, {89, 71}, {90, 73}, {91, 74},
>> + {92, 75}, {93, 76}, {94, 77}, {95, 78}, {97, 79}, {99, 80},
>> + {100, 11}, {101, 13}, {102, 14}, {103, 15}, {106, 16}, {108, 17},
>> + {112, 18}, {116, 19}, {117, 20}, {119, 21}, {120, 23}, {136, 25},
>> + {159, 27}, {161, 28},
>> +};
>> +
> Thanks,
> Maulik
>
next prev parent reply other threads:[~2026-05-04 7:50 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-29 13:11 [PATCH 0/2] pinctrl: qcom: Add support for Qualcomm Shikra SoC Komal Bajaj
2026-04-29 13:11 ` [PATCH 1/2] dt-bindings: pinctrl: qcom: Document Shikra Top Level Mode Multiplexer Komal Bajaj
2026-04-30 10:12 ` Krzysztof Kozlowski
2026-05-04 7:45 ` Komal Bajaj
2026-04-29 13:11 ` [PATCH 2/2] pinctrl: qcom: Add Shikra pinctrl driver Komal Bajaj
2026-04-30 4:06 ` Maulik Shah (mkshah)
2026-04-30 10:54 ` Konrad Dybcio
2026-05-04 7:53 ` Komal Bajaj
2026-05-04 7:50 ` Komal Bajaj [this message]
2026-04-30 11:51 ` Linus Walleij
2026-05-04 7:56 ` Komal Bajaj
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