* [PATCH] arm64: dts: hisi: add PCIe host controller node for hip07 SoC
@ 2017-07-18 8:33 Zhou Wang
[not found] ` <1500366820-58555-1-git-send-email-wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
0 siblings, 1 reply; 3+ messages in thread
From: Zhou Wang @ 2017-07-18 8:33 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA, Zhou Wang
Add one PCIe host controller node for HiSilicon Hip07 SoC and enable it in
D05 board.
Signed-off-by: Zhou Wang <wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
---
arch/arm64/boot/dts/hisilicon/hip07-d05.dts | 4 ++++
arch/arm64/boot/dts/hisilicon/hip07.dtsi | 21 +++++++++++++++++++++
2 files changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hip07-d05.dts b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
index f5d7f08..fe7c16c 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
+++ b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
@@ -84,3 +84,7 @@
&sas1 {
status = "ok";
};
+
+&p0_pcie2_a {
+ status = "ok";
+};
diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index 283d7b5..077b2d7b 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -1534,5 +1534,26 @@
<637 1>,<638 1>,<639 1>;
status = "disabled";
};
+
+ p0_pcie2_a: pcie@a00a0000 {
+ compatible = "hisilicon,pcie-almost-ecam";
+ reg = <0 0xa8000000 0 0x800000>,<0 0xa00a0000 0 0x10000>;
+ bus-range = <0x80 0x87>;
+ msi-map = <0x8000 &p0_its_dsa_a 0x8000 0x800>;
+ msi-map-mask = <0xffff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ dma-coherent;
+ ranges = <0x02000000 0 0xa8800000 0 0xa8800000 0 0x77f0000
+ 0x01000000 0 0 0 0xafff0000 0 0x10000>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <0x0 0 0 1 &mbigen_pcie2_a 671 4
+ 0x0 0 0 2 &mbigen_pcie2_a 671 4
+ 0x0 0 0 3 &mbigen_pcie2_a 671 4
+ 0x0 0 0 4 &mbigen_pcie2_a 671 4>;
+ status = "disabled";
+ };
};
};
--
1.9.1
--
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^ permalink raw reply related [flat|nested] 3+ messages in thread[parent not found: <1500366820-58555-1-git-send-email-wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>]
* Re: [PATCH] arm64: dts: hisi: add PCIe host controller node for hip07 SoC [not found] ` <1500366820-58555-1-git-send-email-wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> @ 2017-08-04 13:01 ` Wei Xu [not found] ` <5984703A.4060302-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> 0 siblings, 1 reply; 3+ messages in thread From: Wei Xu @ 2017-08-04 13:01 UTC (permalink / raw) To: Zhou Wang, Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Hi Zhou, On 2017/7/18 9:33, Zhou Wang wrote: > Add one PCIe host controller node for HiSilicon Hip07 SoC and enable it in > D05 board. > > Signed-off-by: Zhou Wang <wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> > --- > arch/arm64/boot/dts/hisilicon/hip07-d05.dts | 4 ++++ > arch/arm64/boot/dts/hisilicon/hip07.dtsi | 21 +++++++++++++++++++++ > 2 files changed, 25 insertions(+) > > diff --git a/arch/arm64/boot/dts/hisilicon/hip07-d05.dts b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts > index f5d7f08..fe7c16c 100644 > --- a/arch/arm64/boot/dts/hisilicon/hip07-d05.dts > +++ b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts > @@ -84,3 +84,7 @@ > &sas1 { > status = "ok"; > }; > + > +&p0_pcie2_a { > + status = "ok"; > +}; > diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi > index 283d7b5..077b2d7b 100644 > --- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi > @@ -1534,5 +1534,26 @@ > <637 1>,<638 1>,<639 1>; > status = "disabled"; > }; > + > + p0_pcie2_a: pcie@a00a0000 { > + compatible = "hisilicon,pcie-almost-ecam"; The compatible string should be "hisilicon,hip07-pcie-ecam". > + reg = <0 0xa8000000 0 0x800000>,<0 0xa00a0000 0 0x10000>; > + bus-range = <0x80 0x87>; > + msi-map = <0x8000 &p0_its_dsa_a 0x8000 0x800>; > + msi-map-mask = <0xffff>; > + #address-cells = <3>; > + #size-cells = <2>; > + device_type = "pci"; > + dma-coherent; > + ranges = <0x02000000 0 0xa8800000 0 0xa8800000 0 0x77f0000 > + 0x01000000 0 0 0 0xafff0000 0 0x10000>; Can you also check whether the ranges are working or not with current UEFI? Thanks! Best Regards, Wei > + #interrupt-cells = <1>; > + interrupt-map-mask = <0xf800 0 0 7>; > + interrupt-map = <0x0 0 0 1 &mbigen_pcie2_a 671 4 > + 0x0 0 0 2 &mbigen_pcie2_a 671 4 > + 0x0 0 0 3 &mbigen_pcie2_a 671 4 > + 0x0 0 0 4 &mbigen_pcie2_a 671 4>; > + status = "disabled"; > + }; > }; > }; > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 3+ messages in thread
[parent not found: <5984703A.4060302-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>]
* Re: [PATCH] arm64: dts: hisi: add PCIe host controller node for hip07 SoC [not found] ` <5984703A.4060302-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> @ 2017-08-07 0:59 ` Zhou Wang 0 siblings, 0 replies; 3+ messages in thread From: Zhou Wang @ 2017-08-07 0:59 UTC (permalink / raw) To: Wei Xu, Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA On 2017/8/4 21:01, Wei Xu wrote: > Hi Zhou, > > On 2017/7/18 9:33, Zhou Wang wrote: >> Add one PCIe host controller node for HiSilicon Hip07 SoC and enable it in >> D05 board. >> >> Signed-off-by: Zhou Wang <wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> >> --- >> arch/arm64/boot/dts/hisilicon/hip07-d05.dts | 4 ++++ >> arch/arm64/boot/dts/hisilicon/hip07.dtsi | 21 +++++++++++++++++++++ >> 2 files changed, 25 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/hisilicon/hip07-d05.dts b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts >> index f5d7f08..fe7c16c 100644 >> --- a/arch/arm64/boot/dts/hisilicon/hip07-d05.dts >> +++ b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts >> @@ -84,3 +84,7 @@ >> &sas1 { >> status = "ok"; >> }; >> + >> +&p0_pcie2_a { >> + status = "ok"; >> +}; >> diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi >> index 283d7b5..077b2d7b 100644 >> --- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi >> +++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi >> @@ -1534,5 +1534,26 @@ >> <637 1>,<638 1>,<639 1>; >> status = "disabled"; >> }; >> + >> + p0_pcie2_a: pcie@a00a0000 { >> + compatible = "hisilicon,pcie-almost-ecam"; > > The compatible string should be "hisilicon,hip07-pcie-ecam". OK, I will modify this and resend it later. > >> + reg = <0 0xa8000000 0 0x800000>,<0 0xa00a0000 0 0x10000>; >> + bus-range = <0x80 0x87>; >> + msi-map = <0x8000 &p0_its_dsa_a 0x8000 0x800>; >> + msi-map-mask = <0xffff>; >> + #address-cells = <3>; >> + #size-cells = <2>; >> + device_type = "pci"; >> + dma-coherent; >> + ranges = <0x02000000 0 0xa8800000 0 0xa8800000 0 0x77f0000 >> + 0x01000000 0 0 0 0xafff0000 0 0x10000>; > > Can you also check whether the ranges are working or not with current UEFI? > Thanks! Sure. Thanks, Zhou > > Best Regards, > Wei > >> + #interrupt-cells = <1>; >> + interrupt-map-mask = <0xf800 0 0 7>; >> + interrupt-map = <0x0 0 0 1 &mbigen_pcie2_a 671 4 >> + 0x0 0 0 2 &mbigen_pcie2_a 671 4 >> + 0x0 0 0 3 &mbigen_pcie2_a 671 4 >> + 0x0 0 0 4 &mbigen_pcie2_a 671 4>; >> + status = "disabled"; >> + }; >> }; >> }; >> > > > . > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 3+ messages in thread
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2017-07-18 8:33 [PATCH] arm64: dts: hisi: add PCIe host controller node for hip07 SoC Zhou Wang
[not found] ` <1500366820-58555-1-git-send-email-wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
2017-08-04 13:01 ` Wei Xu
[not found] ` <5984703A.4060302-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
2017-08-07 0:59 ` Zhou Wang
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