From: Damien Le Moal <dlemoal@kernel.org>
To: Sebastian Reichel <sebastian.reichel@collabora.com>,
Heiko Stuebner <heiko@sntech.de>
Cc: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Serge Semin <fancer.lancer@gmail.com>,
Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
linux-ide@vger.kernel.org, linux-phy@lists.infradead.org,
linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, kernel@collabora.com
Subject: Re: [PATCHv1 2/5] dt-bindings: ata: ahci: add RK3588 AHCI controller
Date: Fri, 14 Apr 2023 10:51:34 +0900 [thread overview]
Message-ID: <59c363bc-9e98-e7a2-1da4-92e41daef34f@kernel.org> (raw)
In-Reply-To: <20230413182345.92557-3-sebastian.reichel@collabora.com>
On 4/14/23 03:23, Sebastian Reichel wrote:
> Just like RK3568, the RK3588 has a DWC based AHCI controller.
>
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
> ---
> FWIW IDK what exactly the ASIC clock is. The TRM does not provide any
> details unfortunately. It is required for functional SATA, though.
> ---
> .../devicetree/bindings/ata/snps,dwc-ahci-common.yaml | 6 ++++--
> Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml | 6 ++++--
> 2 files changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml
> index c1457910520b..0df8f49431eb 100644
> --- a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml
> +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml
> @@ -31,11 +31,11 @@ properties:
> PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx)
> clock, etc.
> minItems: 1
> - maxItems: 4
> + maxItems: 5
>
> clock-names:
> minItems: 1
> - maxItems: 4
> + maxItems: 5
> items:
> oneOf:
> - description: Application APB/AHB/AXI BIU clock
> @@ -50,6 +50,8 @@ properties:
> const: rxoob
> - description: SATA Ports reference clock
> const: ref
> + - description: Rockchip ASIC clock
Shouldn't this mention that this clock is for the 3588 only ? Or is it also
necessary for the 3568 ? That is not super clear.
> + const: asic
>
> resets:
> description:
> diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml
> index 5afa4b57ce20..c6a0d6c8b62c 100644
> --- a/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml
> +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml
> @@ -23,9 +23,11 @@ properties:
> const: snps,dwc-ahci
> - description: SPEAr1340 AHCI SATA device
> const: snps,spear-ahci
> - - description: Rockhip RK3568 AHCI controller
> + - description: Rockhip AHCI controller
> items:
> - - const: rockchip,rk3568-dwc-ahci
> + - enum:
> + - rockchip,rk3568-dwc-ahci
> + - rockchip,rk3588-dwc-ahci
> - const: snps,dwc-ahci
>
> patternProperties:
next prev parent reply other threads:[~2023-04-14 1:51 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-13 18:23 [PATCHv1 0/5] Add RK3588 SATA support Sebastian Reichel
2023-04-13 18:23 ` [PATCHv1 1/5] dt-bindings: soc: rockchip: add rk3588 pipe-phy syscon Sebastian Reichel
2023-04-18 20:38 ` Rob Herring
2023-04-13 18:23 ` [PATCHv1 2/5] dt-bindings: ata: ahci: add RK3588 AHCI controller Sebastian Reichel
2023-04-14 1:51 ` Damien Le Moal [this message]
2023-04-21 19:28 ` Serge Semin
2023-04-13 18:23 ` [PATCHv1 3/5] dt-bindings: phy: rockchip: rk3588 has two reset lines Sebastian Reichel
2023-04-18 20:41 ` Rob Herring
2023-04-18 21:44 ` Sebastian Reichel
2023-04-13 18:23 ` [PATCHv1 4/5] arm64: dts: rockchip: rk3588: add combo PHYs Sebastian Reichel
2023-04-13 18:23 ` [PATCHv1 5/5] arm64: dts: rockchip: rk3588: add SATA support Sebastian Reichel
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