From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C70FC327797; Thu, 15 Jan 2026 07:51:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768463507; cv=none; b=TSGIFbVnM6i3a/HWD1YFGo11hfFeyYWdQtwa7aVnb0ZK34YcXelBSAEkKYaEfqJVaz2hLAJMWLb5tHpepz/dCU76jZeyDPhKa2CUJSc8lFHIvUGlB5orW6UB0+LW6FEGqoZ79nxBo/kqt7z5l2yU3nurDsjLrdaacIJU8CdonOk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768463507; c=relaxed/simple; bh=QJknIWev9hn5uMIZrP3LvyLoAxltyr3UodNAV8Q/8Pw=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=BpeXM2ByKG7CEY0yf3S6FG3BqodO3WUi/ENdBAdW+YQdTY9VZmVqMxYzkOaiF3iK4rqmfnUYNDZ7uhgWKkK4wLnajKvskNIUW17bXV8ySbHh5MtBf3zvn560ri+GXbCnXtQAkYVSJfQPSt5Oz2pDZSXGmL+ScJyGZ/qVOEtCva4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=IK1Unwrt; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="IK1Unwrt" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E22B2C116D0; Thu, 15 Jan 2026 07:51:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1768463507; bh=QJknIWev9hn5uMIZrP3LvyLoAxltyr3UodNAV8Q/8Pw=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=IK1Unwrtld06zEh/pXUGKqsFzAcnijFQLITYgDRnAnj5wAAXEcidzd5+M9PX/pvOn 5+kx9nIzR0hJAdIbK0uGTQSelu5O/jk6GkQYvfFmXPKUyldYScVcz7pIYv6NbKknHK lDYNO9TLTlGDkvAHWu5QUq7E7JT8aK/GSJ+BhEAaIIWGqTN8Jw8iWyQ/bHcWKn+3pp Z57+lBS1X7DBGw/cgAK4DcaiK1tRu3EGuxqXYYjdA+lCIDduEFMxun3BRd0JOngAwQ VuezMS8NSoyh148a4GdZdOsSZoaTuu6wxqvjOISkBa+DH13nd0so7ewIRCoG+g1VFe VuQFnwiNqMvAg== Message-ID: <5a4e4b31-ca1b-4aae-b175-ee4ed692ea48@kernel.org> Date: Thu, 15 Jan 2026 08:51:42 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 3/4] arm64: dts: qcom: Introduce Glymur base dtsi To: Pankaj Patil , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jyothi Kumar Seerapu , Maulik Shah , Sibi Sankar , Taniya Das , Kamal Wadhwa , Qiang Yu , Manaf Meethalavalappu Pallikunhi , Jishnu Prakash , Abel Vesa References: <20260112-upstream_v3_glymur_introduction-v4-0-8a0366210e02@oss.qualcomm.com> <20260112-upstream_v3_glymur_introduction-v4-3-8a0366210e02@oss.qualcomm.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 12/01/2026 13:22, Pankaj Patil wrote: > Introduce the base device tree support for Glymur – Qualcomm's > next-generation compute SoC. The new glymur.dtsi describes the core SoC > components, including: > > - CPUs and CPU topology > - Interrupt controller and TLMM > - GCC,DISPCC and RPMHCC clock controllers > - Reserved memory and interconnects > - APPS and PCIe SMMU and firmware SCM > - Watchdog, RPMHPD, APPS RSC and SRAM > - PSCI and PMU nodes > - QUPv3 serial engines > - CPU power domains and idle states, plus SCMI/ SRAM pieces for CPU DVFS > - PDP0 mailbox, IPCC and AOSS > - Display clock controller > - SPMI PMIC arbiter with SPMI0/1/2 buses > - SMP2P nodes > - TSENS and thermal zones (8 instances, 92 sensors) > > Add dtsi files for PMH0101, PMK8850, PMCX0102, SMB2370, PMH0104, > PMH0110 along with temp-alarm and GPIO nodes needed on Glymur > > Enabled PCIe controllers and associated PHY to support boot to > shell with nvme storage, > List of PCIe instances enabled: > > - PCIe3b > - PCIe4 > - PCIe5 > - PCIe6 > > Co-developed-by: Jyothi Kumar Seerapu > Signed-off-by: Jyothi Kumar Seerapu > Co-developed-by: Maulik Shah > Signed-off-by: Maulik Shah > Co-developed-by: Sibi Sankar > Signed-off-by: Sibi Sankar > Co-developed-by: Taniya Das > Signed-off-by: Taniya Das > Co-developed-by: Kamal Wadhwa > Signed-off-by: Kamal Wadhwa > Co-developed-by: Qiang Yu > Signed-off-by: Qiang Yu > Co-developed-by: Abel Vesa > Signed-off-by: Abel Vesa > Co-developed-by: Manaf Meethalavalappu Pallikunhi > Signed-off-by: Manaf Meethalavalappu Pallikunhi > Co-developed-by: Jishnu Prakash > Signed-off-by: Jishnu Prakash > Signed-off-by: Pankaj Patil > --- > arch/arm64/boot/dts/qcom/glymur.dtsi | 5919 ++++++++++++++++++++++++++ > arch/arm64/boot/dts/qcom/pmcx0102.dtsi | 107 + > arch/arm64/boot/dts/qcom/pmh0101.dtsi | 45 + > arch/arm64/boot/dts/qcom/pmh0104-glymur.dtsi | 83 + > arch/arm64/boot/dts/qcom/pmh0110-glymur.dtsi | 83 + > arch/arm64/boot/dts/qcom/pmk8850.dtsi | 70 + > arch/arm64/boot/dts/qcom/smb2370.dtsi | 45 + > 7 files changed, 6352 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi > new file mode 100644 > index 000000000000..91e577bd152f > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi > @@ -0,0 +1,5919 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include "glymur-ipcc.h" > + > +/ { > + interrupt-parent = <&intc>; > + #address-cells = <2>; > + #size-cells = <2>; > + > + cpus { > + #address-cells = <2>; > + #size-cells = <0>; > + > + cpu0: cpu@0 { > + device_type = "cpu"; > + compatible = "qcom,oryon"; Just to remind, this is not the correct compatible which we already pointed out in the past. I am going to mark it as deprecated, so please do not use it in the new code. Best regards, Krzysztof