[PATCH V2 0/4] Enable onboard SDHCI for Nexus 5X (msm8992)

[PATCH V2 0/4] Enable onboard SDHCI for Nexus 5X (msm8992)

[Jeremy McNicoll]

V2->V1
------

* Removed SMD macro to define packet size
* Dropped "sdhci: dump vendor state and regs" as Ritesh has agreed to deal
  with it as part of [https://lkml.org/lkml/2016/12/30/102] . 
* Didn't include RobH's ACK as I stripped out the smd_rpm node from
   msm8992-bullhead-rev-101.dts and created msm8994-smd-rpm.dtsi to share
   between 8992 & 8994.  All feedback from RobH was applied prior to making
   this change.


All testing was performed with the inclusion of:
  RESEND v1 -> http://www.spinics.net/lists/linux-arm-msm/msg25484.html
  RESEND RFC -> http://www.spinics.net/lists/linux-arm-msm/msg25481.html


In V1 it was stated that
"Without the workaround (patch 5/5) mmc/sdhci didn't get detected 8/20
times.  When including the afore mentioned workaround MMC detection is
100% (35 boots) ."
It turns out we weren't waiting long enough for detection.  (see statement
below)

The following test results were obtained upon removing
the SDHCI workaround (patch 2/4):

  -50 iterations
  -100% successfully detected onboard storage
  -2 times SDHCI detection took over 4+ min
  -Sample size 1 (I only have 1 Nexus 5X)
 
General observations regarding workaround removal:
  -detection of onboard storage is generally slower without
   the workaround.  No hard numbers to back this up just
   a general observation.  It may be because the author has
   consumed far more caffeinated beverages compared to the 
   previous time V1.
  -the failures observed in V1 were because my test script
   did not wait long enough to declare failure.  Previously
   I was waiting 4 min to declare the SDHCI as missing.
   This round I increased the duration to 10min.

NOTE to SDHCI maintainers:
   "sdhci: Add quirk for delayed IRQ ACK" (patch 2/4) was
   included, if there is no interest in including this change
   feel free to drop it or provide guidance on how this type
   of issue is generally dealt with.  



Jeremy McNicoll (4):
  clk: gcc: Updates for SDHCI enablement
  sdhci: Add quirk for delayed IRQ ACK
  arm64: dts: Enable SDHCI for Nexus 5X (msm8992)
  dts: doc: rename rpm_requests to respect DT naming conventions

 .../devicetree/bindings/clock/qcom,rpmcc.txt       |   2 +-
 .../bindings/regulator/qcom,smd-rpm-regulator.txt  |  42 +++-
 .../devicetree/bindings/soc/qcom/qcom,smd-rpm.txt  |   6 +-
 .../devicetree/bindings/soc/qcom/qcom,smd.txt      |   2 +-
 arch/arm/boot/dts/qcom-apq8074-dragonboard.dts     |   2 +-
 arch/arm/boot/dts/qcom-apq8084.dtsi                |   2 +-
 .../dts/qcom-msm8974-lge-nexus5-hammerhead.dts     |   2 +-
 .../boot/dts/qcom-msm8974-sony-xperia-honami.dts   |   2 +-
 arch/arm/boot/dts/qcom-msm8974.dtsi                |   2 +-
 arch/arm64/boot/dts/qcom/msm8916.dtsi              |   2 +-
 .../boot/dts/qcom/msm8992-bullhead-rev-101.dts     |   2 +
 arch/arm64/boot/dts/qcom/msm8992-pins.dtsi         |  82 ++++++
 arch/arm64/boot/dts/qcom/msm8992.dtsi              | 153 ++++++++++++
 arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi      | 276 +++++++++++++++++++++
 drivers/clk/qcom/gcc-msm8994.c                     | 108 ++++++--
 drivers/mmc/host/sdhci-msm.c                       |   7 +
 drivers/mmc/host/sdhci.c                           |  12 +-
 drivers/mmc/host/sdhci.h                           |   2 +
 drivers/regulator/qcom_smd-regulator.c             |  49 ++++
 include/dt-bindings/clock/qcom,gcc-msm8994.h       |  32 ++-
 20 files changed, 739 insertions(+), 48 deletions(-)
 create mode 100644 arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi

-- 
2.6.1

[PATCH V2 1/4] clk: gcc: Updates for SDHCI enablement

[Jeremy McNicoll]

Global clock updates to enable onboard SDHCI / MMC.
Re-tabify dt-bindings to align correctly in vim.

Signed-off-by: Jeremy McNicoll <jeremymc-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
---
 drivers/clk/qcom/gcc-msm8994.c               | 108 +++++++++++++++++++++------
 include/dt-bindings/clock/qcom,gcc-msm8994.h |  32 ++++----
 2 files changed, 106 insertions(+), 34 deletions(-)

diff --git a/drivers/clk/qcom/gcc-msm8994.c b/drivers/clk/qcom/gcc-msm8994.c
index 8afd830..2bf8d1b 100644
--- a/drivers/clk/qcom/gcc-msm8994.c
+++ b/drivers/clk/qcom/gcc-msm8994.c
@@ -24,6 +24,7 @@
 
 #include "common.h"
 #include "clk-regmap.h"
+#include "clk-pll.h"
 #include "clk-alpha-pll.h"
 #include "clk-rcg.h"
 #include "clk-branch.h"
@@ -54,7 +55,7 @@ static const struct parent_map gcc_xo_gpll0_gpll4_map[] = {
 static const char * const gcc_xo_gpll0_gpll4[] = {
 	"xo",
 	"gpll0",
-	"gpll4",
+	"gpll4_vote",
 };
 
 #define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }
@@ -97,29 +98,65 @@ static struct clk_alpha_pll_postdiv gpll0 = {
 	},
 };
 
-static struct clk_alpha_pll gpll4_early = {
-	.offset = 0x1dc0,
-	.clkr = {
-		.enable_reg = 0x1480,
-		.enable_mask = BIT(4),
-		.hw.init = &(struct clk_init_data)
-		{
-			.name = "gpll4_early",
-			.parent_names = (const char *[]) { "xo" },
-			.num_parents = 1,
-			.ops = &clk_alpha_pll_ops,
-		},
+
+static struct clk_rcg2 config_noc_clk_src = {
+	.cmd_rcgr = 0x0150,
+	.hid_width = 5,
+	.parent_map = gcc_xo_gpll0_map,
+	.clkr.hw.init = &(struct clk_init_data) {
+		.name = "config_noc_clk_src",
+		.parent_names = gcc_xo_gpll0,
+		.num_parents = 2,
+		.ops = &clk_rcg2_ops,
+	},
+};
+
+static struct clk_rcg2 periph_noc_clk_src = {
+	.cmd_rcgr = 0x0190,
+	.hid_width = 5,
+	.mnd_width = 8,
+	.parent_map = gcc_xo_gpll0_map,
+	.clkr.hw.init = &(struct clk_init_data) {
+		.name = "periph_noc_clk_src",
+		.parent_names = gcc_xo_gpll0,
+		.num_parents = 2,
+		.ops = &clk_rcg2_ops,
+	},
+};
+
+static struct clk_rcg2 system_noc_clk_src = {
+	.cmd_rcgr = 0x0120, //TODO
+	.hid_width = 5,
+	.parent_map = gcc_xo_gpll0_map,
+	.clkr.hw.init = &(struct clk_init_data) {
+		.name = "system_noc_clk_src",
+		.parent_names = gcc_xo_gpll0,
+		.num_parents = 2,
+		.ops = &clk_rcg2_ops,
 	},
 };
 
-static struct clk_alpha_pll_postdiv gpll4 = {
-	.offset = 0x1dc0,
+static struct clk_pll gpll4 = {
+	.status_reg = 0x1dc0,
+	.status_bit = 30,
 	.clkr.hw.init = &(struct clk_init_data)
 	{
 		.name = "gpll4",
-		.parent_names = (const char *[]) { "gpll4_early" },
+		.parent_names = (const char *[]) { "xo" },
 		.num_parents = 1,
-		.ops = &clk_alpha_pll_postdiv_ops,
+		.ops = &clk_pll_ops,
+	},
+};
+
+static struct clk_regmap gpll4_vote = {
+	.enable_reg = 0x1480,
+	.enable_mask = BIT(4),
+	.hw.init = &(struct clk_init_data)
+	{
+		.name = "gpll4_vote",
+		.parent_names = (const char *[]) { "gpll4" },
+		.num_parents = 1,
+		.ops = &clk_pll_vote_ops,
 	},
 };
 
@@ -896,8 +933,8 @@ static struct freq_tbl ftbl_sdcc1_apps_clk_src[] = {
 	F(25000000, P_GPLL0, 12, 1, 2),
 	F(50000000, P_GPLL0, 12, 0, 0),
 	F(100000000, P_GPLL0, 6, 0, 0),
-	F(192000000, P_GPLL4, 2, 0, 0),
-	F(384000000, P_GPLL4, 1, 0, 0),
+	F(172000000, P_GPLL4, 2, 0, 0),
+	F(344000000, P_GPLL4, 1, 0, 0),
 	{ }
 };
 
@@ -1057,6 +1094,10 @@ static struct clk_branch gcc_blsp1_ahb_clk = {
 		.hw.init = &(struct clk_init_data)
 		{
 			.name = "gcc_blsp1_ahb_clk",
+			.parent_names = (const char *[]){
+				"periph_noc_clk_src",
+			},
+			.num_parents = 1,
 			.ops = &clk_branch2_ops,
 		},
 	},
@@ -1872,6 +1913,7 @@ static struct clk_branch gcc_pdm2_clk = {
 
 static struct clk_branch gcc_sdcc1_apps_clk = {
 	.halt_reg = 0x04c4,
+	.halt_check = BRANCH_HALT_VOTED,
 	.clkr = {
 		.enable_reg = 0x04c4,
 		.enable_mask = BIT(0),
@@ -1888,6 +1930,26 @@ static struct clk_branch gcc_sdcc1_apps_clk = {
 	},
 };
 
+
+static struct clk_branch gcc_sdcc1_ahb_clk = {
+	.halt_reg = 0x04c8,
+	.halt_check = BRANCH_HALT_VOTED,
+	.clkr = {
+		.enable_reg = 0x04c8,
+		.enable_mask = BIT(0),
+		.hw.init = &(struct clk_init_data)
+		{
+			.name = "gcc_sdcc1_ahb_clk",
+			.parent_names = (const char *[]){
+				"periph_noc_clk_src",
+			},
+			.num_parents = 1,
+			.ops = &clk_branch2_ops,
+		},
+	},
+};
+
+
 static struct clk_branch gcc_sdcc2_apps_clk = {
 	.halt_reg = 0x0504,
 	.clkr = {
@@ -2123,10 +2185,13 @@ static struct clk_branch gcc_usb_hs_system_clk = {
 };
 
 static struct clk_regmap *gcc_msm8994_clocks[] = {
-	[GPLL0_EARLY] = &gpll0_early.clkr,
+	[GPLL0_VOTE] = &gpll0_early.clkr,
 	[GPLL0] = &gpll0.clkr,
-	[GPLL4_EARLY] = &gpll4_early.clkr,
+	[CONFIG_NOC_CLK_SRC] = &config_noc_clk_src.clkr,
+	[PERIPH_NOC_CLK_SRC] = &periph_noc_clk_src.clkr,
+	[SYSTEM_NOC_CLK_SRC] = &system_noc_clk_src.clkr,
 	[GPLL4] = &gpll4.clkr,
+	[GPLL4_VOTE] = &gpll4_vote,
 	[UFS_AXI_CLK_SRC] = &ufs_axi_clk_src.clkr,
 	[USB30_MASTER_CLK_SRC] = &usb30_master_clk_src.clkr,
 	[BLSP1_QUP1_I2C_APPS_CLK_SRC] = &blsp1_qup1_i2c_apps_clk_src.clkr,
@@ -2231,6 +2296,7 @@ static struct clk_regmap *gcc_msm8994_clocks[] = {
 	[GCC_SDCC2_APPS_CLK] = &gcc_sdcc2_apps_clk.clkr,
 	[GCC_SDCC3_APPS_CLK] = &gcc_sdcc3_apps_clk.clkr,
 	[GCC_SDCC4_APPS_CLK] = &gcc_sdcc4_apps_clk.clkr,
+	[GCC_SDCC1_AHB_CLK] = &gcc_sdcc1_ahb_clk.clkr,
 	[GCC_SYS_NOC_UFS_AXI_CLK] = &gcc_sys_noc_ufs_axi_clk.clkr,
 	[GCC_SYS_NOC_USB3_AXI_CLK] = &gcc_sys_noc_usb3_axi_clk.clkr,
 	[GCC_TSIF_REF_CLK] = &gcc_tsif_ref_clk.clkr,
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8994.h b/include/dt-bindings/clock/qcom,gcc-msm8994.h
index 8fa535b..e4063d5 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8994.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8994.h
@@ -15,10 +15,10 @@
 #ifndef _DT_BINDINGS_CLK_MSM_GCC_8994_H
 #define _DT_BINDINGS_CLK_MSM_GCC_8994_H
 
-#define GPLL0_EARLY				0
 #define GPLL0					1
-#define GPLL4_EARLY				2
-#define GPLL4					3
+#define GPLL0_VOTE				0
+#define GPLL4					2
+#define GPLL4_VOTE				3
 #define UFS_AXI_CLK_SRC				4
 #define USB30_MASTER_CLK_SRC			5
 #define BLSP1_QUP1_I2C_APPS_CLK_SRC		6
@@ -123,15 +123,21 @@
 #define GCC_SDCC2_APPS_CLK			105
 #define GCC_SDCC3_APPS_CLK			106
 #define GCC_SDCC4_APPS_CLK			107
-#define GCC_SYS_NOC_UFS_AXI_CLK			108
-#define GCC_SYS_NOC_USB3_AXI_CLK		109
-#define GCC_TSIF_REF_CLK			110
-#define GCC_UFS_AXI_CLK				111
-#define GCC_UFS_RX_CFG_CLK			112
-#define GCC_UFS_TX_CFG_CLK			113
-#define GCC_USB30_MASTER_CLK			114
-#define GCC_USB30_MOCK_UTMI_CLK			115
-#define GCC_USB3_PHY_AUX_CLK			116
-#define GCC_USB_HS_SYSTEM_CLK			117
+#define GCC_SDCC1_AHB_CLK			108
+#define GCC_SDCC2_AHB_CLK			109
+
+#define GCC_SYS_NOC_UFS_AXI_CLK			110
+#define GCC_SYS_NOC_USB3_AXI_CLK		111
+#define GCC_TSIF_REF_CLK			112
+#define GCC_UFS_AXI_CLK				113
+#define GCC_UFS_RX_CFG_CLK			114
+#define GCC_UFS_TX_CFG_CLK			115
+#define GCC_USB30_MASTER_CLK			116
+#define GCC_USB30_MOCK_UTMI_CLK			117
+#define GCC_USB3_PHY_AUX_CLK			118
+#define GCC_USB_HS_SYSTEM_CLK			119
+#define SYSTEM_NOC_CLK_SRC			120
+#define PERIPH_NOC_CLK_SRC			121
+#define CONFIG_NOC_CLK_SRC			122
 
 #endif
-- 
2.6.1

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Re: [PATCH V2 1/4] clk: gcc: Updates for SDHCI enablement

[Stephen Boyd]

On 01/16, Jeremy McNicoll wrote:
> Global clock updates to enable onboard SDHCI / MMC.
> Re-tabify dt-bindings to align correctly in vim.

We need much more words here on what's going on in this patch.

> 
> Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
> ---
>  drivers/clk/qcom/gcc-msm8994.c               | 108 +++++++++++++++++++++------
>  include/dt-bindings/clock/qcom,gcc-msm8994.h |  32 ++++----
>  2 files changed, 106 insertions(+), 34 deletions(-)
> 
> diff --git a/drivers/clk/qcom/gcc-msm8994.c b/drivers/clk/qcom/gcc-msm8994.c
> index 8afd830..2bf8d1b 100644
> --- a/drivers/clk/qcom/gcc-msm8994.c
> +++ b/drivers/clk/qcom/gcc-msm8994.c
> @@ -24,6 +24,7 @@
>  
>  #include "common.h"
>  #include "clk-regmap.h"
> +#include "clk-pll.h"

Why?

>  #include "clk-alpha-pll.h"
>  #include "clk-rcg.h"
>  #include "clk-branch.h"
> @@ -54,7 +55,7 @@ static const struct parent_map gcc_xo_gpll0_gpll4_map[] = {
>  static const char * const gcc_xo_gpll0_gpll4[] = {
>  	"xo",
>  	"gpll0",
> -	"gpll4",
> +	"gpll4_vote",
>  };
>  
>  #define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }
> @@ -97,29 +98,65 @@ static struct clk_alpha_pll_postdiv gpll0 = {
>  	},
>  };
>  
> -static struct clk_alpha_pll gpll4_early = {
> -	.offset = 0x1dc0,
> -	.clkr = {
> -		.enable_reg = 0x1480,
> -		.enable_mask = BIT(4),

This is doing PLL voting.

> -		.hw.init = &(struct clk_init_data)
> -		{
> -			.name = "gpll4_early",
> -			.parent_names = (const char *[]) { "xo" },
> -			.num_parents = 1,
> -			.ops = &clk_alpha_pll_ops,
> -		},
> +
> +static struct clk_rcg2 config_noc_clk_src = {
> +	.cmd_rcgr = 0x0150,
> +	.hid_width = 5,
> +	.parent_map = gcc_xo_gpll0_map,
> +	.clkr.hw.init = &(struct clk_init_data) {
> +		.name = "config_noc_clk_src",
> +		.parent_names = gcc_xo_gpll0,
> +		.num_parents = 2,
> +		.ops = &clk_rcg2_ops,
> +	},
> +};
> +
> +static struct clk_rcg2 periph_noc_clk_src = {
> +	.cmd_rcgr = 0x0190,
> +	.hid_width = 5,
> +	.mnd_width = 8,
> +	.parent_map = gcc_xo_gpll0_map,
> +	.clkr.hw.init = &(struct clk_init_data) {
> +		.name = "periph_noc_clk_src",
> +		.parent_names = gcc_xo_gpll0,
> +		.num_parents = 2,
> +		.ops = &clk_rcg2_ops,
> +	},
> +};
> +
> +static struct clk_rcg2 system_noc_clk_src = {
> +	.cmd_rcgr = 0x0120, //TODO

This is right.

> +	.hid_width = 5,
> +	.parent_map = gcc_xo_gpll0_map,
> +	.clkr.hw.init = &(struct clk_init_data) {
> +		.name = "system_noc_clk_src",
> +		.parent_names = gcc_xo_gpll0,
> +		.num_parents = 2,
> +		.ops = &clk_rcg2_ops,
>  	},
>  };
>  
> -static struct clk_alpha_pll_postdiv gpll4 = {
> -	.offset = 0x1dc0,
> +static struct clk_pll gpll4 = {

gpll4 is an alpha PLL though.

> +	.status_reg = 0x1dc0,
> +	.status_bit = 30,
>  	.clkr.hw.init = &(struct clk_init_data)
>  	{
>  		.name = "gpll4",
> -		.parent_names = (const char *[]) { "gpll4_early" },
> +		.parent_names = (const char *[]) { "xo" },
>  		.num_parents = 1,
> -		.ops = &clk_alpha_pll_postdiv_ops,
> +		.ops = &clk_pll_ops,
> +	},
> +};
> +
> +static struct clk_regmap gpll4_vote = {
> +	.enable_reg = 0x1480,
> +	.enable_mask = BIT(4),
> +	.hw.init = &(struct clk_init_data)

This part is rather confusing.

> +	{
> +		.name = "gpll4_vote",
> +		.parent_names = (const char *[]) { "gpll4" },
> +		.num_parents = 1,
> +		.ops = &clk_pll_vote_ops,
>  	},
>  };
>  
> @@ -896,8 +933,8 @@ static struct freq_tbl ftbl_sdcc1_apps_clk_src[] = {
>  	F(25000000, P_GPLL0, 12, 1, 2),
>  	F(50000000, P_GPLL0, 12, 0, 0),
>  	F(100000000, P_GPLL0, 6, 0, 0),
> -	F(192000000, P_GPLL4, 2, 0, 0),
> -	F(384000000, P_GPLL4, 1, 0, 0),
> +	F(172000000, P_GPLL4, 2, 0, 0),
> +	F(344000000, P_GPLL4, 1, 0, 0),

It seems that gpll4 runs at slightly different speeds on 8994 and
8992. You'll need to differentiate which SoC it is and update the
frequency table appropriately. That can be done with the gcc
node's compatible string. That also means gcc-msm8992 needs to be
added and used as a compatible string.

>  	{ }
>  };
>  
> @@ -1057,6 +1094,10 @@ static struct clk_branch gcc_blsp1_ahb_clk = {
>  		.hw.init = &(struct clk_init_data)
>  		{
>  			.name = "gcc_blsp1_ahb_clk",
> +			.parent_names = (const char *[]){
> +				"periph_noc_clk_src",
> +			},
> +			.num_parents = 1,
>  			.ops = &clk_branch2_ops,
>  		},
>  	},
> @@ -1872,6 +1913,7 @@ static struct clk_branch gcc_pdm2_clk = {
>  
>  static struct clk_branch gcc_sdcc1_apps_clk = {
>  	.halt_reg = 0x04c4,
> +	.halt_check = BRANCH_HALT_VOTED,
>  	.clkr = {
>  		.enable_reg = 0x04c4,
>  		.enable_mask = BIT(0),
> @@ -1888,6 +1930,26 @@ static struct clk_branch gcc_sdcc1_apps_clk = {
>  	},
>  };
>  
> +
> +static struct clk_branch gcc_sdcc1_ahb_clk = {
> +	.halt_reg = 0x04c8,
> +	.halt_check = BRANCH_HALT_VOTED,

Why voted?

> diff --git a/include/dt-bindings/clock/qcom,gcc-msm8994.h b/include/dt-bindings/clock/qcom,gcc-msm8994.h
> index 8fa535b..e4063d5 100644
> --- a/include/dt-bindings/clock/qcom,gcc-msm8994.h
> +++ b/include/dt-bindings/clock/qcom,gcc-msm8994.h
> @@ -15,10 +15,10 @@
>  #ifndef _DT_BINDINGS_CLK_MSM_GCC_8994_H
>  #define _DT_BINDINGS_CLK_MSM_GCC_8994_H
>  
> -#define GPLL0_EARLY				0
>  #define GPLL0					1
> -#define GPLL4_EARLY				2
> -#define GPLL4					3
> +#define GPLL0_VOTE				0

Please keep the numbers ordered.

> +#define GPLL4					2
> +#define GPLL4_VOTE				3
>  #define UFS_AXI_CLK_SRC				4
>  #define USB30_MASTER_CLK_SRC			5
>  #define BLSP1_QUP1_I2C_APPS_CLK_SRC		6
> @@ -123,15 +123,21 @@
>  #define GCC_SDCC2_APPS_CLK			105
>  #define GCC_SDCC3_APPS_CLK			106
>  #define GCC_SDCC4_APPS_CLK			107
> -#define GCC_SYS_NOC_UFS_AXI_CLK			108
> -#define GCC_SYS_NOC_USB3_AXI_CLK		109
> -#define GCC_TSIF_REF_CLK			110
> -#define GCC_UFS_AXI_CLK				111
> -#define GCC_UFS_RX_CFG_CLK			112
> -#define GCC_UFS_TX_CFG_CLK			113
> -#define GCC_USB30_MASTER_CLK			114
> -#define GCC_USB30_MOCK_UTMI_CLK			115
> -#define GCC_USB3_PHY_AUX_CLK			116
> -#define GCC_USB_HS_SYSTEM_CLK			117
> +#define GCC_SDCC1_AHB_CLK			108
> +#define GCC_SDCC2_AHB_CLK			109

There should be an ahb clk for sdcc3 and sdcc4 too. Please just
add the defines even if they're not used.

> +
> +#define GCC_SYS_NOC_UFS_AXI_CLK			110

And don't change the numbering randomly. This should still be
108.

> +#define GCC_SYS_NOC_USB3_AXI_CLK		111
> +#define GCC_TSIF_REF_CLK			112
> +#define GCC_UFS_AXI_CLK				113
> +#define GCC_UFS_RX_CFG_CLK			114
> +#define GCC_UFS_TX_CFG_CLK			115
> +#define GCC_USB30_MASTER_CLK			116
> +#define GCC_USB30_MOCK_UTMI_CLK			117
> +#define GCC_USB3_PHY_AUX_CLK			118
> +#define GCC_USB_HS_SYSTEM_CLK			119
> +#define SYSTEM_NOC_CLK_SRC			120
> +#define PERIPH_NOC_CLK_SRC			121
> +#define CONFIG_NOC_CLK_SRC			122

And then the diff will be understandable.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [PATCH V2 1/4] clk: gcc: Updates for SDHCI enablement

[Jeremy McNicoll]

On 2017-01-17 6:25 PM, Stephen Boyd wrote:
> On 01/16, Jeremy McNicoll wrote:
>> Global clock updates to enable onboard SDHCI / MMC.
>> Re-tabify dt-bindings to align correctly in vim.
>
> We need much more words here on what's going on in this patch.
>

Reword and redo alot of this.  Thanks for the clarifications and answers
on IRC.

-jeremy

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[PATCH V2 2/4] sdhci: Add quirk for delayed IRQ ACK

[Jeremy McNicoll]

On msm8992 it has been observed that IRQs were not getting
ACK'd correctly when clocked at speeds greater than 400KHz.

Signed-off-by: Jeremy McNicoll <jeremymc-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
---
 drivers/mmc/host/sdhci-msm.c |  7 +++++++
 drivers/mmc/host/sdhci.c     | 12 ++++++++++--
 drivers/mmc/host/sdhci.h     |  2 ++
 3 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index ee01d95..25dc9cb 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -1224,6 +1224,13 @@ static int sdhci_msm_probe(struct platform_device *pdev)
 			       CORE_VENDOR_SPEC_CAPABILITIES0);
 	}
 
+	/* Enable delayed IRQ handling workaround on 8992 */
+	if (core_major == 1 && core_minor == 0x3e) {
+		/* Add 40us delay in interrupt handler when operating
+		 * at initialization frequency of 400KHz. */
+		host->quirks2 |= SDHCI_QUIRK2_SLOW_INT_CLR;
+	}
+
 	/* Setup IRQ for handling power/voltage tasks with PMIC */
 	msm_host->pwr_irq = platform_get_irq_byname(pdev, "pwr_irq");
 	if (msm_host->pwr_irq < 0) {
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 71654b9..b685b2a 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -2678,11 +2678,19 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id)
 			result = IRQ_WAKE_THREAD;
 		}
 
-		if (intmask & SDHCI_INT_CMD_MASK)
+		if (intmask & SDHCI_INT_CMD_MASK) {
+			if ((host->quirks2 & SDHCI_QUIRK2_SLOW_INT_CLR) && (host->clock <= 400000)) {
+				udelay(40);
+			}
 			sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
+		}
 
-		if (intmask & SDHCI_INT_DATA_MASK)
+		if (intmask & SDHCI_INT_DATA_MASK) {
+			if ((host->quirks2 & SDHCI_QUIRK2_SLOW_INT_CLR) && (host->clock <= 400000)) {
+				udelay(40);
+			}
 			sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
+		}
 
 		if (intmask & SDHCI_INT_BUS_POWER)
 			pr_err("%s: Card is consuming too much power!\n",
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 766df17..89a10e7 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -24,6 +24,8 @@
  * Controller registers
  */
 
+#define SDHCI_QUIRK2_SLOW_INT_CLR	(1<<5)
+
 #define SDHCI_DMA_ADDRESS	0x00
 #define SDHCI_ARGUMENT2		SDHCI_DMA_ADDRESS
 
-- 
2.6.1

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[PATCH V2 3/4] arm64: dts: Enable SDHCI for Nexus 5X (msm8992)

[Jeremy McNicoll]

Add Nexus 5X (msm8992) SDHCI support, including initial regulator
entries to support enabling the main SDHCI/MMC.

The RPM is common between 8992 & 8994 simply reflect reality with
a shared DT entry.

The msm8994 RPM regulator talks over SMD to the APPS processor.

Signed-off-by: Jeremy McNicoll <jeremymc-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
---

Dropped RobH's ACK explicitly after addressing all feedback.
The reason is that msm8994-smd-rpm.dtsi was created to allow
for sharing between 8992 & 8994 as the RPM is common between
the two. 

 .../bindings/regulator/qcom,smd-rpm-regulator.txt  |  40 +++
 .../boot/dts/qcom/msm8992-bullhead-rev-101.dts     |   2 +
 arch/arm64/boot/dts/qcom/msm8992-pins.dtsi         |  82 ++++++
 arch/arm64/boot/dts/qcom/msm8992.dtsi              | 153 ++++++++++++
 arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi      | 276 +++++++++++++++++++++
 drivers/regulator/qcom_smd-regulator.c             |  49 ++++
 6 files changed, 602 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi

diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
index 1f8d6f8..126989b 100644
--- a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
+++ b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
@@ -23,6 +23,7 @@ Regulator nodes are identified by their compatible:
 		    "qcom,rpm-pm8916-regulators"
 		    "qcom,rpm-pm8941-regulators"
 		    "qcom,rpm-pma8084-regulators"
+		    "qcom,rpm-pm8994-regulators"
 
 - vdd_s1-supply:
 - vdd_s2-supply:
@@ -97,6 +98,40 @@ Regulator nodes are identified by their compatible:
 	Definition: reference to regulator supplying the input pin, as
 		    described in the data sheet
 
+- vdd_s1-supply:
+- vdd_s2-supply:
+- vdd_s3-supply:
+- vdd_s4-supply:
+- vdd_s5-supply:
+- vdd_s6-supply:
+- vdd_s7-supply:
+- vdd_l1_l11-supply:
+- vdd_l2_l3_l4_l27-supply:
+- vdd_l5_l7-supply:
+- vdd_l6_l12_l14_l15_l26-supply:
+- vdd_l8-supply:
+- vdd_l9_l10_l13_l20_l23_l24-supply:
+- vdd_l1_l11-supply:
+- vdd_l6_l12_l14_l15_l26-supply:
+- vdd_l16_l25-supply:
+- vdd_l17-supply:
+- vdd_l18-supply:
+- vdd_l19-supply:
+- vdd_l21-supply:
+- vdd_l22-supply:
+- vdd_l16_l25-supply:
+- vdd_l27-supply:
+- vdd_l28-supply:
+- vdd_l29-supply:
+- vdd_l30-supply:
+- vdd_l31-supply:
+- vdd_l32-supply:
+	Usage: optional (pm8994 only)
+	Value type: <phandle>
+	Definition: reference to regulator supplying the input pin, as
+		    described in the data sheet.
+
+
 The regulator node houses sub-nodes for each regulator within the device. Each
 sub-node is identified using the node's name, with valid values listed for each
 of the pmics below.
@@ -118,6 +153,11 @@ pma8084:
 	l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20,
 	l21, l22, l23, l24, l25, l26, l27, lvs1, lvs2, lvs3, lvs4, 5vs1
 
+pm8994:
+	s1, s2, s3, s4, s5, s6, s7, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,
+	l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, l26,
+	l27, l28, l29, l30, l31, l32, lvs1, lvs2
+
 The content of each sub-node is defined by the standard binding for regulators -
 see regulator.txt.
 
diff --git a/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts b/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts
index 4542133..3fc9a33 100644
--- a/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts
+++ b/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts
@@ -39,3 +39,5 @@
 		};
 	};
 };
+
+#include "msm8994-smd-rpm.dtsi"
diff --git a/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
index d2a26f0..d3ae5ab 100644
--- a/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
@@ -35,4 +35,86 @@
 			bias-pull-down;
 		};
 	};
+
+	/* 0-3 for sdc1 4-6 for sdc2 */
+	/* Order of pins */
+	/* SDC1: CLK -> 0, CMD -> 1, DATA -> 2, RCLK -> 3 */
+	/* SDC2: CLK -> 4, CMD -> 5, DATA -> 6 */
+	pmx-sdc1-clk {
+		sdc1_clk_on: clk-on {
+			pinmux {
+				pins = "sdc1_clk";
+			};
+			pinconf {
+				pins = "sdc1_clk";
+				bias-disable = <0>; /* No pull */
+				drive-strength = <16>; /* 16mA */
+			};
+		};
+		sdc1_clk_off: clk-off {
+			pinmux {
+				pins = "sdc1_clk";
+			};
+			pinconf {
+				pins = "sdc1_clk";
+				bias-disable = <0>; /* No pull */
+				drive-strength = <2>; /* 2mA */
+			};
+		};
+	};
+
+	pmx-sdc1-cmd {
+		sdc1_cmd_on: cmd-on {
+			pinmux {
+				pins = "sdc1_cmd";
+			};
+			pinconf {
+				pins = "sdc1_cmd";
+				bias-pull-up;
+				drive-strength = <8>;
+			};
+		};
+		sdc1_cmd_off: cmd-off {
+			pinmux {
+				pins = "sdc1_cmd";
+			};
+			pinconf {
+				pins = "sdc1_cmd";
+				bias-pull-up = <0x3>; /* same as 3.10 ?? */
+				drive-strength = <2>; /* 2mA */
+			};
+		};
+	};
+
+	pmx-sdc1-data {
+		sdc1_data_on: data-on {
+			pinmux {
+				pins = "sdc1_data";
+			};
+			pinconf {
+				pins = "sdc1_data";
+				bias-pull-up;
+				drive-strength = <8>; /* 8mA */
+			};
+		};
+		sdc1_data_off: data-off {
+			pinmux {
+				pins = "sdc1_data";
+			};
+			pinconf {
+				pins = "sdc1_data";
+				bias-pull-up;
+				drive-strength = <2>;
+			};
+		};
+	};
+
+	pmx-sdc1-rclk {
+		sdc1_rclk_on: rclk-on {
+			bias-pull-down; /* pull down */
+		};
+		sdc1_rclk_off: rclk-off {
+			bias-pull-down; /* pull down */
+		};
+	};
 };
diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/qcom/msm8992.dtsi
index 44b2d37..77edffc 100644
--- a/arch/arm64/boot/dts/qcom/msm8992.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
@@ -82,6 +82,12 @@
 				<0xf9002000 0x1000>;
 		};
 
+		apcs: syscon@f900d000 {
+			compatible = "syscon";
+			reg = <0xf900d000 0x2000>;
+		};
+
+
 		timer@f9020000 {
 			#address-cells = <1>;
 			#size-cells = <1>;
@@ -172,12 +178,159 @@
 			#power-domain-cells = <1>;
 			reg = <0xfc400000 0x2000>;
 		};
+
+		sdhci1: mmc@f9824900 {
+			compatible = "qcom,sdhci-msm-v4";
+			reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
+			reg-names = "hc_mem", "core_mem";
+
+			interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>,
+					<GIC_SPI 138 IRQ_TYPE_NONE>;
+			interrupt-names = "hc_irq", "pwr_irq";
+
+			clocks = <&clock_gcc GCC_SDCC1_APPS_CLK>,
+				<&clock_gcc GCC_SDCC1_AHB_CLK>;
+			clock-names = "core", "iface";
+
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
+					&sdc1_rclk_on>;
+			pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off
+					&sdc1_rclk_off>;
+
+			vdd-supply = <&pm8994_l20>;
+			qcom,vdd-voltage-level = <2950000 2950000>;
+			qcom,vdd-current-level = <200 570000>;
+
+			vdd-io-supply = <&pm8994_s4>;
+			qcom,vdd-io-voltage-level = <1800000 1800000>;
+			qcom,vdd-io-current-level = <200 325000>;
+
+			regulator-always-on;
+			bus-width = <8>;
+			mmc-hs400-1_8v;
+			status = "okay";
+		};
+
+		vreg_vph_pwr: vreg-vph-pwr {
+			compatible = "regulator-fixed";
+			status = "okay";
+			regulator-name = "vph-pwr";
+
+			regulator-min-microvolt = <3600000>;
+			regulator-max-microvolt = <3600000>;
+
+			regulator-always-on;
+		};
+
+		rpm_msg_ram: memory@fc428000 {
+			compatible = "qcom,rpm-msg-ram";
+			reg = <0xfc428000 0x4000>;
+		};
+
+		sfpb_mutex_regs: syscon@fd484000 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "syscon";
+			reg = <0xfd484000 0x400>;
+		};
+
+		sfpb_mutex: hwmutex {
+			compatible = "qcom,sfpb-mutex";
+			syscon = <&sfpb_mutex_regs 0x0 0x100>;
+			#hwlock-cells = <1>;
+		};
+
+		smem {
+			compatible = "qcom,smem";
+			memory-region = <&smem_region>;
+			qcom,rpm-msg-ram = <&rpm_msg_ram>;
+			hwlocks = <&sfpb_mutex 3>;
+		};
 	};
 
 	memory {
 		device_type = "memory";
 		reg = <0 0 0 0>; // bootloader will update
 	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		smem_region: smem@6a00000 {
+			reg = <0x0 0x6a00000 0x0 0x200000>;
+			no-map;
+		};
+	};
+
+	smd_rpm: smd {
+		compatible = "qcom,smd";
+
+		rpm {
+			interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
+			qcom,ipc = <&apcs 8 0>;
+			qcom,smd-edge = <15>;
+			qcom,local-pid = <0>;
+			qcom,remote-pid = <6>;
+
+			rpm-requests {
+				compatible = "qcom,rpm-msm8994";
+				qcom,smd-channels = "rpm_requests";
+
+				rpmcc: qcom,rpmcc {
+					/* TODO: update when rpmcc-msm8994 support added */
+					compatible = "qcom,rpmcc-msm8916",
+							"qcom,rpmcc";
+					#clock-cells = <1>;
+				};
+
+				smd_rpm_regulators: pm8994-regulators {
+					compatible = "qcom,rpm-pm8994-regulators";
+
+					pm8994_s1: s1 {};
+					pm8994_s2: s2 {};
+					pm8994_s3: s3 {};
+					pm8994_s4: s4 {};
+					pm8994_s5: s5 {};
+					pm8994_s6: s6 {};
+					pm8994_s7: s7 {};
+
+					pm8994_l1: l1 {};
+					pm8994_l2: l2 {};
+					pm8994_l3: l3 {};
+					pm8994_l4: l4 {};
+					pm8994_l6: l6 {};
+					pm8994_l8: l8 {};
+					pm8994_l9: l9 {};
+					pm8994_l10: l10 {};
+					pm8994_l11: l11 {};
+					pm8994_l12: l12 {};
+					pm8994_l13: l13 {};
+					pm8994_l14: l14 {};
+					pm8994_l15: l15 {};
+					pm8994_l16: l16 {};
+					pm8994_l17: l17 {};
+					pm8994_l18: l18 {};
+					pm8994_l19: l19 {};
+					pm8994_l20: l20 {};
+					pm8994_l21: l21 {};
+					pm8994_l22: l22 {};
+					pm8994_l23: l23 {};
+					pm8994_l24: l24 {};
+					pm8994_l25: l25 {};
+					pm8994_l26: l26 {};
+					pm8994_l27: l27 {};
+					pm8994_l28: l28 {};
+					pm8994_l29: l29 {};
+					pm8994_l30: l30 {};
+					pm8994_l31: l31 {};
+					pm8994_l32: l32 {};
+				};
+			};
+		};
+	};
 };
 
 
diff --git a/arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi b/arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi
new file mode 100644
index 0000000..d556aae
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi
@@ -0,0 +1,276 @@
+/* Copyright (c) 2015, LGE Inc. All rights reserved.
+ * Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+&smd_rpm {
+	rpm {
+		rpm_requests {
+			pm8994-regulators {
+
+				vdd_l1-supply = <&pm8994_s1>;
+				vdd_l2_26_28-supply = <&pm8994_s3>;
+				vdd_l3_11-supply = <&pm8994_s3>;
+				vdd_l4_27_31-supply = <&pm8994_s3>;
+				vdd_l5_7-supply = <&pm8994_s3>;
+				vdd_l6_12_32-supply = <&pm8994_s5>;
+				vdd_l8_16_30-supply = <&vreg_vph_pwr>;
+				vdd_l9_10_18_22-supply = <&vreg_vph_pwr>;
+				vdd_l13_19_23_24-supply = <&vreg_vph_pwr>;
+				vdd_l14_15-supply = <&pm8994_s5>;
+				vdd_l17_29-supply = <&vreg_vph_pwr>;
+				vdd_l20_21-supply = <&vreg_vph_pwr>;
+				vdd_l25-supply = <&pm8994_s5>;
+				/*vin_lvs1_2 = <&pm8994_s4>; */
+
+				s1 {
+					regulator-min-microvolt = <800000>;
+					regulator-max-microvolt = <800000>;
+				};
+
+				s2 {
+					/* TODO */
+				};
+
+				s3 {
+					regulator-min-microvolt = <1300000>;
+					regulator-max-microvolt = <1300000>;
+				};
+
+				s4 {
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					regulator-allow-set-load;
+					regulator-system-load = <325000>;
+				};
+
+				s5 {
+					regulator-min-microvolt = <2150000>;
+					regulator-max-microvolt = <2150000>;
+				};
+
+				s7 {
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1000000>;
+				};
+
+				l1 {
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1000000>;
+				};
+
+				l2 {
+					regulator-min-microvolt = <1250000>;
+					regulator-max-microvolt = <1250000>;
+				};
+
+				l3 {
+					regulator-min-microvolt = <1200000>;
+					regulator-max-microvolt = <1200000>;
+				};
+
+				l4 {
+					regulator-min-microvolt = <1225000>;
+					regulator-max-microvolt = <1225000>;
+				};
+
+				l5 {
+					/* TODO */
+				};
+
+				l6 {
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+				};
+
+				l7 {
+					/* TODO */
+				};
+
+				l8 {
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+				};
+
+				l9 {
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+				};
+
+				l10 {
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					qcom,init-voltage = <1800000>;
+				};
+
+				l11 {
+					regulator-min-microvolt = <1200000>;
+					regulator-max-microvolt = <1200000>;
+					qcom,init-voltage = <1200000>;
+				};
+
+				l12 {
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					qcom,init-voltage = <1800000>;
+					proxy-supply = <&pm8994_l12>;
+					qcom,proxy-consumer-enable;
+					qcom,proxy-consumer-current = <10000>;
+					status = "okay";
+				};
+
+				l13 {
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <2950000>;
+					qcom,init-voltage = <2950000>;
+					status = "okay";
+				};
+
+				l14 {
+					regulator-min-microvolt = <1200000>;
+					regulator-max-microvolt = <1200000>;
+					qcom,init-voltage = <1200000>;
+					proxy-supply = <&pm8994_l14>;
+					qcom,proxy-consumer-enable;
+					qcom,proxy-consumer-current = <10000>;
+					status = "okay";
+				};
+
+				l15 {
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					qcom,init-voltage = <1800000>;
+					status = "okay";
+				};
+
+				l16 {
+					regulator-min-microvolt = <2700000>;
+					regulator-max-microvolt = <2700000>;
+					qcom,init-voltage = <2700000>;
+					status = "okay";
+				};
+
+				l17 {
+					regulator-min-microvolt = <2700000>;
+					regulator-max-microvolt = <2700000>;
+					qcom,init-voltage = <2700000>;
+					status = "okay";
+				};
+
+				l18 {
+					regulator-min-microvolt = <3000000>;
+					regulator-max-microvolt = <3000000>;
+					regulator-always-on;
+					qcom,init-voltage = <3000000>;
+					qcom,init-ldo-mode = <1>;
+				};
+
+				l19 {
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					qcom,init-voltage = <1800000>;
+					status = "okay";
+				};
+
+				l20 {
+					regulator-min-microvolt = <2950000>;
+					regulator-max-microvolt = <2950000>;
+					regulator-always-on;
+					regulator-boot-on;
+					regulator-allow-set-load;
+					regulator-system-load = <570000>;
+				};
+
+				l21 {
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					regulator-always-on;
+					qcom,init-voltage = <1800000>;
+				};
+
+				l22 {
+					regulator-min-microvolt = <3100000>;
+					regulator-max-microvolt = <3100000>;
+					qcom,init-voltage = <3100000>;
+				};
+
+				l23 {
+					regulator-min-microvolt = <2800000>;
+					regulator-max-microvolt = <2800000>;
+					qcom,init-voltage = <2800000>;
+				};
+
+				l24 {
+					regulator-min-microvolt = <3075000>;
+					regulator-max-microvolt = <3150000>;
+					qcom,init-voltage = <3075000>;
+				};
+
+				l25 {
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					qcom,init-voltage = <1800000>;
+				};
+
+				l26 {
+					/* TODO: value from downstream
+					regulator-min-microvolt = <987500>;
+					fails to apply */
+				};
+
+				l27 {
+					regulator-min-microvolt = <1050000>;
+					regulator-max-microvolt = <1050000>;
+					qcom,init-voltage = <1050000>;
+				};
+
+				l28 {
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1000000>;
+					qcom,init-voltage = <1000000>;
+					proxy-supply = <&pm8994_l28>;
+					qcom,proxy-consumer-enable;
+					qcom,proxy-consumer-current = <10000>;
+				};
+
+				l29 {
+					/* TODO: Unsupported voltage range.
+					regulator-min-microvolt = <2800000>;
+					regulator-max-microvolt = <2800000>;
+					qcom,init-voltage = <2800000>;
+					*/
+				};
+
+				l30 {
+					/* TODO: get this verified
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					qcom,init-voltage = <1800000>;
+					*/
+				};
+
+				l31 {
+					regulator-min-microvolt = <1262500>;
+					regulator-max-microvolt = <1262500>;
+					qcom,init-voltage = <1262500>;
+				};
+
+				l32 {
+					/* TODO: get this verified
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					qcom,init-voltage = <1800000>;
+					*/
+				};
+			};
+		};
+	};
+};
diff --git a/drivers/regulator/qcom_smd-regulator.c b/drivers/regulator/qcom_smd-regulator.c
index 8ed46a9..a7e8ce7 100644
--- a/drivers/regulator/qcom_smd-regulator.c
+++ b/drivers/regulator/qcom_smd-regulator.c
@@ -443,11 +443,60 @@ static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
 	{}
 };
 
+static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
+	{ "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
+	{ "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
+	{ "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
+	{ "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
+	{ "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
+	{ "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
+	{ "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
+
+	{ "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
+	{ "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
+	{ "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
+	{ "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
+	{ "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
+	{ "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
+	{ "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
+	{ "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
+	{ "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
+	{ "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
+	{ "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
+	{ "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
+	{ "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
+	{ "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
+	{ "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
+	{ "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
+	{ "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
+	{ "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
+	{ "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
+	{ "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
+	{ "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
+	{ "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
+	{ "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
+	{ "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
+	{ "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
+	{ "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
+	{ "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l27" },
+	{ "l28", QCOM_SMD_RPM_LDOA, 28, &pma8084_nldo, "vdd_l28" },
+	{ "l29", QCOM_SMD_RPM_LDOA, 29, &pma8084_nldo, "vdd_l29" },
+	{ "l30", QCOM_SMD_RPM_LDOA, 30, &pma8084_nldo, "vdd_l30" },
+	{ "l31", QCOM_SMD_RPM_LDOA, 31, &pma8084_nldo, "vdd_l31" },
+	{ "l32", QCOM_SMD_RPM_LDOA, 32, &pma8084_nldo, "vdd_l32" },
+
+	{ "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
+	{ "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
+
+	{}
+};
+
 static const struct of_device_id rpm_of_match[] = {
 	{ .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
 	{ .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
 	{ .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
 	{ .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
+	{ .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
 	{}
 };
 MODULE_DEVICE_TABLE(of, rpm_of_match);
-- 
2.6.1

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Re: [PATCH V2 3/4] arm64: dts: Enable SDHCI for Nexus 5X (msm8992)

[Bjorn Andersson]

On Mon 16 Jan 16:58 PST 2017, Jeremy McNicoll wrote:

> Add Nexus 5X (msm8992) SDHCI support, including initial regulator
> entries to support enabling the main SDHCI/MMC.
> 
> The RPM is common between 8992 & 8994 simply reflect reality with
> a shared DT entry.
> 
> The msm8994 RPM regulator talks over SMD to the APPS processor.
> 
> Signed-off-by: Jeremy McNicoll <jeremymc-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
> ---
> 
> Dropped RobH's ACK explicitly after addressing all feedback.
> The reason is that msm8994-smd-rpm.dtsi was created to allow
> for sharing between 8992 & 8994 as the RPM is common between
> the two. 
> 
>  .../bindings/regulator/qcom,smd-rpm-regulator.txt  |  40 +++
>  .../boot/dts/qcom/msm8992-bullhead-rev-101.dts     |   2 +
>  arch/arm64/boot/dts/qcom/msm8992-pins.dtsi         |  82 ++++++
>  arch/arm64/boot/dts/qcom/msm8992.dtsi              | 153 ++++++++++++
>  arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi      | 276 +++++++++++++++++++++
>  drivers/regulator/qcom_smd-regulator.c             |  49 ++++
>  6 files changed, 602 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi
> 
> diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
> index 1f8d6f8..126989b 100644
> --- a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
> +++ b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
> @@ -23,6 +23,7 @@ Regulator nodes are identified by their compatible:
>  		    "qcom,rpm-pm8916-regulators"
>  		    "qcom,rpm-pm8941-regulators"
>  		    "qcom,rpm-pma8084-regulators"
> +		    "qcom,rpm-pm8994-regulators"
>  
>  - vdd_s1-supply:
>  - vdd_s2-supply:
> @@ -97,6 +98,40 @@ Regulator nodes are identified by their compatible:
>  	Definition: reference to regulator supplying the input pin, as
>  		    described in the data sheet
>  
> +- vdd_s1-supply:
> +- vdd_s2-supply:
> +- vdd_s3-supply:
> +- vdd_s4-supply:
> +- vdd_s5-supply:
> +- vdd_s6-supply:
> +- vdd_s7-supply:
> +- vdd_l1_l11-supply:
> +- vdd_l2_l3_l4_l27-supply:
> +- vdd_l5_l7-supply:
> +- vdd_l6_l12_l14_l15_l26-supply:
> +- vdd_l8-supply:
> +- vdd_l9_l10_l13_l20_l23_l24-supply:
> +- vdd_l1_l11-supply:
> +- vdd_l6_l12_l14_l15_l26-supply:
> +- vdd_l16_l25-supply:
> +- vdd_l17-supply:
> +- vdd_l18-supply:
> +- vdd_l19-supply:
> +- vdd_l21-supply:
> +- vdd_l22-supply:
> +- vdd_l16_l25-supply:
> +- vdd_l27-supply:
> +- vdd_l28-supply:
> +- vdd_l29-supply:
> +- vdd_l30-supply:
> +- vdd_l31-supply:
> +- vdd_l32-supply:
> +	Usage: optional (pm8994 only)
> +	Value type: <phandle>
> +	Definition: reference to regulator supplying the input pin, as
> +		    described in the data sheet.

This is not entirely correct and should be part of a "arm64: dts" patch.

It seems to be compatible with the pm8994 patch we've had sitting in the
Linaro tree for msm8996 for some time, so I did send this out; with you
Cc. Please give it a spin.

> +
> +
>  The regulator node houses sub-nodes for each regulator within the device. Each
>  sub-node is identified using the node's name, with valid values listed for each
>  of the pmics below.
> @@ -118,6 +153,11 @@ pma8084:
>  	l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20,
>  	l21, l22, l23, l24, l25, l26, l27, lvs1, lvs2, lvs3, lvs4, 5vs1
>  
> +pm8994:
> +	s1, s2, s3, s4, s5, s6, s7, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,
> +	l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, l26,
> +	l27, l28, l29, l30, l31, l32, lvs1, lvs2
> +
>  The content of each sub-node is defined by the standard binding for regulators -
>  see regulator.txt.
>  
> diff --git a/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts b/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts
> index 4542133..3fc9a33 100644
> --- a/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts
> +++ b/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts
> @@ -39,3 +39,5 @@
>  		};
>  	};
>  };
> +
> +#include "msm8994-smd-rpm.dtsi"
> diff --git a/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
> index d2a26f0..d3ae5ab 100644
> --- a/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
> @@ -35,4 +35,86 @@
>  			bias-pull-down;
>  		};
>  	};
> +
> +	/* 0-3 for sdc1 4-6 for sdc2 */
> +	/* Order of pins */
> +	/* SDC1: CLK -> 0, CMD -> 1, DATA -> 2, RCLK -> 3 */
> +	/* SDC2: CLK -> 4, CMD -> 5, DATA -> 6 */
> +	pmx-sdc1-clk {
> +		sdc1_clk_on: clk-on {
> +			pinmux {
> +				pins = "sdc1_clk";
> +			};

The name of these nodes are insignificant, so you don't have to have a
pinmux and a pinconf, you can describe all properties in one node. I
even think you can flatten this and drop the inner subnode.

> +			pinconf {
> +				pins = "sdc1_clk";
> +				bias-disable = <0>; /* No pull */
> +				drive-strength = <16>; /* 16mA */
> +			};
> +		};
[..]
> diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/qcom/msm8992.dtsi
> index 44b2d37..77edffc 100644
> --- a/arch/arm64/boot/dts/qcom/msm8992.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
> @@ -82,6 +82,12 @@
>  				<0xf9002000 0x1000>;
>  		};
>  
> +		apcs: syscon@f900d000 {
> +			compatible = "syscon";
> +			reg = <0xf900d000 0x2000>;
> +		};
> +
> +

Please send the SMEM/SMD-ification in a separate patch from the sdhci
addition.

>  		timer@f9020000 {
>  			#address-cells = <1>;
>  			#size-cells = <1>;
> @@ -172,12 +178,159 @@
>  			#power-domain-cells = <1>;
>  			reg = <0xfc400000 0x2000>;
>  		};
> +
> +		sdhci1: mmc@f9824900 {
> +			compatible = "qcom,sdhci-msm-v4";
> +			reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
> +			reg-names = "hc_mem", "core_mem";
> +
> +			interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>,
> +					<GIC_SPI 138 IRQ_TYPE_NONE>;
> +			interrupt-names = "hc_irq", "pwr_irq";
> +
> +			clocks = <&clock_gcc GCC_SDCC1_APPS_CLK>,
> +				<&clock_gcc GCC_SDCC1_AHB_CLK>;
> +			clock-names = "core", "iface";
> +
> +			pinctrl-names = "default", "sleep";
> +			pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
> +					&sdc1_rclk_on>;
> +			pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off
> +					&sdc1_rclk_off>;
> +
> +			vdd-supply = <&pm8994_l20>;
> +			qcom,vdd-voltage-level = <2950000 2950000>;
> +			qcom,vdd-current-level = <200 570000>;

These properties are not recognized upstream, please drop.

> +
> +			vdd-io-supply = <&pm8994_s4>;
> +			qcom,vdd-io-voltage-level = <1800000 1800000>;
> +			qcom,vdd-io-current-level = <200 325000>;
> +
> +			regulator-always-on;
> +			bus-width = <8>;
> +			mmc-hs400-1_8v;
> +			status = "okay";
> +		};
> +
> +		vreg_vph_pwr: vreg-vph-pwr {
> +			compatible = "regulator-fixed";
> +			status = "okay";
> +			regulator-name = "vph-pwr";
> +
> +			regulator-min-microvolt = <3600000>;
> +			regulator-max-microvolt = <3600000>;
> +
> +			regulator-always-on;
> +		};

This doesn't have a "reg", so please move it outside "soc"

> +
> +		rpm_msg_ram: memory@fc428000 {
> +			compatible = "qcom,rpm-msg-ram";
> +			reg = <0xfc428000 0x4000>;
> +		};
> +
> +		sfpb_mutex_regs: syscon@fd484000 {
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			compatible = "syscon";
> +			reg = <0xfd484000 0x400>;
> +		};
> +
> +		sfpb_mutex: hwmutex {
> +			compatible = "qcom,sfpb-mutex";
> +			syscon = <&sfpb_mutex_regs 0x0 0x100>;
> +			#hwlock-cells = <1>;
> +		};
> +
> +		smem {
> +			compatible = "qcom,smem";
> +			memory-region = <&smem_region>;
> +			qcom,rpm-msg-ram = <&rpm_msg_ram>;
> +			hwlocks = <&sfpb_mutex 3>;
> +		};

The smem enablement here looks reasonable, please split into a separate
patch.

>  	};
>  
>  	memory {
>  		device_type = "memory";
>  		reg = <0 0 0 0>; // bootloader will update
>  	};
> +
> +	reserved-memory {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		smem_region: smem@6a00000 {
> +			reg = <0x0 0x6a00000 0x0 0x200000>;
> +			no-map;
> +		};
> +	};
> +
> +	smd_rpm: smd {

You don't have to reference this by label, just saying "/smd" will work
just as well.

> +		compatible = "qcom,smd";
> +
> +		rpm {
> +			interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
> +			qcom,ipc = <&apcs 8 0>;
> +			qcom,smd-edge = <15>;
> +			qcom,local-pid = <0>;
> +			qcom,remote-pid = <6>;
> +
> +			rpm-requests {
> +				compatible = "qcom,rpm-msm8994";
> +				qcom,smd-channels = "rpm_requests";
> +
> +				rpmcc: qcom,rpmcc {
> +					/* TODO: update when rpmcc-msm8994 support added */
> +					compatible = "qcom,rpmcc-msm8916",
> +							"qcom,rpmcc";
> +					#clock-cells = <1>;
> +				};

You're not compatible with qcom,rpmcc-msm8916, so don't fool the kernel
to think you are. Just drop this node until you have a rpmcc and need
it.

> +
> +				smd_rpm_regulators: pm8994-regulators {

This label is unused.

> +					compatible = "qcom,rpm-pm8994-regulators";
> +
> +					pm8994_s1: s1 {};
> +					pm8994_s2: s2 {};
> +					pm8994_s3: s3 {};
> +					pm8994_s4: s4 {};
> +					pm8994_s5: s5 {};
> +					pm8994_s6: s6 {};
> +					pm8994_s7: s7 {};
> +
> +					pm8994_l1: l1 {};
> +					pm8994_l2: l2 {};
> +					pm8994_l3: l3 {};
> +					pm8994_l4: l4 {};
> +					pm8994_l6: l6 {};
> +					pm8994_l8: l8 {};
> +					pm8994_l9: l9 {};
> +					pm8994_l10: l10 {};
> +					pm8994_l11: l11 {};
> +					pm8994_l12: l12 {};
> +					pm8994_l13: l13 {};
> +					pm8994_l14: l14 {};
> +					pm8994_l15: l15 {};
> +					pm8994_l16: l16 {};
> +					pm8994_l17: l17 {};
> +					pm8994_l18: l18 {};
> +					pm8994_l19: l19 {};
> +					pm8994_l20: l20 {};
> +					pm8994_l21: l21 {};
> +					pm8994_l22: l22 {};
> +					pm8994_l23: l23 {};
> +					pm8994_l24: l24 {};
> +					pm8994_l25: l25 {};
> +					pm8994_l26: l26 {};
> +					pm8994_l27: l27 {};
> +					pm8994_l28: l28 {};
> +					pm8994_l29: l29 {};
> +					pm8994_l30: l30 {};
> +					pm8994_l31: l31 {};
> +					pm8994_l32: l32 {};

Add lvs1 & lvs2.

> +				};
> +			};
> +		};
> +	};
>  };
>  
>  
> diff --git a/arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi b/arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi

These rpm settings are not for msm8994, they are for your device. So
please drop this file and move below nodes into your device dts.

[..]
> +&smd_rpm {
> +	rpm {
> +		rpm_requests {
> +			pm8994-regulators {
> +
> +				vdd_l1-supply = <&pm8994_s1>;
> +				vdd_l2_26_28-supply = <&pm8994_s3>;
> +				vdd_l3_11-supply = <&pm8994_s3>;
> +				vdd_l4_27_31-supply = <&pm8994_s3>;
> +				vdd_l5_7-supply = <&pm8994_s3>;
> +				vdd_l6_12_32-supply = <&pm8994_s5>;
> +				vdd_l8_16_30-supply = <&vreg_vph_pwr>;
> +				vdd_l9_10_18_22-supply = <&vreg_vph_pwr>;
> +				vdd_l13_19_23_24-supply = <&vreg_vph_pwr>;
> +				vdd_l14_15-supply = <&pm8994_s5>;
> +				vdd_l17_29-supply = <&vreg_vph_pwr>;
> +				vdd_l20_21-supply = <&vreg_vph_pwr>;
> +				vdd_l25-supply = <&pm8994_s5>;
> +				/*vin_lvs1_2 = <&pm8994_s4>; */

I added this to the pm8994 regulator patch I just sent out, called it
"vdd_lvs1_2".

> +
[..]
> diff --git a/drivers/regulator/qcom_smd-regulator.c b/drivers/regulator/qcom_smd-regulator.c
[..]
>  
> +static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
> +	{ "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },

As with the binding, this isn't entirely correct. Please see my
submitted patch.

Regards,
Bjorn
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Re: [PATCH V2 3/4] arm64: dts: Enable SDHCI for Nexus 5X (msm8992)

[Jeremy McNicoll]

On Wed, Jan 18, 2017 at 11:02:57AM -0800, Bjorn Andersson wrote:
> On Mon 16 Jan 16:58 PST 2017, Jeremy McNicoll wrote:
> 
> > Add Nexus 5X (msm8992) SDHCI support, including initial regulator
> > entries to support enabling the main SDHCI/MMC.
> > 
> > The RPM is common between 8992 & 8994 simply reflect reality with
> > a shared DT entry.
> > 
> > The msm8994 RPM regulator talks over SMD to the APPS processor.
> > 
> > Signed-off-by: Jeremy McNicoll <jeremymc-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
> > ---
> > 
> > Dropped RobH's ACK explicitly after addressing all feedback.
> > The reason is that msm8994-smd-rpm.dtsi was created to allow
> > for sharing between 8992 & 8994 as the RPM is common between
> > the two. 
> > 
> >  .../bindings/regulator/qcom,smd-rpm-regulator.txt  |  40 +++
> >  .../boot/dts/qcom/msm8992-bullhead-rev-101.dts     |   2 +
> >  arch/arm64/boot/dts/qcom/msm8992-pins.dtsi         |  82 ++++++
> >  arch/arm64/boot/dts/qcom/msm8992.dtsi              | 153 ++++++++++++
> >  arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi      | 276 +++++++++++++++++++++
> >  drivers/regulator/qcom_smd-regulator.c             |  49 ++++
> >  6 files changed, 602 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi
> > 
> > diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
> > index 1f8d6f8..126989b 100644
> > --- a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
> > +++ b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
> > @@ -23,6 +23,7 @@ Regulator nodes are identified by their compatible:
> >  		    "qcom,rpm-pm8916-regulators"
> >  		    "qcom,rpm-pm8941-regulators"
> >  		    "qcom,rpm-pma8084-regulators"
> > +		    "qcom,rpm-pm8994-regulators"
> >  
> >  - vdd_s1-supply:
> >  - vdd_s2-supply:
> > @@ -97,6 +98,40 @@ Regulator nodes are identified by their compatible:
> >  	Definition: reference to regulator supplying the input pin, as
> >  		    described in the data sheet
> >  
> > +- vdd_s1-supply:
> > +- vdd_s2-supply:
> > +- vdd_s3-supply:
> > +- vdd_s4-supply:
> > +- vdd_s5-supply:
> > +- vdd_s6-supply:
> > +- vdd_s7-supply:
> > +- vdd_l1_l11-supply:
> > +- vdd_l2_l3_l4_l27-supply:
> > +- vdd_l5_l7-supply:
> > +- vdd_l6_l12_l14_l15_l26-supply:
> > +- vdd_l8-supply:
> > +- vdd_l9_l10_l13_l20_l23_l24-supply:
> > +- vdd_l1_l11-supply:
> > +- vdd_l6_l12_l14_l15_l26-supply:
> > +- vdd_l16_l25-supply:
> > +- vdd_l17-supply:
> > +- vdd_l18-supply:
> > +- vdd_l19-supply:
> > +- vdd_l21-supply:
> > +- vdd_l22-supply:
> > +- vdd_l16_l25-supply:
> > +- vdd_l27-supply:
> > +- vdd_l28-supply:
> > +- vdd_l29-supply:
> > +- vdd_l30-supply:
> > +- vdd_l31-supply:
> > +- vdd_l32-supply:
> > +	Usage: optional (pm8994 only)
> > +	Value type: <phandle>
> > +	Definition: reference to regulator supplying the input pin, as
> > +		    described in the data sheet.
> 
> This is not entirely correct and should be part of a "arm64: dts" patch.
>

.... but the title of this patch is "[PATCH V2 3/4] arm64: dts: Enable
SDHCI for Nexus 5X (msm8992)" which has the 'arm64: dts:' you are
referring to.

A new patch?  

> It seems to be compatible with the pm8994 patch we've had sitting in the
> Linaro tree for msm8996 for some time, so I did send this out; with you
> Cc. Please give it a spin.
>


Seems to work just fine.  I'll drop my changes which are covered in the
afore mentioned patch.  There seems to be a delta between what I have
and what you sent, nothing major and the few peripherals supported thus
far still seem to be working.

> > +
> > +
> >  The regulator node houses sub-nodes for each regulator within the device. Each
> >  sub-node is identified using the node's name, with valid values listed for each
> >  of the pmics below.
> > @@ -118,6 +153,11 @@ pma8084:
> >  	l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20,
> >  	l21, l22, l23, l24, l25, l26, l27, lvs1, lvs2, lvs3, lvs4, 5vs1
> >  
> > +pm8994:
> > +	s1, s2, s3, s4, s5, s6, s7, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,
> > +	l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, l26,
> > +	l27, l28, l29, l30, l31, l32, lvs1, lvs2
> > +
> >  The content of each sub-node is defined by the standard binding for regulators -
> >  see regulator.txt.
> >  
> > diff --git a/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts b/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts
> > index 4542133..3fc9a33 100644
> > --- a/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts
> > +++ b/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts
> > @@ -39,3 +39,5 @@
> >  		};
> >  	};
> >  };
> > +
> > +#include "msm8994-smd-rpm.dtsi"
> > diff --git a/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
> > index d2a26f0..d3ae5ab 100644
> > --- a/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
> > @@ -35,4 +35,86 @@
> >  			bias-pull-down;
> >  		};
> >  	};
> > +
> > +	/* 0-3 for sdc1 4-6 for sdc2 */
> > +	/* Order of pins */
> > +	/* SDC1: CLK -> 0, CMD -> 1, DATA -> 2, RCLK -> 3 */
> > +	/* SDC2: CLK -> 4, CMD -> 5, DATA -> 6 */
> > +	pmx-sdc1-clk {
> > +		sdc1_clk_on: clk-on {
> > +			pinmux {
> > +				pins = "sdc1_clk";
> > +			};
> 
> The name of these nodes are insignificant, so you don't have to have a
> pinmux and a pinconf, you can describe all properties in one node. I
> even think you can flatten this and drop the inner subnode.
>

Seems reasonable and a little bit more readable. 


> > +			pinconf {
> > +				pins = "sdc1_clk";
> > +				bias-disable = <0>; /* No pull */
> > +				drive-strength = <16>; /* 16mA */
> > +			};
> > +		};
> [..]
> > diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/qcom/msm8992.dtsi
> > index 44b2d37..77edffc 100644
> > --- a/arch/arm64/boot/dts/qcom/msm8992.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
> > @@ -82,6 +82,12 @@
> >  				<0xf9002000 0x1000>;
> >  		};
> >  
> > +		apcs: syscon@f900d000 {
> > +			compatible = "syscon";
> > +			reg = <0xf900d000 0x2000>;
> > +		};
> > +
> > +
> 
> Please send the SMEM/SMD-ification in a separate patch from the sdhci
> addition.
>

sounds good.


> >  		timer@f9020000 {
> >  			#address-cells = <1>;
> >  			#size-cells = <1>;
> > @@ -172,12 +178,159 @@
> >  			#power-domain-cells = <1>;
> >  			reg = <0xfc400000 0x2000>;
> >  		};
> > +
> > +		sdhci1: mmc@f9824900 {
> > +			compatible = "qcom,sdhci-msm-v4";
> > +			reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
> > +			reg-names = "hc_mem", "core_mem";
> > +
> > +			interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>,
> > +					<GIC_SPI 138 IRQ_TYPE_NONE>;
> > +			interrupt-names = "hc_irq", "pwr_irq";
> > +
> > +			clocks = <&clock_gcc GCC_SDCC1_APPS_CLK>,
> > +				<&clock_gcc GCC_SDCC1_AHB_CLK>;
> > +			clock-names = "core", "iface";
> > +
> > +			pinctrl-names = "default", "sleep";
> > +			pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
> > +					&sdc1_rclk_on>;
> > +			pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off
> > +					&sdc1_rclk_off>;
> > +
> > +			vdd-supply = <&pm8994_l20>;
> > +			qcom,vdd-voltage-level = <2950000 2950000>;
> > +			qcom,vdd-current-level = <200 570000>;
> 
> These properties are not recognized upstream, please drop.
>

I believe at one point I needed them in order to use some pre-merged
patches.  It was a stop gap until the latest SDHCI changes were sent
and now have been merged.

dropped.


> > +
> > +			vdd-io-supply = <&pm8994_s4>;
> > +			qcom,vdd-io-voltage-level = <1800000 1800000>;
> > +			qcom,vdd-io-current-level = <200 325000>;
> > +
> > +			regulator-always-on;
> > +			bus-width = <8>;
> > +			mmc-hs400-1_8v;
> > +			status = "okay";
> > +		};
> > +
> > +		vreg_vph_pwr: vreg-vph-pwr {
> > +			compatible = "regulator-fixed";
> > +			status = "okay";
> > +			regulator-name = "vph-pwr";
> > +
> > +			regulator-min-microvolt = <3600000>;
> > +			regulator-max-microvolt = <3600000>;
> > +
> > +			regulator-always-on;
> > +		};
> 
> This doesn't have a "reg", so please move it outside "soc"

done and created a patch with just the fixed regulator change on its
own.


> 
> > +
> > +		rpm_msg_ram: memory@fc428000 {
> > +			compatible = "qcom,rpm-msg-ram";
> > +			reg = <0xfc428000 0x4000>;
> > +		};
> > +
> > +		sfpb_mutex_regs: syscon@fd484000 {
> > +			#address-cells = <1>;
> > +			#size-cells = <1>;
> > +			compatible = "syscon";
> > +			reg = <0xfd484000 0x400>;
> > +		};
> > +
> > +		sfpb_mutex: hwmutex {
> > +			compatible = "qcom,sfpb-mutex";
> > +			syscon = <&sfpb_mutex_regs 0x0 0x100>;
> > +			#hwlock-cells = <1>;
> > +		};
> > +
> > +		smem {
> > +			compatible = "qcom,smem";
> > +			memory-region = <&smem_region>;
> > +			qcom,rpm-msg-ram = <&rpm_msg_ram>;
> > +			hwlocks = <&sfpb_mutex 3>;
> > +		};
> 
> The smem enablement here looks reasonable, please split into a separate
> patch.
>

Can the rpm_msg_ram be considered as part of SMEM ?

> >  	};
> >  
> >  	memory {
> >  		device_type = "memory";
> >  		reg = <0 0 0 0>; // bootloader will update
> >  	};
> > +
> > +	reserved-memory {
> > +		#address-cells = <2>;
> > +		#size-cells = <2>;
> > +		ranges;
> > +
> > +		smem_region: smem@6a00000 {
> > +			reg = <0x0 0x6a00000 0x0 0x200000>;
> > +			no-map;
> > +		};
> > +	};
> > +
> > +	smd_rpm: smd {
> 
> You don't have to reference this by label, just saying "/smd" will work
> just as well.
> 

msm8994-smd-rpm.dtsi is referencing it.  See below. 


> > +		compatible = "qcom,smd";
> > +
> > +		rpm {
> > +			interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
> > +			qcom,ipc = <&apcs 8 0>;
> > +			qcom,smd-edge = <15>;
> > +			qcom,local-pid = <0>;
> > +			qcom,remote-pid = <6>;
> > +
> > +			rpm-requests {
> > +				compatible = "qcom,rpm-msm8994";
> > +				qcom,smd-channels = "rpm_requests";
> > +
> > +				rpmcc: qcom,rpmcc {
> > +					/* TODO: update when rpmcc-msm8994 support added */
> > +					compatible = "qcom,rpmcc-msm8916",
> > +							"qcom,rpmcc";
> > +					#clock-cells = <1>;
> > +				};
> 
> You're not compatible with qcom,rpmcc-msm8916, so don't fool the kernel
> to think you are. Just drop this node until you have a rpmcc and need
> it.
>

dropped

> > +
> > +				smd_rpm_regulators: pm8994-regulators {
> 
> This label is unused.
>

gone

> > +					compatible = "qcom,rpm-pm8994-regulators";
> > +
> > +					pm8994_s1: s1 {};
> > +					pm8994_s2: s2 {};
> > +					pm8994_s3: s3 {};
> > +					pm8994_s4: s4 {};
> > +					pm8994_s5: s5 {};
> > +					pm8994_s6: s6 {};
> > +					pm8994_s7: s7 {};
> > +
> > +					pm8994_l1: l1 {};
> > +					pm8994_l2: l2 {};
> > +					pm8994_l3: l3 {};
> > +					pm8994_l4: l4 {};
> > +					pm8994_l6: l6 {};
> > +					pm8994_l8: l8 {};
> > +					pm8994_l9: l9 {};
> > +					pm8994_l10: l10 {};
> > +					pm8994_l11: l11 {};
> > +					pm8994_l12: l12 {};
> > +					pm8994_l13: l13 {};
> > +					pm8994_l14: l14 {};
> > +					pm8994_l15: l15 {};
> > +					pm8994_l16: l16 {};
> > +					pm8994_l17: l17 {};
> > +					pm8994_l18: l18 {};
> > +					pm8994_l19: l19 {};
> > +					pm8994_l20: l20 {};
> > +					pm8994_l21: l21 {};
> > +					pm8994_l22: l22 {};
> > +					pm8994_l23: l23 {};
> > +					pm8994_l24: l24 {};
> > +					pm8994_l25: l25 {};
> > +					pm8994_l26: l26 {};
> > +					pm8994_l27: l27 {};
> > +					pm8994_l28: l28 {};
> > +					pm8994_l29: l29 {};
> > +					pm8994_l30: l30 {};
> > +					pm8994_l31: l31 {};
> > +					pm8994_l32: l32 {};
> 
> Add lvs1 & lvs2.
> 

ok


> > +				};
> > +			};
> > +		};
> > +	};
> >  };
> >  
> >  
> > diff --git a/arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi b/arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi
> 
> These rpm settings are not for msm8994, they are for your device. So
> please drop this file and move below nodes into your device dts.
>

Looks like the 8994-rpm-regulator is common between both 8992 & 8994. 

Downstream seems to imply that its common. (see lines 3117->3119)

https://android.googlesource.com/kernel/msm.git/+/android-msm-angler-3.10-marshmallow-mr1/arch/arm/boot/dts/qcom/msm8992.dtsi

Do the docs say otherwise? (can only rely on downstream as I don't have
access to the docs).

Also, when testing Bastien's changes on a Nexus 6P which used the same
settings for the RPM as this patch the few peripherals which are enabled
at this point seemed to work.  

> [..]
> > +&smd_rpm {
> > +	rpm {
> > +		rpm_requests {
> > +			pm8994-regulators {
> > +
> > +				vdd_l1-supply = <&pm8994_s1>;
> > +				vdd_l2_26_28-supply = <&pm8994_s3>;
> > +				vdd_l3_11-supply = <&pm8994_s3>;
> > +				vdd_l4_27_31-supply = <&pm8994_s3>;
> > +				vdd_l5_7-supply = <&pm8994_s3>;
> > +				vdd_l6_12_32-supply = <&pm8994_s5>;
> > +				vdd_l8_16_30-supply = <&vreg_vph_pwr>;
> > +				vdd_l9_10_18_22-supply = <&vreg_vph_pwr>;
> > +				vdd_l13_19_23_24-supply = <&vreg_vph_pwr>;
> > +				vdd_l14_15-supply = <&pm8994_s5>;
> > +				vdd_l17_29-supply = <&vreg_vph_pwr>;
> > +				vdd_l20_21-supply = <&vreg_vph_pwr>;
> > +				vdd_l25-supply = <&pm8994_s5>;
> > +				/*vin_lvs1_2 = <&pm8994_s4>; */
> 
> I added this to the pm8994 regulator patch I just sent out, called it
> "vdd_lvs1_2".

good, uncommented it. 

> 
> > +
> [..]
> > diff --git a/drivers/regulator/qcom_smd-regulator.c b/drivers/regulator/qcom_smd-regulator.c
> [..]
> >  
> > +static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
> > +	{ "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
> 
> As with the binding, this isn't entirely correct. Please see my
> submitted patch.
>

I'll go with it as it seems to work for the few peripherals that
are enabled thus far.

-jeremy

> Regards,
> Bjorn
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Re: [PATCH V2 3/4] arm64: dts: Enable SDHCI for Nexus 5X (msm8992)

[Rob Herring]

On Mon, Jan 16, 2017 at 04:58:48PM -0800, Jeremy McNicoll wrote:
> Add Nexus 5X (msm8992) SDHCI support, including initial regulator
> entries to support enabling the main SDHCI/MMC.
> 
> The RPM is common between 8992 & 8994 simply reflect reality with
> a shared DT entry.
> 
> The msm8994 RPM regulator talks over SMD to the APPS processor.
> 
> Signed-off-by: Jeremy McNicoll <jeremymc-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
> ---
> 
> Dropped RobH's ACK explicitly after addressing all feedback.
> The reason is that msm8994-smd-rpm.dtsi was created to allow
> for sharing between 8992 & 8994 as the RPM is common between
> the two. 
> 
>  .../bindings/regulator/qcom,smd-rpm-regulator.txt  |  40 +++
>  .../boot/dts/qcom/msm8992-bullhead-rev-101.dts     |   2 +
>  arch/arm64/boot/dts/qcom/msm8992-pins.dtsi         |  82 ++++++
>  arch/arm64/boot/dts/qcom/msm8992.dtsi              | 153 ++++++++++++
>  arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi      | 276 +++++++++++++++++++++

Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

>  drivers/regulator/qcom_smd-regulator.c             |  49 ++++
>  6 files changed, 602 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi
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[PATCH V2 4/4] dts: doc: rename rpm_requests to respect DT naming conventions

[Jeremy McNicoll]

Node names cannot have an underscore '_' in the name.
Simply rename 'rpm_request' nodes to 'rpm-request'.

Signed-off-by: Jeremy McNicoll <jeremymc-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
---
 Documentation/devicetree/bindings/clock/qcom,rpmcc.txt              | 2 +-
 .../devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt        | 2 +-
 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt         | 6 +++---
 Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt             | 2 +-
 arch/arm/boot/dts/qcom-apq8074-dragonboard.dts                      | 2 +-
 arch/arm/boot/dts/qcom-apq8084.dtsi                                 | 2 +-
 arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts            | 2 +-
 arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts               | 2 +-
 arch/arm/boot/dts/qcom-msm8974.dtsi                                 | 2 +-
 arch/arm64/boot/dts/qcom/msm8916.dtsi                               | 2 +-
 arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi                       | 2 +-
 11 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
index a7235e9..845dd57 100644
--- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
+++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
@@ -25,7 +25,7 @@ Example:
 			qcom,ipc = <&apcs 8 0>;
 			qcom,smd-edge = <15>;
 
-			rpm_requests {
+			rpm-requests {
 				compatible = "qcom,rpm-msm8916";
 				qcom,smd-channels = "rpm_requests";
 
diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
index 126989b..e4799a4 100644
--- a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
+++ b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
@@ -171,7 +171,7 @@ see regulator.txt.
 			qcom,ipc = <&apcs 8 0>;
 			qcom,smd-edge = <15>;
 
-			rpm_requests {
+			rpm-requests {
 				compatible = "qcom,rpm-msm8974";
 				qcom,smd-channels = "rpm_requests";
 
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
index a48049c..30e1c75 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
@@ -11,7 +11,7 @@ RPM node itself.
 
 = SUBDEVICES
 
-The RPM exposes resources to its subnodes.  The rpm_requests node must be
+The RPM exposes resources to its subnodes.  The rpm-requests node must be
 present and this subnode may contain children that designate regulator
 resources.
 
@@ -29,7 +29,7 @@ resources.
 	Definition: must be "rpm_requests"
 
 Refer to Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
-for information on the regulator subnodes that can exist under the rpm_requests.
+for information on the regulator subnodes that can exist under the rpm-requests.
 
 Example:
 
@@ -48,7 +48,7 @@ Example:
 			qcom,ipc = <&apcs 8 0>;
 			qcom,smd-edge = <15>;
 
-			rpm_requests {
+			rpm-requests {
 				compatible = "qcom,rpm-msm8974";
 				qcom,smd-channels = "rpm_requests";
 
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt
index 97d9b3e..34b05c3 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt
@@ -75,7 +75,7 @@ The following example represents a smd node, with one edge representing the
 			qcom,ipc = <&apcs 8 0>;
 			qcom,smd-edge = <15>;
 
-			rpm_requests {
+			rpm-requests {
 				compatible = "qcom,rpm-msm8974";
 				qcom,smd-channels = "rpm_requests";
 
diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
index ad51df2..ccae434 100644
--- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
+++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
@@ -126,7 +126,7 @@
 
 	smd {
 		rpm {
-			rpm_requests {
+			rpm-requests {
 				pm8841-regulators {
 					s1 {
 						regulator-min-microvolt = <675000>;
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 39eb7a4..ac3ec7d 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -457,7 +457,7 @@
 			qcom,ipc = <&apcs 8 0>;
 			qcom,smd-edge = <15>;
 
-			rpm_requests {
+			rpm-requests {
 				compatible = "qcom,rpm-apq8084";
 				qcom,smd-channels = "rpm_requests";
 
diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
index c0fb4a6..890566b 100644
--- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
@@ -19,7 +19,7 @@
 
 	smd {
 		rpm {
-			rpm_requests {
+			rpm-requests {
 				pm8841-regulators {
 					s1 {
 						regulator-min-microvolt = <675000>;
diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts
index e7c1577..ec937c9 100644
--- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts
@@ -60,7 +60,7 @@
 
 	smd {
 		rpm {
-			rpm_requests {
+			rpm-requests {
 				pm8841-regulators {
 					s1 {
 						regulator-min-microvolt = <675000>;
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index d210947..cb9cd53 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -668,7 +668,7 @@
 			qcom,ipc = <&apcs 8 0>;
 			qcom,smd-edge = <15>;
 
-			rpm_requests {
+			rpm-requests {
 				compatible = "qcom,rpm-msm8974";
 				qcom,smd-channels = "rpm_requests";
 
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index ed15e87..247fc51 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -812,7 +812,7 @@
 			qcom,ipc = <&apcs 8 0>;
 			qcom,smd-edge = <15>;
 
-			rpm_requests {
+			rpm-requests {
 				compatible = "qcom,rpm-msm8916";
 				qcom,smd-channels = "rpm_requests";
 
diff --git a/arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi b/arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi
index d556aae..36fc582 100644
--- a/arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi
@@ -13,7 +13,7 @@
 
 &smd-rpm {
 	rpm {
-		rpm_requests {
+		rpm-requests {
 			pm8994-regulators {
 
 				vdd_l1-supply = <&pm8994_s1>;
-- 
2.6.1

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Re: [PATCH V2 4/4] dts: doc: rename rpm_requests to respect DT naming conventions

[Rob Herring]

On Mon, Jan 16, 2017 at 04:58:49PM -0800, Jeremy McNicoll wrote:
> Node names cannot have an underscore '_' in the name.
> Simply rename 'rpm_request' nodes to 'rpm-request'.
> 
> Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
> ---
>  Documentation/devicetree/bindings/clock/qcom,rpmcc.txt              | 2 +-
>  .../devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt        | 2 +-
>  Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt         | 6 +++---
>  Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt             | 2 +-
>  arch/arm/boot/dts/qcom-apq8074-dragonboard.dts                      | 2 +-
>  arch/arm/boot/dts/qcom-apq8084.dtsi                                 | 2 +-
>  arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts            | 2 +-
>  arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts               | 2 +-
>  arch/arm/boot/dts/qcom-msm8974.dtsi                                 | 2 +-
>  arch/arm64/boot/dts/qcom/msm8916.dtsi                               | 2 +-
>  arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi                       | 2 +-
>  11 files changed, 13 insertions(+), 13 deletions(-)

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH V2 4/4] dts: doc: rename rpm_requests to respect DT naming conventions

[Jeremy McNicoll]

On Mon, Jan 16, 2017 at 04:58:49PM -0800, Jeremy McNicoll wrote:
> Node names cannot have an underscore '_' in the name.
> Simply rename 'rpm_request' nodes to 'rpm-request'.
> 
> Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
> ---
>  Documentation/devicetree/bindings/clock/qcom,rpmcc.txt              | 2 +-
>  .../devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt        | 2 +-
>  Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt         | 6 +++---
>  Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt             | 2 +-
>  arch/arm/boot/dts/qcom-apq8074-dragonboard.dts                      | 2 +-
>  arch/arm/boot/dts/qcom-apq8084.dtsi                                 | 2 +-
>  arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts            | 2 +-
>  arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts               | 2 +-
>  arch/arm/boot/dts/qcom-msm8974.dtsi                                 | 2 +-
>  arch/arm64/boot/dts/qcom/msm8916.dtsi                               | 2 +-
>  arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi                       | 2 +-
>  11 files changed, 13 insertions(+), 13 deletions(-)
>

Just in case someone trips over this thread in the future.

Table 2.1 from http://www.devicetree.org/specifications-pdf
provides useful information on naming conventions.

-jeremy