From: "Biao Huang (黄彪)" <Biao.Huang@mediatek.com>
To: "andrew@lunn.ch" <andrew@lunn.ch>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
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<angelogioacchino.delregno@collabora.com>
Subject: Re: [PATCH v6 2/2] arm64: dts: mt8195: Add Ethernet controller
Date: Thu, 29 Dec 2022 02:46:00 +0000 [thread overview]
Message-ID: <5b4df04a2b99c3a09820608c3382f2ddc82e5eda.camel@mediatek.com> (raw)
In-Reply-To: <Y6zoI3XYnFFbN/Z5@lunn.ch>
On Thu, 2022-12-29 at 02:06 +0100, Andrew Lunn wrote:
> > > Is the PHY integrated into the SoC, or on the board?
> >
> > The PHY is on the board, an external device as to SoC.
> > >
> > > You also don't need the compatible, if the PHY correctly
> > > implements
> > > the ID registers.
> >
> > But without the compatible, it seems PHY driver will not be
> > attached.
> > How should I do? Thanks in advance.
>
> Check what happens in mdiobus_scan() and get_phy_device(). When it
> reads registers 2 and 3, does it get valid ID register contents?
Yes, I tried remove the compatible, and PHY driver is attached as
expected. I'll remove the phy compatible in next send.
>
> Andrew
As to the "Confidentiality Notice", I have asked our IT to handle it.
Hope no such notice now.
Best Regards!
Biao
next prev parent reply other threads:[~2022-12-29 2:46 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-28 6:33 [PATCH v6 0/2] arm64: dts: mt8195: Add Ethernet controller Biao Huang
2022-12-28 6:33 ` [PATCH v6 1/2] stmmac: dwmac-mediatek: remove the dwmac_fix_mac_speed Biao Huang
2022-12-28 6:33 ` [PATCH v6 2/2] arm64: dts: mt8195: Add Ethernet controller Biao Huang
2022-12-28 16:13 ` Andrew Lunn
2022-12-29 0:42 ` Biao Huang (黄彪)
2022-12-29 1:06 ` Andrew Lunn
2022-12-29 2:46 ` Biao Huang (黄彪) [this message]
2022-12-30 1:15 ` [PATCH v6 0/2] " Jakub Kicinski
2022-12-30 2:10 ` Biao Huang (黄彪)
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