* [PATCH 0/8] Add support for drm/rockchip to dynamically control the DDR frequency.
@ 2018-07-30 8:11 Enric Balletbo i Serra
2018-07-30 8:11 ` [PATCH 2/8] dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle Enric Balletbo i Serra
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Enric Balletbo i Serra @ 2018-07-30 8:11 UTC (permalink / raw)
To: MyungJoo Ham, Kyungmin Park, Chanwoo Choi, Rob Herring,
Will Deacon, Heiko Stuebner, Michael Turquette, Stephen Boyd,
Sandy Huang, David Airlie
Cc: linux-pm, linux-kernel, Derek Basehore, linux-clk, linux-rockchip,
dri-devel, Lin Huang, kernel, robin.murphy, Sean Paul,
linux-arm-kernel, Catalin Marinas, Mark Yao, Jacob Chen,
Brian Norris, Douglas Anderson, Jeffy Chen, Nickey Yang,
devicetree, Klaus Goger, Randy Li, Chris Zhong
Dear all,
The rk3399 platform has a DFI controller that can monitor DDR load and a
DMC driver that talks with the TF-A (Trusted Firmware-A) to dynamically
set the DDR frequency with following flow.
kernel Trusted Firmware-A
(bl31)
monitor ddr load
|
|
get_target_rate
|
| pass rate to TF-A
clk_set_rate(ddr) --------------------->run ddr dvs flow
|
|
<------------------------------end ddr dvs flow
|
|
return
These patches add support for devfreq to dynamically control the DDR
frequency into the drm rockchip driver. By default it uses the
'simple_ondemand' governor which can adjust the frequency based on the
DDR load.
Waiting for your feedback.
Best regards,
Enric
Changes in v1:
- [RFC 1/10] Add Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
- [RFC 1/10] s/Generic/General/ (Robin Murphy)
- [RFC 2/10] Add reviewed and acked tags from Chanwoo Choi and Rob Herring
- [RFC 3/10] Add an explanation for platform SIP calls.
- [RFC 3/10] Change if statement for a switch.
- [RFC 3/10] Rename ddr_flag to odt_enable to be more clear.
- [RFC 4/10] Removed from the series. I did not found a use case where not holding the mutex causes the issue.
- [RFC 7/10] Removed from the series. I did not found a use case where this matters.
- [RFC 8/10] Move rk3399-dram.h to dt-includes.
- [RFC 8/10] Put sdram default values under the dmc node.
- [RFC 8/10] Removed rk3399-dram-default-timing.dts
Derek Basehore (2):
devfreq: rk3399_dmc / clk: rockchip: Sync with vblank in the kernel
for DDRfreq.
devfreq: rk3399_dmc / clk: rockchip: Disable DDR clk timeout on
suspend.
Enric Balletbo i Serra (3):
devfreq: rockchip-dfi: Move GRF definitions to a common place.
dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle.
devfreq: rk3399_dmc: Pass ODT and auto power down parameters to TF-A.
Lin Huang (2):
arm64: dts: rk3399: Add dfi and dmc nodes.
arm64: dts: rockchip: Enable dmc and dfi nodes on gru.
Sean Paul (1):
drm: rockchip: Add DDR devfreq support.
.../bindings/devfreq/rk3399_dmc.txt | 2 +
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 21 ++
.../boot/dts/rockchip/rk3399-op1-opp.dtsi | 29 +++
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 51 ++++-
drivers/clk/rockchip/clk-ddr.c | 157 +++++++++++--
drivers/clk/rockchip/clk.c | 2 +-
drivers/clk/rockchip/clk.h | 3 +-
drivers/devfreq/event/rockchip-dfi.c | 23 +-
drivers/devfreq/rk3399_dmc.c | 209 +++++++++++++++---
drivers/devfreq/rk3399_dmc_priv.h | 16 ++
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 46 ++++
drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 9 +
drivers/gpu/drm/rockchip/rockchip_drm_fb.c | 35 +++
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 34 +++
include/dt-bindings/power/rk3399-dram.h | 73 ++++++
include/soc/rockchip/rk3399_dmc.h | 42 ++++
include/soc/rockchip/rk3399_grf.h | 21 ++
include/soc/rockchip/rockchip_sip.h | 1 +
18 files changed, 704 insertions(+), 70 deletions(-)
create mode 100644 drivers/devfreq/rk3399_dmc_priv.h
create mode 100644 include/dt-bindings/power/rk3399-dram.h
create mode 100644 include/soc/rockchip/rk3399_dmc.h
create mode 100644 include/soc/rockchip/rk3399_grf.h
--
2.18.0
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/8] dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle.
2018-07-30 8:11 [PATCH 0/8] Add support for drm/rockchip to dynamically control the DDR frequency Enric Balletbo i Serra
@ 2018-07-30 8:11 ` Enric Balletbo i Serra
2018-07-30 8:11 ` [PATCH 7/8] arm64: dts: rk3399: Add dfi and dmc nodes Enric Balletbo i Serra
2018-07-30 8:11 ` [PATCH 8/8] arm64: dts: rockchip: Enable dmc and dfi nodes on gru Enric Balletbo i Serra
2 siblings, 0 replies; 5+ messages in thread
From: Enric Balletbo i Serra @ 2018-07-30 8:11 UTC (permalink / raw)
To: MyungJoo Ham, Kyungmin Park, Chanwoo Choi, Rob Herring,
Will Deacon, Heiko Stuebner, Michael Turquette, Stephen Boyd,
Sandy Huang, David Airlie
Cc: linux-pm, linux-kernel, Derek Basehore, linux-clk, linux-rockchip,
dri-devel, Lin Huang, kernel, robin.murphy, Sean Paul,
linux-arm-kernel, devicetree, Mark Rutland
The Rockchip DMC (Dynamic Memory Interface) needs to access to the PMU
general register files to know the DRAM type, so add a phandle to the
syscon that manages these registers.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Changes in v1:
- [RFC 2/10] Add reviewed and acked tags from Chanwoo Choi and Rob Herring
Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
index 0ec68141f85a..951789c0cdd6 100644
--- a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
+++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
@@ -12,6 +12,8 @@ Required properties:
for details.
- center-supply: DMC supply node.
- status: Marks the node enabled/disabled.
+- rockchip,pmu: Phandle to the syscon managing the "PMU general register
+ files".
Optional properties:
- interrupts: The CPU interrupt number. The interrupt specifier
--
2.18.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 7/8] arm64: dts: rk3399: Add dfi and dmc nodes.
2018-07-30 8:11 [PATCH 0/8] Add support for drm/rockchip to dynamically control the DDR frequency Enric Balletbo i Serra
2018-07-30 8:11 ` [PATCH 2/8] dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle Enric Balletbo i Serra
@ 2018-07-30 8:11 ` Enric Balletbo i Serra
2018-08-09 22:41 ` Rob Herring
2018-07-30 8:11 ` [PATCH 8/8] arm64: dts: rockchip: Enable dmc and dfi nodes on gru Enric Balletbo i Serra
2 siblings, 1 reply; 5+ messages in thread
From: Enric Balletbo i Serra @ 2018-07-30 8:11 UTC (permalink / raw)
To: MyungJoo Ham, Kyungmin Park, Chanwoo Choi, Rob Herring,
Will Deacon, Heiko Stuebner, Michael Turquette, Stephen Boyd,
Sandy Huang, David Airlie
Cc: linux-pm, linux-kernel, Derek Basehore, linux-clk, linux-rockchip,
dri-devel, Lin Huang, kernel, robin.murphy, Sean Paul,
linux-arm-kernel, Nickey Yang, devicetree, Mark Yao, Jacob Chen,
Brian Norris, Klaus Goger, Randy Li, Douglas Anderson,
Catalin Marinas, Mark Rutland
From: Lin Huang <hl@rock-chips.com>
These are required to support DDR DVFS on rk3399 platform. The patch also
introduces two new files (rk3399-dram.h and rk3399-dram-default-timing)
with default DRAM settings.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
Changes in v1:
- [RFC 8/10] Move rk3399-dram.h to dt-includes.
- [RFC 8/10] Put sdram default values under the dmc node.
- [RFC 8/10] Removed rk3399-dram-default-timing.dts
.../boot/dts/rockchip/rk3399-op1-opp.dtsi | 29 ++++++++
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 49 +++++++++++++
include/dt-bindings/power/rk3399-dram.h | 73 +++++++++++++++++++
3 files changed, 151 insertions(+)
create mode 100644 include/dt-bindings/power/rk3399-dram.h
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi
index 69cc9b05baa5..c9e7032b01a8 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi
@@ -110,6 +110,31 @@
opp-microvolt = <1075000>;
};
};
+
+ dmc_opp_table: dmc_opp_table {
+ compatible = "operating-points-v2";
+
+ opp00 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <900000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <900000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <666000000>;
+ opp-microvolt = <900000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <900000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <928000000>;
+ opp-microvolt = <900000>;
+ };
+ };
};
&cpu_l0 {
@@ -139,3 +164,7 @@
&gpu {
operating-points-v2 = <&gpu_opp_table>;
};
+
+&dmc {
+ operating-points-v2 = <&dmc_opp_table>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index b6cc50ab2cb8..e9d9aa7aa2ac 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/power/rk3399-dram.h>
#include <dt-bindings/power/rk3399-power.h>
#include <dt-bindings/thermal/thermal.h>
@@ -1833,6 +1834,54 @@
status = "disabled";
};
+ dfi: dfi@ff630000 {
+ reg = <0x00 0xff630000 0x00 0x4000>;
+ compatible = "rockchip,rk3399-dfi";
+ rockchip,pmu = <&pmugrf>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru PCLK_DDR_MON>;
+ clock-names = "pclk_ddr_mon";
+ status = "disabled";
+ };
+
+ dmc: dmc {
+ compatible = "rockchip,rk3399-dmc";
+ rockchip,pmu = <&pmugrf>;
+ devfreq-events = <&dfi>;
+ clocks = <&cru SCLK_DDRC>;
+ clock-names = "dmc_clk";
+ status = "disabled";
+ rockchip,ddr3_speed_bin = <21>;
+ rockchip,pd_idle = <0x40>;
+ rockchip,sr_idle = <0x2>;
+ rockchip,sr_mc_gate_idle = <0x3>;
+ rockchip,srpd_lite_idle = <0x4>;
+ rockchip,standby_idle = <0x2000>;
+ rockchip,dram_dll_dis_freq = <300000000>;
+ rockchip,phy_dll_dis_freq = <125000000>;
+ rockchip,auto_pd_dis_freq = <666000000>;
+ rockchip,ddr3_odt_dis_freq = <333000000>;
+ rockchip,ddr3_drv = <DDR3_DS_40ohm>;
+ rockchip,ddr3_odt = <DDR3_ODT_120ohm>;
+ rockchip,phy_ddr3_ca_drv = <PHY_DRV_ODT_40>;
+ rockchip,phy_ddr3_dq_drv = <PHY_DRV_ODT_40>;
+ rockchip,phy_ddr3_odt = <PHY_DRV_ODT_240>;
+ rockchip,lpddr3_odt_dis_freq = <333000000>;
+ rockchip,lpddr3_drv = <LP3_DS_34ohm>;
+ rockchip,lpddr3_odt = <LP3_ODT_240ohm>;
+ rockchip,phy_lpddr3_ca_drv = <PHY_DRV_ODT_40>;
+ rockchip,phy_lpddr3_dq_drv = <PHY_DRV_ODT_40>;
+ rockchip,phy_lpddr3_odt = <PHY_DRV_ODT_240>;
+ rockchip,lpddr4_odt_dis_freq = <333000000>;
+ rockchip,lpddr4_drv = <LP4_PDDS_60ohm>;
+ rockchip,lpddr4_dq_odt = <LP4_DQ_ODT_40ohm>;
+ rockchip,lpddr4_ca_odt = <LP4_CA_ODT_40ohm>;
+ rockchip,phy_lpddr4_ca_drv = <PHY_DRV_ODT_40>;
+ rockchip,phy_lpddr4_ck_cs_drv = <PHY_DRV_ODT_80>;
+ rockchip,phy_lpddr4_dq_drv = <PHY_DRV_ODT_80>;
+ rockchip,phy_lpddr4_odt = <PHY_DRV_ODT_60>;
+ };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3399-pinctrl";
rockchip,grf = <&grf>;
diff --git a/include/dt-bindings/power/rk3399-dram.h b/include/dt-bindings/power/rk3399-dram.h
new file mode 100644
index 000000000000..4b3d4a79923b
--- /dev/null
+++ b/include/dt-bindings/power/rk3399-dram.h
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR X11) */
+/*
+ * Copyright (c) 2016-2018, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Author: Lin Huang <hl@rock-chips.com>
+ */
+
+#ifndef _DTS_DRAM_ROCKCHIP_RK3399_H
+#define _DTS_DRAM_ROCKCHIP_RK3399_H
+
+#define DDR3_DS_34ohm 34
+#define DDR3_DS_40ohm 40
+
+#define DDR3_ODT_DIS 0
+#define DDR3_ODT_40ohm 40
+#define DDR3_ODT_60ohm 60
+#define DDR3_ODT_120ohm 120
+
+#define LP2_DS_34ohm 34
+#define LP2_DS_40ohm 40
+#define LP2_DS_48ohm 48
+#define LP2_DS_60ohm 60
+#define LP2_DS_68_6ohm 68 /* optional */
+#define LP2_DS_80ohm 80
+#define LP2_DS_120ohm 120 /* optional */
+
+#define LP3_DS_34ohm 34
+#define LP3_DS_40ohm 40
+#define LP3_DS_48ohm 48
+#define LP3_DS_60ohm 60
+#define LP3_DS_80ohm 80
+#define LP3_DS_34D_40U 3440
+#define LP3_DS_40D_48U 4048
+#define LP3_DS_34D_48U 3448
+
+#define LP3_ODT_DIS 0
+#define LP3_ODT_60ohm 60
+#define LP3_ODT_120ohm 120
+#define LP3_ODT_240ohm 240
+
+#define LP4_PDDS_40ohm 40
+#define LP4_PDDS_48ohm 48
+#define LP4_PDDS_60ohm 60
+#define LP4_PDDS_80ohm 80
+#define LP4_PDDS_120ohm 120
+#define LP4_PDDS_240ohm 240
+
+#define LP4_DQ_ODT_40ohm 40
+#define LP4_DQ_ODT_48ohm 48
+#define LP4_DQ_ODT_60ohm 60
+#define LP4_DQ_ODT_80ohm 80
+#define LP4_DQ_ODT_120ohm 120
+#define LP4_DQ_ODT_240ohm 240
+#define LP4_DQ_ODT_DIS 0
+
+#define LP4_CA_ODT_40ohm 40
+#define LP4_CA_ODT_48ohm 48
+#define LP4_CA_ODT_60ohm 60
+#define LP4_CA_ODT_80ohm 80
+#define LP4_CA_ODT_120ohm 120
+#define LP4_CA_ODT_240ohm 240
+#define LP4_CA_ODT_DIS 0
+
+#define PHY_DRV_ODT_Hi_Z 0
+#define PHY_DRV_ODT_240 240
+#define PHY_DRV_ODT_120 120
+#define PHY_DRV_ODT_80 80
+#define PHY_DRV_ODT_60 60
+#define PHY_DRV_ODT_48 48
+#define PHY_DRV_ODT_40 40
+#define PHY_DRV_ODT_34_3 34
+
+#endif /* _DTS_DRAM_ROCKCHIP_RK3399_H */
--
2.18.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 8/8] arm64: dts: rockchip: Enable dmc and dfi nodes on gru.
2018-07-30 8:11 [PATCH 0/8] Add support for drm/rockchip to dynamically control the DDR frequency Enric Balletbo i Serra
2018-07-30 8:11 ` [PATCH 2/8] dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle Enric Balletbo i Serra
2018-07-30 8:11 ` [PATCH 7/8] arm64: dts: rk3399: Add dfi and dmc nodes Enric Balletbo i Serra
@ 2018-07-30 8:11 ` Enric Balletbo i Serra
2 siblings, 0 replies; 5+ messages in thread
From: Enric Balletbo i Serra @ 2018-07-30 8:11 UTC (permalink / raw)
To: MyungJoo Ham, Kyungmin Park, Chanwoo Choi, Rob Herring,
Will Deacon, Heiko Stuebner, Michael Turquette, Stephen Boyd,
Sandy Huang, David Airlie
Cc: linux-pm, linux-kernel, Derek Basehore, linux-clk, linux-rockchip,
dri-devel, Lin Huang, kernel, robin.murphy, Sean Paul,
linux-arm-kernel, Nickey Yang, devicetree, Mark Yao, Jacob Chen,
Brian Norris, Klaus Goger, Mark Rutland, Randy Li,
Douglas Anderson, Chris Zhong, Catalin Marinas, Shu
From: Lin Huang <hl@rock-chips.com>
Enable the DMC (Dynamic Memory Controller) and the DFI (DDR PHY Interface)
nodes on gru/kevin boards so we can support DDR DVFS.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
Changes in v1: None
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 21 ++++++++++++++++++++
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
2 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index 1da8f7c1501e..7a7dcca11497 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
@@ -295,6 +295,12 @@
status = "okay";
};
+&dmc_opp_table {
+ opp04 {
+ opp-suspend;
+ };
+};
+
/*
* Set some suspend operating points to avoid OVP in suspend
*
@@ -374,6 +380,10 @@
<200000000>;
};
+&display_subsystem {
+ devfreq = <&dmc>;
+};
+
&emmc_phy {
status = "okay";
};
@@ -495,6 +505,17 @@ ap_i2c_audio: &i2c8 {
status = "okay";
};
+&dfi {
+ status = "okay";
+};
+
+&dmc {
+ status = "okay";
+ center-supply = <&ppvar_centerlogic>;
+ upthreshold = <25>;
+ downdifferential = <15>;
+};
+
&sdhci {
/*
* Signal integrity isn't great at 200 MHz and 150 MHz (DDR) gives the
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index e9d9aa7aa2ac..20b64ca638cb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -128,7 +128,7 @@
};
};
- display-subsystem {
+ display_subsystem: display-subsystem {
compatible = "rockchip,display-subsystem";
ports = <&vopl_out>, <&vopb_out>;
};
--
2.18.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 7/8] arm64: dts: rk3399: Add dfi and dmc nodes.
2018-07-30 8:11 ` [PATCH 7/8] arm64: dts: rk3399: Add dfi and dmc nodes Enric Balletbo i Serra
@ 2018-08-09 22:41 ` Rob Herring
0 siblings, 0 replies; 5+ messages in thread
From: Rob Herring @ 2018-08-09 22:41 UTC (permalink / raw)
To: enric.balletbo
Cc: Mark Rutland, Douglas Anderson, David Airlie, Catalin Marinas,
dri-devel, linux-kernel, Klaus Goger, MyungJoo Ham, kernel,
linux-clk, linux-rockchip, Brian Norris, Chanwoo Choi,
Nickey Yang, Jacob Chen, devicetree, Randy Li, linux-pm,
Derek Basehore, Mark Yao, linux-arm-kernel, Lin Huang,
Kyungmin Park, robin.murphy
Hi, this is an automated email from Rob's (experimental) review bot. I
found a couple of common problems with your patch. Please see below.
On Mon, 30 Jul 2018 10:11:23 +0200, Enric Balletbo i Serra wrote:
> From: Lin Huang <hl@rock-chips.com>
>
> These are required to support DDR DVFS on rk3399 platform. The patch also
> introduces two new files (rk3399-dram.h and rk3399-dram-default-timing)
> with default DRAM settings.
>
> Signed-off-by: Lin Huang <hl@rock-chips.com>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
The preferred subject prefix is "dt-bindings: <binding dir>: ...".
> ---
>
> Changes in v1:
> - [RFC 8/10] Move rk3399-dram.h to dt-includes.
> - [RFC 8/10] Put sdram default values under the dmc node.
> - [RFC 8/10] Removed rk3399-dram-default-timing.dts
>
> .../boot/dts/rockchip/rk3399-op1-opp.dtsi | 29 ++++++++
> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 49 +++++++++++++
> include/dt-bindings/power/rk3399-dram.h | 73 +++++++++++++++++++
> 3 files changed, 151 insertions(+)
> create mode 100644 include/dt-bindings/power/rk3399-dram.h
>
DT bindings (including binding headers) should be a separate patch. See
Documentation/devicetree/bindings/submitting-patches.txt.
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2018-08-09 22:41 UTC | newest]
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2018-07-30 8:11 [PATCH 0/8] Add support for drm/rockchip to dynamically control the DDR frequency Enric Balletbo i Serra
2018-07-30 8:11 ` [PATCH 2/8] dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle Enric Balletbo i Serra
2018-07-30 8:11 ` [PATCH 7/8] arm64: dts: rk3399: Add dfi and dmc nodes Enric Balletbo i Serra
2018-08-09 22:41 ` Rob Herring
2018-07-30 8:11 ` [PATCH 8/8] arm64: dts: rockchip: Enable dmc and dfi nodes on gru Enric Balletbo i Serra
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