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From: matthew.gerlach@linux.intel.com
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: lpieralisi@kernel.org, kw@linux.com,
	manivannan.sadhasivam@linaro.org,  robh@kernel.org,
	bhelgaas@google.com, krzk+dt@kernel.org,  conor+dt@kernel.org,
	dinguyen@kernel.org, joyce.ooi@intel.com,
	 linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	 linux-kernel@vger.kernel.org, matthew.gerlach@altera.com,
	 peter.colberg@altera.com,  "D M,
	Sharath Kumar" <sharath.kumar.d.m@intel.com>
Subject: Re: [PATCH v5 5/5] PCI: altera: Add Agilex support
Date: Wed, 29 Jan 2025 15:03:04 -0800 (PST)	[thread overview]
Message-ID: <5bfc352a-c6e1-7593-ad4-9079f2e0852@linux.intel.com> (raw)
In-Reply-To: <793b4cf1-bdf4-4010-aece-79c720ed05ad@kernel.org>



On Wed, 29 Jan 2025, Krzysztof Kozlowski wrote:

> On 27/01/2025 18:35, Matthew Gerlach wrote:
>> +
>>  static const struct of_device_id altera_pcie_of_match[] = {
>>  	{.compatible = "altr,pcie-root-port-1.0",
>>  	 .data = &altera_pcie_1_0_data },
>>  	{.compatible = "altr,pcie-root-port-2.0",
>>  	 .data = &altera_pcie_2_0_data },
>> +	{.compatible = "altr,pcie-root-port-3.0-f-tile",
>> +	 .data = &altera_pcie_3_0_f_tile_data },
>> +	{.compatible = "altr,pcie-root-port-3.0-p-tile",
>> +	 .data = &altera_pcie_3_0_p_tile_data },
>> +	{.compatible = "altr,pcie-root-port-3.0-r-tile",
>> +	 .data = &altera_pcie_3_0_r_tile_data },
>
> Please run scripts/checkpatch.pl and fix reported warnings. After that,
> run also `scripts/checkpatch.pl --strict` and (probably) fix more
> warnings. Some warnings can be ignored, especially from --strict run,
> but the code here looks like it needs a fix. Feel free to get in touch
> if the warning is not clear.
I will fix the duplicate signature warning.

Thanks,
Matthew Gerlach
>
> Best regards,
> Krzysztof
>

  reply	other threads:[~2025-01-29 23:03 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-27 17:35 [PATCH v5 0/5] Add PCIe Root Port support for Agilex family of chips Matthew Gerlach
2025-01-27 17:35 ` [PATCH v5 1/5] dt-bindings: PCI: altera: Add binding for Agilex Matthew Gerlach
2025-01-30  7:34   ` Krzysztof Kozlowski
2025-02-01 18:11     ` matthew.gerlach
2025-01-27 17:35 ` [PATCH v5 2/5] arm64: dts: agilex: add soc0 label Matthew Gerlach
2025-01-29  9:45   ` Krzysztof Kozlowski
2025-01-29 19:10     ` matthew.gerlach
2025-01-27 17:35 ` [PATCH v5 3/5] arm64: dts: agilex: add dtsi for PCIe Root Port Matthew Gerlach
2025-01-29  9:47   ` Krzysztof Kozlowski
2025-01-29 19:42     ` matthew.gerlach
2025-01-30  7:26       ` Krzysztof Kozlowski
2025-02-01 19:12         ` matthew.gerlach
2025-02-02 14:17           ` Krzysztof Kozlowski
2025-02-02 18:49             ` matthew.gerlach
2025-02-02 19:02               ` Krzysztof Kozlowski
2025-02-04 17:15                 ` matthew.gerlach
2025-01-29 20:43   ` Frank Li
2025-02-01 18:07     ` matthew.gerlach
2025-01-27 17:35 ` [PATCH v5 4/5] arm64: dts: agilex: add dts enabling " Matthew Gerlach
2025-01-29  9:49   ` Krzysztof Kozlowski
2025-01-29 22:54     ` matthew.gerlach
2025-01-30  7:31       ` Krzysztof Kozlowski
2025-02-04 16:57         ` matthew.gerlach
2025-02-05  7:32           ` Krzysztof Kozlowski
2025-01-27 17:35 ` [PATCH v5 5/5] PCI: altera: Add Agilex support Matthew Gerlach
2025-01-29  9:50   ` Krzysztof Kozlowski
2025-01-29 23:03     ` matthew.gerlach [this message]
2025-02-03 14:18   ` Manivannan Sadhasivam
2025-02-03 14:42     ` Krzysztof Kozlowski

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