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Mon, 7 Aug 2023 00:18:42 -0500 Received: from [172.24.227.68] (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3775Ic2k104239; Mon, 7 Aug 2023 00:18:39 -0500 Message-ID: <5c07e90a-2fab-b7aa-4d8e-6d329a8f33ea@ti.com> Date: Mon, 7 Aug 2023 10:48:38 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 07/13] arm64: dts: ti: k3-am64: Enable OSPI nodes at the board level Content-Language: en-US To: Andrew Davis , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , References: <20230802205309.257392-1-afd@ti.com> <20230802205309.257392-8-afd@ti.com> From: Dhruva Gole In-Reply-To: <20230802205309.257392-8-afd@ti.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 03/08/23 02:23, Andrew Davis wrote: > OSPI nodes defined in the top-level AM64 SoC dtsi files are incomplete > and may not be functional unless they are extended with pinmux and > device information. > > As the attached OSPI device is only known about at the board integration > level, these nodes should only be enabled when provided with this > information. > > Disable the OSPI nodes in the dtsi files and only enable the ones that > are actually pinned out on a given board. > > Signed-off-by: Andrew Davis > --- > arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 1 + > arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi | 1 + > arch/arm64/boot/dts/ti/k3-am642-evm.dts | 1 + > arch/arm64/boot/dts/ti/k3-am642-sk.dts | 1 + > 4 files changed, 4 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > index d3dd8c426dada..49f910e4b03fc 100644 > --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > @@ -802,6 +802,7 @@ ospi0: spi@fc40000 { > assigned-clock-parents = <&k3_clks 75 7>; > assigned-clock-rates = <166666666>; > power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>; > + status = "disabled"; > }; > }; > > diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi > index 5606d775153d4..1c2c8f0daca9f 100644 > --- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi > @@ -181,6 +181,7 @@ i2c_som_rtc: rtc@52 { > }; > > &ospi0 { > + status = "okay"; > pinctrl-names = "default"; > pinctrl-0 = <&ospi0_pins_default>; > > diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts > index d84e7ee160328..b4a1f73d4fb17 100644 > --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts > +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts > @@ -520,6 +520,7 @@ &tscadc0 { > }; > > &ospi0 { > + status = "okay"; > pinctrl-names = "default"; > pinctrl-0 = <&ospi0_pins_default>; > > diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts > index 963d796a3a970..af06ccd466802 100644 > --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts > +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts > @@ -518,6 +518,7 @@ &tscadc0 { > }; > > &ospi0 { > + status = "okay"; > pinctrl-names = "default"; > pinctrl-0 = <&ospi0_pins_default>; > Reviewed-by: Dhruva Gole -- Thanks and Regards, Dhruva Gole