From: Florian Fainelli <f.fainelli@gmail.com>
To: Hamish Martin <hamish.martin@alliedtelesis.co.nz>,
robh+dt@kernel.org, rjui@broadcom.com, sbranden@broadcom.com
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] ARM: dts: bcm: HR2: Fix PPI interrupt types
Date: Wed, 20 May 2020 17:16:19 -0700 [thread overview]
Message-ID: <5ce77bf5-b61c-397d-feaf-29e9f80875bd@gmail.com> (raw)
In-Reply-To: <20200520043042.7281-1-hamish.martin@alliedtelesis.co.nz>
On 5/19/2020 9:30 PM, Hamish Martin wrote:
> These error messages are output when booting on a BCM HR2 system:
> GIC: PPI11 is secure or misconfigured
> GIC: PPI13 is secure or misconfigured
>
> Per ARM documentation these interrupts are triggered on a rising edge.
> See ARM Cortex A-9 MPCore Technical Reference Manual, Revision r4p1,
> Section 3.3.8 Interrupt Configuration Registers.
>
> The same issue was resolved for NSP systems in commit 5f1aa51c7a1e
> ("ARM: dts: NSP: Fix PPI interrupt types").
>
> Signed-off-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz>
> ---
Applied to devicetree/fixes, please copy
bcm-kernel-feedback-list@broadcom.com so we can have our CI pick up this
patch. Thanks!
--
Florian
prev parent reply other threads:[~2020-05-21 0:16 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-20 4:30 [PATCH] ARM: dts: bcm: HR2: Fix PPI interrupt types Hamish Martin
2020-05-20 15:56 ` Florian Fainelli
2020-05-21 0:16 ` Florian Fainelli [this message]
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