From: Krzysztof Kozlowski <krzk@kernel.org>
To: Kevin Chen <kevin_chen@aspeedtech.com>,
lee@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, joel@jms.id.au, andrew@codeconstruct.com.au,
derek.kiernan@amd.com, dragan.cvetic@amd.com, arnd@arndb.de,
gregkh@linuxfoundation.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 1/3] dt-binding: aspeed: Add LPC PCC controller
Date: Tue, 11 Mar 2025 08:32:47 +0100 [thread overview]
Message-ID: <5d14e715-7940-4f1b-ab79-860ada066072@kernel.org> (raw)
In-Reply-To: <20250310114839.3098148-2-kevin_chen@aspeedtech.com>
On 10/03/2025 12:48, Kevin Chen wrote:
> Add dt-bindings for Aspeed for Aspeed LPC POST code capture controller.
<form letter>
This is a friendly reminder during the review process.
It seems my or other reviewer's previous comments were not fully
addressed. Maybe the feedback got lost between the quotes, maybe you
just forgot to apply it. Please go back to the previous discussion and
either implement all requested changes or keep discussing them.
Thank you.
</form letter>
>
> Signed-off-by: Kevin Chen <kevin_chen@aspeedtech.com>
> ---
> .../devicetree/bindings/mfd/aspeed-lpc.yaml | 38 +++++++++++++++++++
> 1 file changed, 38 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml b/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml
> index 5dfe77aca167..178c151a19ba 100644
> --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml
> +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml
> @@ -149,6 +149,37 @@ patternProperties:
> - interrupts
> - snoop-ports
>
> + "^lpc-pcc@[0-9a-f]+$":
> + type: object
> + additionalProperties: false
> +
> + description:
> + The LPC pcc interface allows the BMC to listen on and record the data
> + bytes written by the Host to the targeted LPC I/O pots.
> +
> + properties:
> + compatible:
> + items:
> + - enum:
> + - aspeed,ast2600-lpc-pcc
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + pcc-ports:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + As a device handshake with a host using the port-mmaped I/O in x86
> + architecture, need to handle specific which port I/O address for use.
<form letter>
This is a friendly reminder during the review process.
It seems my or other reviewer's previous comments were not fully
addressed. Maybe the feedback got lost between the quotes, maybe you
just forgot to apply it. Please go back to the previous discussion and
either implement all requested changes or keep discussing them.
Thank you.
</form letter>
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-03-11 7:32 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-10 11:48 [PATCH v3 0/3] Add AST2600 LPC PCC support Kevin Chen
2025-03-10 11:48 ` [PATCH v3 1/3] dt-binding: aspeed: Add LPC PCC controller Kevin Chen
2025-03-11 7:32 ` Krzysztof Kozlowski [this message]
2025-03-10 11:48 ` [PATCH v3 2/3] ARM: dts: aspeed-g6: Add AST2600 LPC PCC support Kevin Chen
2025-03-10 11:48 ` [PATCH v3 3/3] soc: aspeed: lpc-pcc: Add PCC controller support Kevin Chen
2025-03-11 7:34 ` Krzysztof Kozlowski
2025-03-14 10:56 ` Kevin Chen
2025-03-15 19:41 ` kernel test robot
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