Re: [PATCH 1/2] dt-bindings: net: adin: document adi,clk_rcvr_125_en property

Re: [PATCH 1/2] dt-bindings: net: adin: document adi,clk_rcvr_125_en property

[Paolo Abeni]

Hello,

On Fri, 2022-04-29 at 13:44 -0500, Nate Drude wrote:
> Document device tree property to set GE_CLK_RCVR_125_EN (bit 5 of GE_CLK_CFG),
> causing the 125 MHz PHY recovered clock (or PLL clock) to be driven at
> the GP_CLK pin.
> 
> Signed-off-by: Nate Drude <nate.d@variscite.com>
> ---
>  Documentation/devicetree/bindings/net/adi,adin.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml
> index 1129f2b58e98..5fdbbd5aff82 100644
> --- a/Documentation/devicetree/bindings/net/adi,adin.yaml
> +++ b/Documentation/devicetree/bindings/net/adi,adin.yaml
> @@ -36,6 +36,11 @@ properties:
>      enum: [ 4, 8, 12, 16, 20, 24 ]
>      default: 8
>  
> +  adi,clk_rcvr_125_en:
> +    description: |
> +      Set GE_CLK_RCVR_125_EN (bit 5 of GE_CLK_CFG), causing the 125 MHz
> +      PHY recovered clock (or PLL clock) to be driven at the GP_CLK pin.
> +
>  unevaluatedProperties: false
>  
>  examples:

The recipients list does not contain a few required ones, adding for
awareness Rob, Krzysztof and the devicetree ML. If a new version should
be required, please include them.

Thanks!

Paolo

Re: [PATCH 1/2] dt-bindings: net: adin: document adi,clk_rcvr_125_en property

[Krzysztof Kozlowski]

On 02/05/2022 11:03, Paolo Abeni wrote:
> Hello,
> 
> On Fri, 2022-04-29 at 13:44 -0500, Nate Drude wrote:
>> Document device tree property to set GE_CLK_RCVR_125_EN (bit 5 of GE_CLK_CFG),
>> causing the 125 MHz PHY recovered clock (or PLL clock) to be driven at
>> the GP_CLK pin.
>>
>> Signed-off-by: Nate Drude <nate.d@variscite.com>
>> ---
>>  Documentation/devicetree/bindings/net/adi,adin.yaml | 5 +++++
>>  1 file changed, 5 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml
>> index 1129f2b58e98..5fdbbd5aff82 100644
>> --- a/Documentation/devicetree/bindings/net/adi,adin.yaml
>> +++ b/Documentation/devicetree/bindings/net/adi,adin.yaml
>> @@ -36,6 +36,11 @@ properties:
>>      enum: [ 4, 8, 12, 16, 20, 24 ]
>>      default: 8
>>  
>> +  adi,clk_rcvr_125_en:

No underscores in node names

>> +    description: |
>> +      Set GE_CLK_RCVR_125_EN (bit 5 of GE_CLK_CFG), causing the 125 MHz
>> +      PHY recovered clock (or PLL clock) to be driven at the GP_CLK pin.

You are describing programming model but you should describe rather
hardware feature instead. This should be reflected in property name and
description. Focus on hardware and describe it.

>> +
>>  unevaluatedProperties: false
>>  
>>  examples:
> 
> The recipients list does not contain a few required ones, adding for
> awareness Rob, Krzysztof and the devicetree ML. If a new version should
> be required, please include them.

Thanks!

Nate,
Just please use scripts/get_maintainers.pl and all problems with
addressing are gone...


Best regards,
Krzysztof

Re: [PATCH 1/2] dt-bindings: net: adin: document adi,clk_rcvr_125_en property

[Nate Drude]

On Tue, 2022-05-03 at 13:50 +0200, Krzysztof Kozlowski wrote:
> On 02/05/2022 11:03, Paolo Abeni wrote:
> > Hello,
> > 
> > On Fri, 2022-04-29 at 13:44 -0500, Nate Drude wrote:
> > > Document device tree property to set GE_CLK_RCVR_125_EN (bit 5 of
> > > GE_CLK_CFG),
> > > causing the 125 MHz PHY recovered clock (or PLL clock) to be
> > > driven at
> > > the GP_CLK pin.
> > > 
> > > Signed-off-by: Nate Drude <nate.d@variscite.com>
> > > ---
> > >  Documentation/devicetree/bindings/net/adi,adin.yaml | 5 +++++
> > >  1 file changed, 5 insertions(+)
> > > 
> > > diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml
> > > b/Documentation/devicetree/bindings/net/adi,adin.yaml
> > > index 1129f2b58e98..5fdbbd5aff82 100644
> > > --- a/Documentation/devicetree/bindings/net/adi,adin.yaml
> > > +++ b/Documentation/devicetree/bindings/net/adi,adin.yaml
> > > @@ -36,6 +36,11 @@ properties:
> > >      enum: [ 4, 8, 12, 16, 20, 24 ]
> > >      default: 8
> > >  
> > > +  adi,clk_rcvr_125_en:
> 
> No underscores in node names
> 
> > > +    description: |
> > > +      Set GE_CLK_RCVR_125_EN (bit 5 of GE_CLK_CFG), causing the
> > > 125 MHz
> > > +      PHY recovered clock (or PLL clock) to be driven at the
> > > GP_CLK pin.
> 
> You are describing programming model but you should describe rather
> hardware feature instead. This should be reflected in property name
> and
> description. Focus on hardware and describe it.
> 
> > > +
> > >  unevaluatedProperties: false
> > >  
> > >  examples:
> > 
> > The recipients list does not contain a few required ones, adding
> > for
> > awareness Rob, Krzysztof and the devicetree ML. If a new version
> > should
> > be required, please include them.
> 
> Thanks!
> 
> Nate,
> Just please use scripts/get_maintainers.pl and all problems with
> addressing are gone...
> 
> 
> Best regards,
> Krzysztof

Hi All,

Thanks for your feedback on the patch and proper addressing.

This patch is now duplicated by v3 of Josua's patch, which appears more
comprehensive:
https://lore.kernel.org/netdev/20220428082848.12191-3-josua@solid-run.com/

Regards,
Nate