From: Stephen Boyd <swboyd@chromium.org>
To: Andy Gross <agross@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Rob Herring <robh+dt@kernel.org>,
Sandeep Maheswaram <sanm@codeaurora.org>
Cc: =linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
Manu Gautam <mgautam@codeaurora.org>,
Sandeep Maheswaram <sanm@codeaurora.org>
Subject: Re: [PATCH v2 1/1] arm64: dts: qcom: sc7180: Add USB related nodes
Date: Thu, 14 Nov 2019 08:44:32 -0800 [thread overview]
Message-ID: <5dcd8471.1c69fb81.aee46.634e@mx.google.com> (raw)
In-Reply-To: <1573733569-25940-2-git-send-email-sanm@codeaurora.org>
Quoting Sandeep Maheswaram (2019-11-14 04:12:49)
> Add nodes for DWC3 USB controller, QMP and QUSB PHYs.
>
> Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
One minor nit below.
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index 666e9b9..82f0b3a 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -911,6 +924,98 @@
> status = "disabled";
> };
>
> + usb_1_hsphy: phy@88e3000 {
> + compatible = "qcom,sc7180-qusb2-phy";
> + reg = <0 0x088e3000 0 0x400>;
> + status = "disabled";
> + #phy-cells = <0>;
> + clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "cfg_ahb","ref";
Add a space after that comma please.
> + resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
> +
> + nvmem-cells = <&qusb2p_hstx_trim>;
> + };
> +
next prev parent reply other threads:[~2019-11-14 16:44 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-14 12:12 [PATCH v2 0/1] Add USB related nodes for SC7180 Sandeep Maheswaram
2019-11-14 12:12 ` [PATCH v2 1/1] arm64: dts: qcom: sc7180: Add USB related nodes Sandeep Maheswaram
2019-11-14 16:44 ` Stephen Boyd [this message]
2019-11-15 5:03 ` Sandeep Maheswaram (Temp)
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