From mboxrd@z Thu Jan 1 00:00:00 1970 From: Banajit Goswami Subject: Re: [PATCH v7 12/24] ASoC: qdsp6: q6afe: Add support to MI2S sysclks Date: Tue, 8 May 2018 21:29:50 -0700 Message-ID: <5e4cd4a7-c375-4b92-f28b-f34900a828a8@codeaurora.org> References: <20180501120820.11016-1-srinivas.kandagatla@linaro.org> <20180501120820.11016-13-srinivas.kandagatla@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20180501120820.11016-13-srinivas.kandagatla@linaro.org> Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org To: Srinivas Kandagatla , andy.gross@linaro.org, broonie@kernel.org, linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, robh+dt@kernel.org Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, rohkumar@qti.qualcomm.com, gregkh@linuxfoundation.org, plai@codeaurora.org, tiwai@suse.com, lgirdwood@gmail.com, david.brown@linaro.org, linux-arm-kernel@lists.infradead.org, spatakok@qti.qualcomm.com, linux-kernel@vger.kernel.org List-Id: devicetree@vger.kernel.org On 5/1/2018 5:08 AM, Srinivas Kandagatla wrote: > This patch adds support to LPASS Bit clock, LPASS Digital > core clock and OSR clock. These clocks are required for both > MI2S and PCM setup. > > Signed-off-by: Srinivas Kandagatla > Reviewed-and-tested-by: Rohit kumar > --- > sound/soc/qcom/qdsp6/q6afe.c | 171 +++++++++++++++++++++++++++++++++++++++++-- > sound/soc/qcom/qdsp6/q6afe.h | 131 +++++++++++++++++++++++++++++++++ > 2 files changed, 295 insertions(+), 7 deletions(-) > > Acked-by: Banajit Goswami -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project