Re: [PATCH v2 2/3] clk: qcom: mmcc-sdm660: Add missing MDSS reset

[Taniya Das <taniya.das@oss.qualcomm.com>]

On 11/16/2025 6:42 AM, Alexey Minnekhanov wrote:
> Add offset for display subsystem reset in multimedia clock controller
> block, which is necessary to reset display when there is some
> configuration in display controller left by previous stock (Android)
> bootloader to provide continuous splash functionaluty.
> 
> Before 6.17 power domains were turned off for long enough to clear
> registers, now this is not the case and a proper reset is needed to
> have functioning display.
> 
> Fixes: 0e789b491ba0 ("pmdomain: core: Leave powered-on genpds on until sync_state")
> Cc: <stable@vger.kernel.org> # 6.17
> Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
> ---
>  drivers/clk/qcom/mmcc-sdm660.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/clk/qcom/mmcc-sdm660.c b/drivers/clk/qcom/mmcc-sdm660.c
> index b723c536dfb6..dbd3f561dc6d 100644
> --- a/drivers/clk/qcom/mmcc-sdm660.c
> +++ b/drivers/clk/qcom/mmcc-sdm660.c
> @@ -2781,6 +2781,7 @@ static struct gdsc *mmcc_sdm660_gdscs[] = {
>  };
>  
>  static const struct qcom_reset_map mmcc_660_resets[] = {
> +	[MDSS_BCR] = { 0x2300 },

Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>

>  	[CAMSS_MICRO_BCR] = { 0x3490 },
>  };
>  
> 

-- 
Thanks,
Taniya Das