* [PATCH v2 1/3] arm64: dts: qcom: pm8450a: add rtc node
@ 2022-12-14 21:09 Eric Chanudet
2022-12-14 21:09 ` [PATCH v2 2/3] arm64: dts: qcom: sa8295p-adp: use pm8450a dtsi Eric Chanudet
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Eric Chanudet @ 2022-12-14 21:09 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Konrad Dybcio
Cc: linux-arm-msm, devicetree, linux-kernel, Andrew Halaney,
Brian Masney, Eric Chanudet
Add the rtc block on pm8450a first pmic to enable the rtc for
sa8540p-ride.
Signed-off-by: Eric Chanudet <echanude@redhat.com>
---
arch/arm64/boot/dts/qcom/pm8450a.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/pm8450a.dtsi b/arch/arm64/boot/dts/qcom/pm8450a.dtsi
index 34fc72896761..c9b8da43b237 100644
--- a/arch/arm64/boot/dts/qcom/pm8450a.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8450a.dtsi
@@ -13,6 +13,14 @@ pm8450a: pmic@0 {
#address-cells = <1>;
#size-cells = <0>;
+ rtc@6000 {
+ compatible = "qcom,pm8941-rtc";
+ reg = <0x6000>, <0x6100>;
+ reg-names = "rtc", "alarm";
+ interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
+ wakeup-source;
+ };
+
pm8450a_gpios: gpio@c000 {
compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
--
2.38.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 2/3] arm64: dts: qcom: sa8295p-adp: use pm8450a dtsi
2022-12-14 21:09 [PATCH v2 1/3] arm64: dts: qcom: pm8450a: add rtc node Eric Chanudet
@ 2022-12-14 21:09 ` Eric Chanudet
2022-12-15 13:01 ` Konrad Dybcio
2022-12-14 21:09 ` [PATCH v2 3/3] arm64: dts: qcom: pm8941-rtc add alarm register Eric Chanudet
2022-12-15 12:59 ` [PATCH v2 1/3] arm64: dts: qcom: pm8450a: add rtc node Konrad Dybcio
2 siblings, 1 reply; 8+ messages in thread
From: Eric Chanudet @ 2022-12-14 21:09 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Konrad Dybcio
Cc: linux-arm-msm, devicetree, linux-kernel, Andrew Halaney,
Brian Masney, Eric Chanudet
Include the dtsi to use a single pmic descriptions.
Both sa8295p-adp and sa8540p-adp have the same spmi pmic apparently.
Signed-off-by: Eric Chanudet <echanude@redhat.com>
---
arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 79 +-----------------------
1 file changed, 1 insertion(+), 78 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
index 84cb6f3eeb56..889259df3287 100644
--- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
+++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
@@ -11,6 +11,7 @@
#include <dt-bindings/spmi/spmi.h>
#include "sa8540p.dtsi"
+#include "pm8450a.dtsi"
/ {
model = "Qualcomm SA8295P ADP";
@@ -260,84 +261,6 @@ &remoteproc_nsp1 {
status = "okay";
};
-&spmi_bus {
- pm8450a: pmic@0 {
- compatible = "qcom,pm8150", "qcom,spmi-pmic";
- reg = <0x0 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- rtc@6000 {
- compatible = "qcom,pm8941-rtc";
- reg = <0x6000>;
- reg-names = "rtc", "alarm";
- interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
- wakeup-source;
- };
-
- pm8450a_gpios: gpio@c000 {
- compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pm8450a_gpios 0 0 10>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- pm8450c: pmic@4 {
- compatible = "qcom,pm8150", "qcom,spmi-pmic";
- reg = <0x4 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pm8450c_gpios: gpio@c000 {
- compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pm8450c_gpios 0 0 10>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- pm8450e: pmic@8 {
- compatible = "qcom,pm8150", "qcom,spmi-pmic";
- reg = <0x8 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pm8450e_gpios: gpio@c000 {
- compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pm8450e_gpios 0 0 10>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- pm8450g: pmic@c {
- compatible = "qcom,pm8150", "qcom,spmi-pmic";
- reg = <0xc SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pm8450g_gpios: gpio@c000 {
- compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pm8450g_gpios 0 0 10>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-};
-
&ufs_mem_hc {
reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
--
2.38.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 3/3] arm64: dts: qcom: pm8941-rtc add alarm register
2022-12-14 21:09 [PATCH v2 1/3] arm64: dts: qcom: pm8450a: add rtc node Eric Chanudet
2022-12-14 21:09 ` [PATCH v2 2/3] arm64: dts: qcom: sa8295p-adp: use pm8450a dtsi Eric Chanudet
@ 2022-12-14 21:09 ` Eric Chanudet
2022-12-15 13:01 ` Konrad Dybcio
2022-12-15 12:59 ` [PATCH v2 1/3] arm64: dts: qcom: pm8450a: add rtc node Konrad Dybcio
2 siblings, 1 reply; 8+ messages in thread
From: Eric Chanudet @ 2022-12-14 21:09 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Konrad Dybcio
Cc: linux-arm-msm, devicetree, linux-kernel, Andrew Halaney,
Brian Masney, Eric Chanudet
A few descriptions including a qcom,pm8941-rtc describe two reg-names
for the "rtc" and "alarm" register banks, but only one offset. For
consistency with reg-names, add the "alarm" register offset. No
functional change is expected from this.
Signed-off-by: Eric Chanudet <echanude@redhat.com>
---
arch/arm64/boot/dts/qcom/pm8150.dtsi | 2 +-
arch/arm64/boot/dts/qcom/pm8916.dtsi | 3 ++-
arch/arm64/boot/dts/qcom/pm8950.dtsi | 2 +-
arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi | 2 +-
arch/arm64/boot/dts/qcom/pmp8074.dtsi | 2 +-
arch/arm64/boot/dts/qcom/pms405.dtsi | 2 +-
6 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi
index 574fa95a2871..db90c55fa2cf 100644
--- a/arch/arm64/boot/dts/qcom/pm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8150.dtsi
@@ -121,7 +121,7 @@ pm8150_adc_tm: adc-tm@3500 {
rtc@6000 {
compatible = "qcom,pm8941-rtc";
- reg = <0x6000>;
+ reg = <0x6000>, <0x6100>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
};
diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi
index 08f9ca006e72..e2a6b66d8847 100644
--- a/arch/arm64/boot/dts/qcom/pm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi
@@ -93,7 +93,8 @@ adc-chan@f {
rtc@6000 {
compatible = "qcom,pm8941-rtc";
- reg = <0x6000>;
+ reg = <0x6000>, <0x6100>;
+ reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
};
diff --git a/arch/arm64/boot/dts/qcom/pm8950.dtsi b/arch/arm64/boot/dts/qcom/pm8950.dtsi
index 07c3896bd36f..d7df4ad60509 100644
--- a/arch/arm64/boot/dts/qcom/pm8950.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8950.dtsi
@@ -126,7 +126,7 @@ xo-therm-buf@3c {
rtc@6000 {
compatible = "qcom,pm8941-rtc";
- reg = <0x6000>;
+ reg = <0x6000>, <0x6100>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
};
diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
index 20c5d60c8c2c..ee1e428d3a6e 100644
--- a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
+++ b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
@@ -108,7 +108,7 @@ pmm8155au_1_adc_tm: adc-tm@3500 {
pmm8155au_1_rtc: rtc@6000 {
compatible = "qcom,pm8941-rtc";
- reg = <0x6000>;
+ reg = <0x6000>, <0x6100>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
diff --git a/arch/arm64/boot/dts/qcom/pmp8074.dtsi b/arch/arm64/boot/dts/qcom/pmp8074.dtsi
index ceb2e6358b3d..580684411d74 100644
--- a/arch/arm64/boot/dts/qcom/pmp8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/pmp8074.dtsi
@@ -74,7 +74,7 @@ vph-pwr@131 {
pmp8074_rtc: rtc@6000 {
compatible = "qcom,pm8941-rtc";
- reg = <0x6000>;
+ reg = <0x6000>, <0x6100>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
allow-set-time;
diff --git a/arch/arm64/boot/dts/qcom/pms405.dtsi b/arch/arm64/boot/dts/qcom/pms405.dtsi
index ffe9e33808d0..22edb47c6a84 100644
--- a/arch/arm64/boot/dts/qcom/pms405.dtsi
+++ b/arch/arm64/boot/dts/qcom/pms405.dtsi
@@ -125,7 +125,7 @@ xo_therm: xo_temp@76 {
rtc@6000 {
compatible = "qcom,pm8941-rtc";
- reg = <0x6000>;
+ reg = <0x6000>, <0x6100>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
};
--
2.38.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v2 1/3] arm64: dts: qcom: pm8450a: add rtc node
2022-12-14 21:09 [PATCH v2 1/3] arm64: dts: qcom: pm8450a: add rtc node Eric Chanudet
2022-12-14 21:09 ` [PATCH v2 2/3] arm64: dts: qcom: sa8295p-adp: use pm8450a dtsi Eric Chanudet
2022-12-14 21:09 ` [PATCH v2 3/3] arm64: dts: qcom: pm8941-rtc add alarm register Eric Chanudet
@ 2022-12-15 12:59 ` Konrad Dybcio
2 siblings, 0 replies; 8+ messages in thread
From: Konrad Dybcio @ 2022-12-15 12:59 UTC (permalink / raw)
To: Eric Chanudet, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski
Cc: linux-arm-msm, devicetree, linux-kernel, Andrew Halaney,
Brian Masney
On 14.12.2022 22:09, Eric Chanudet wrote:
> Add the rtc block on pm8450a first pmic to enable the rtc for
> sa8540p-ride.
>
> Signed-off-by: Eric Chanudet <echanude@redhat.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
> arch/arm64/boot/dts/qcom/pm8450a.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/pm8450a.dtsi b/arch/arm64/boot/dts/qcom/pm8450a.dtsi
> index 34fc72896761..c9b8da43b237 100644
> --- a/arch/arm64/boot/dts/qcom/pm8450a.dtsi
> +++ b/arch/arm64/boot/dts/qcom/pm8450a.dtsi
> @@ -13,6 +13,14 @@ pm8450a: pmic@0 {
> #address-cells = <1>;
> #size-cells = <0>;
>
> + rtc@6000 {
> + compatible = "qcom,pm8941-rtc";
> + reg = <0x6000>, <0x6100>;
> + reg-names = "rtc", "alarm";
> + interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
> + wakeup-source;
> + };
> +
> pm8450a_gpios: gpio@c000 {
> compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
> reg = <0xc000>;
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 2/3] arm64: dts: qcom: sa8295p-adp: use pm8450a dtsi
2022-12-14 21:09 ` [PATCH v2 2/3] arm64: dts: qcom: sa8295p-adp: use pm8450a dtsi Eric Chanudet
@ 2022-12-15 13:01 ` Konrad Dybcio
2022-12-16 19:56 ` Eric Chanudet
0 siblings, 1 reply; 8+ messages in thread
From: Konrad Dybcio @ 2022-12-15 13:01 UTC (permalink / raw)
To: Eric Chanudet, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski
Cc: linux-arm-msm, devicetree, linux-kernel, Andrew Halaney,
Brian Masney
On 14.12.2022 22:09, Eric Chanudet wrote:
> Include the dtsi to use a single pmic descriptions.
> Both sa8295p-adp and sa8540p-adp have the same spmi pmic apparently.
>
> Signed-off-by: Eric Chanudet <echanude@redhat.com>
> ---
> arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 79 +-----------------------
> 1 file changed, 1 insertion(+), 78 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> index 84cb6f3eeb56..889259df3287 100644
> --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> @@ -11,6 +11,7 @@
> #include <dt-bindings/spmi/spmi.h>
>
> #include "sa8540p.dtsi"
> +#include "pm8450a.dtsi"
I feel like naming it sa8540p-pmics.dtsi (like sc8280xp-pmics.dtsi)
would be more representative of what's really going on (unless it's
a single chip providing 4 virtual PMICs on different SIDs).
Konrad
>
> / {
> model = "Qualcomm SA8295P ADP";
> @@ -260,84 +261,6 @@ &remoteproc_nsp1 {
> status = "okay";
> };
>
> -&spmi_bus {
> - pm8450a: pmic@0 {
> - compatible = "qcom,pm8150", "qcom,spmi-pmic";
> - reg = <0x0 SPMI_USID>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - rtc@6000 {
> - compatible = "qcom,pm8941-rtc";
> - reg = <0x6000>;
> - reg-names = "rtc", "alarm";
> - interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
> - wakeup-source;
> - };
> -
> - pm8450a_gpios: gpio@c000 {
> - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
> - reg = <0xc000>;
> - gpio-controller;
> - gpio-ranges = <&pm8450a_gpios 0 0 10>;
> - #gpio-cells = <2>;
> - interrupt-controller;
> - #interrupt-cells = <2>;
> - };
> - };
> -
> - pm8450c: pmic@4 {
> - compatible = "qcom,pm8150", "qcom,spmi-pmic";
> - reg = <0x4 SPMI_USID>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - pm8450c_gpios: gpio@c000 {
> - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
> - reg = <0xc000>;
> - gpio-controller;
> - gpio-ranges = <&pm8450c_gpios 0 0 10>;
> - #gpio-cells = <2>;
> - interrupt-controller;
> - #interrupt-cells = <2>;
> - };
> - };
> -
> - pm8450e: pmic@8 {
> - compatible = "qcom,pm8150", "qcom,spmi-pmic";
> - reg = <0x8 SPMI_USID>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - pm8450e_gpios: gpio@c000 {
> - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
> - reg = <0xc000>;
> - gpio-controller;
> - gpio-ranges = <&pm8450e_gpios 0 0 10>;
> - #gpio-cells = <2>;
> - interrupt-controller;
> - #interrupt-cells = <2>;
> - };
> - };
> -
> - pm8450g: pmic@c {
> - compatible = "qcom,pm8150", "qcom,spmi-pmic";
> - reg = <0xc SPMI_USID>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - pm8450g_gpios: gpio@c000 {
> - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
> - reg = <0xc000>;
> - gpio-controller;
> - gpio-ranges = <&pm8450g_gpios 0 0 10>;
> - #gpio-cells = <2>;
> - interrupt-controller;
> - #interrupt-cells = <2>;
> - };
> - };
> -};
> -
> &ufs_mem_hc {
> reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 3/3] arm64: dts: qcom: pm8941-rtc add alarm register
2022-12-14 21:09 ` [PATCH v2 3/3] arm64: dts: qcom: pm8941-rtc add alarm register Eric Chanudet
@ 2022-12-15 13:01 ` Konrad Dybcio
0 siblings, 0 replies; 8+ messages in thread
From: Konrad Dybcio @ 2022-12-15 13:01 UTC (permalink / raw)
To: Eric Chanudet, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski
Cc: linux-arm-msm, devicetree, linux-kernel, Andrew Halaney,
Brian Masney
On 14.12.2022 22:09, Eric Chanudet wrote:
> A few descriptions including a qcom,pm8941-rtc describe two reg-names
> for the "rtc" and "alarm" register banks, but only one offset. For
> consistency with reg-names, add the "alarm" register offset. No
> functional change is expected from this.
>
> Signed-off-by: Eric Chanudet <echanude@redhat.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
> arch/arm64/boot/dts/qcom/pm8150.dtsi | 2 +-
> arch/arm64/boot/dts/qcom/pm8916.dtsi | 3 ++-
> arch/arm64/boot/dts/qcom/pm8950.dtsi | 2 +-
> arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi | 2 +-
> arch/arm64/boot/dts/qcom/pmp8074.dtsi | 2 +-
> arch/arm64/boot/dts/qcom/pms405.dtsi | 2 +-
> 6 files changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi
> index 574fa95a2871..db90c55fa2cf 100644
> --- a/arch/arm64/boot/dts/qcom/pm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/pm8150.dtsi
> @@ -121,7 +121,7 @@ pm8150_adc_tm: adc-tm@3500 {
>
> rtc@6000 {
> compatible = "qcom,pm8941-rtc";
> - reg = <0x6000>;
> + reg = <0x6000>, <0x6100>;
> reg-names = "rtc", "alarm";
> interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
> };
> diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi
> index 08f9ca006e72..e2a6b66d8847 100644
> --- a/arch/arm64/boot/dts/qcom/pm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi
> @@ -93,7 +93,8 @@ adc-chan@f {
>
> rtc@6000 {
> compatible = "qcom,pm8941-rtc";
> - reg = <0x6000>;
> + reg = <0x6000>, <0x6100>;
> + reg-names = "rtc", "alarm";
> interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
> };
>
> diff --git a/arch/arm64/boot/dts/qcom/pm8950.dtsi b/arch/arm64/boot/dts/qcom/pm8950.dtsi
> index 07c3896bd36f..d7df4ad60509 100644
> --- a/arch/arm64/boot/dts/qcom/pm8950.dtsi
> +++ b/arch/arm64/boot/dts/qcom/pm8950.dtsi
> @@ -126,7 +126,7 @@ xo-therm-buf@3c {
>
> rtc@6000 {
> compatible = "qcom,pm8941-rtc";
> - reg = <0x6000>;
> + reg = <0x6000>, <0x6100>;
> reg-names = "rtc", "alarm";
> interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
> };
> diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
> index 20c5d60c8c2c..ee1e428d3a6e 100644
> --- a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
> +++ b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
> @@ -108,7 +108,7 @@ pmm8155au_1_adc_tm: adc-tm@3500 {
>
> pmm8155au_1_rtc: rtc@6000 {
> compatible = "qcom,pm8941-rtc";
> - reg = <0x6000>;
> + reg = <0x6000>, <0x6100>;
> reg-names = "rtc", "alarm";
> interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
>
> diff --git a/arch/arm64/boot/dts/qcom/pmp8074.dtsi b/arch/arm64/boot/dts/qcom/pmp8074.dtsi
> index ceb2e6358b3d..580684411d74 100644
> --- a/arch/arm64/boot/dts/qcom/pmp8074.dtsi
> +++ b/arch/arm64/boot/dts/qcom/pmp8074.dtsi
> @@ -74,7 +74,7 @@ vph-pwr@131 {
>
> pmp8074_rtc: rtc@6000 {
> compatible = "qcom,pm8941-rtc";
> - reg = <0x6000>;
> + reg = <0x6000>, <0x6100>;
> reg-names = "rtc", "alarm";
> interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
> allow-set-time;
> diff --git a/arch/arm64/boot/dts/qcom/pms405.dtsi b/arch/arm64/boot/dts/qcom/pms405.dtsi
> index ffe9e33808d0..22edb47c6a84 100644
> --- a/arch/arm64/boot/dts/qcom/pms405.dtsi
> +++ b/arch/arm64/boot/dts/qcom/pms405.dtsi
> @@ -125,7 +125,7 @@ xo_therm: xo_temp@76 {
>
> rtc@6000 {
> compatible = "qcom,pm8941-rtc";
> - reg = <0x6000>;
> + reg = <0x6000>, <0x6100>;
> reg-names = "rtc", "alarm";
> interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
> };
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 2/3] arm64: dts: qcom: sa8295p-adp: use pm8450a dtsi
2022-12-15 13:01 ` Konrad Dybcio
@ 2022-12-16 19:56 ` Eric Chanudet
2022-12-17 14:22 ` Konrad Dybcio
0 siblings, 1 reply; 8+ messages in thread
From: Eric Chanudet @ 2022-12-16 19:56 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
linux-arm-msm, devicetree, linux-kernel, Andrew Halaney,
Brian Masney
On Thu, Dec 15, 2022 at 02:01:09PM +0100, Konrad Dybcio wrote:
> On 14.12.2022 22:09, Eric Chanudet wrote:
> > Include the dtsi to use a single pmic descriptions.
> > Both sa8295p-adp and sa8540p-adp have the same spmi pmic apparently.
> >
> > Signed-off-by: Eric Chanudet <echanude@redhat.com>
> > ---
> > arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 79 +-----------------------
> > 1 file changed, 1 insertion(+), 78 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> > index 84cb6f3eeb56..889259df3287 100644
> > --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> > +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> > @@ -11,6 +11,7 @@
> > #include <dt-bindings/spmi/spmi.h>
> >
> > #include "sa8540p.dtsi"
> > +#include "pm8450a.dtsi"
> I feel like naming it sa8540p-pmics.dtsi (like sc8280xp-pmics.dtsi)
> would be more representative of what's really going on (unless it's
> a single chip providing 4 virtual PMICs on different SIDs).
I can make a v3 renaming this. The initial commit from Parikshit
mentions it is to be re-used on sa8540 based boards.
Side note: A quick look also shows pm8450.dtsi[1] is not included by
any of its intended targets (sm8350 and sm8450 IIUC). Was this lost?
Thanks,
[1] https://lore.kernel.org/r/20220226205035.1826360-8-dmitry.baryshkov@linaro.org
--
Eric Chanudet
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 2/3] arm64: dts: qcom: sa8295p-adp: use pm8450a dtsi
2022-12-16 19:56 ` Eric Chanudet
@ 2022-12-17 14:22 ` Konrad Dybcio
0 siblings, 0 replies; 8+ messages in thread
From: Konrad Dybcio @ 2022-12-17 14:22 UTC (permalink / raw)
To: Eric Chanudet
Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
linux-arm-msm, devicetree, linux-kernel, Andrew Halaney,
Brian Masney
On 16.12.2022 20:56, Eric Chanudet wrote:
> On Thu, Dec 15, 2022 at 02:01:09PM +0100, Konrad Dybcio wrote:
>> On 14.12.2022 22:09, Eric Chanudet wrote:
>>> Include the dtsi to use a single pmic descriptions.
>>> Both sa8295p-adp and sa8540p-adp have the same spmi pmic apparently.
>>>
>>> Signed-off-by: Eric Chanudet <echanude@redhat.com>
>>> ---
>>> arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 79 +-----------------------
>>> 1 file changed, 1 insertion(+), 78 deletions(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
>>> index 84cb6f3eeb56..889259df3287 100644
>>> --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
>>> +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
>>> @@ -11,6 +11,7 @@
>>> #include <dt-bindings/spmi/spmi.h>
>>>
>>> #include "sa8540p.dtsi"
>>> +#include "pm8450a.dtsi"
>> I feel like naming it sa8540p-pmics.dtsi (like sc8280xp-pmics.dtsi)
>> would be more representative of what's really going on (unless it's
>> a single chip providing 4 virtual PMICs on different SIDs).
>
> I can make a v3 renaming this. The initial commit from Parikshit
> mentions it is to be re-used on sa8540 based boards.
>
> Side note: A quick look also shows pm8450.dtsi[1] is not included by
> any of its intended targets (sm8350 and sm8450 IIUC). Was this lost?
sm8450 only. They were not included, as SPMI was not enabled on sm8450.
They will be included in 6.3 once that's merged.
Konrad
>
> Thanks,
>
> [1] https://lore.kernel.org/r/20220226205035.1826360-8-dmitry.baryshkov@linaro.org
>
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-12-17 14:22 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-12-14 21:09 [PATCH v2 1/3] arm64: dts: qcom: pm8450a: add rtc node Eric Chanudet
2022-12-14 21:09 ` [PATCH v2 2/3] arm64: dts: qcom: sa8295p-adp: use pm8450a dtsi Eric Chanudet
2022-12-15 13:01 ` Konrad Dybcio
2022-12-16 19:56 ` Eric Chanudet
2022-12-17 14:22 ` Konrad Dybcio
2022-12-14 21:09 ` [PATCH v2 3/3] arm64: dts: qcom: pm8941-rtc add alarm register Eric Chanudet
2022-12-15 13:01 ` Konrad Dybcio
2022-12-15 12:59 ` [PATCH v2 1/3] arm64: dts: qcom: pm8450a: add rtc node Konrad Dybcio
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