[PATCH v5 0/6] Raspberry Pi 4 PCIe support

[PATCH v5 0/6] Raspberry Pi 4 PCIe support

[Nicolas Saenz Julienne]

This series aims at providing support for Raspberry Pi 4's PCIe
controller, which is also shared with the Broadcom STB family of
devices.

There was a previous attempt to upstream this some years ago[1] but was
blocked as most STB PCIe integrations have a sparse DMA mapping[2] which
is something currently not supported by the kernel.  Luckily this is not
the case for the Raspberry Pi 4.

Note the series is based on top of linux next, as the DTS patch depends
on it.

[1] https://patchwork.kernel.org/cover/10605933/
[2] https://patchwork.kernel.org/patch/10605957/

---

Changes since v4:
  - Rebase DTS patch
  - Respin log2.h code into it's own series as it's still contentious
    yet mostly unrelated to the PCIe part

Changes since v3:
  - Moved all the log2.h related changes at the end of the series, as I
    presume they will be contentious and I don't want the PCIe patches
    to depend on them. Ultimately I think I'll respin them on their own
    series but wanted to keep them in for this submission just for the
    sake of continuity.
  - Addressed small nits here and there.

Changes since v2:
  - Redo register access in driver avoiding indirection while keeping
    the naming intact
  - Add patch editing ARM64's config
  - Last MSI cleanups, notably removing MSIX flag
  - Got rid of all _RB writes
  - Got rid of all of_data
  - Overall churn removal
  - Address the rest of Andrew's comments

Changes since v1:
  - add generic rounddown/roundup_pow_two64() patch
  - Add MAINTAINERS patch
  - Fix Kconfig
  - Cleanup probe, use up to date APIs, exit on MSI failure
  - Get rid of linux,pci-domain and other unused constructs
  - Use edge triggered setup for MSI
  - Cleanup MSI implementation
  - Fix multiple cosmetic issues
  - Remove supend/resume code

Jim Quinlan (3):
  dt-bindings: PCI: Add bindings for brcmstb's PCIe device
  PCI: brcmstb: Add Broadcom STB PCIe host controller driver
  PCI: brcmstb: Add MSI support

Nicolas Saenz Julienne (3):
  ARM: dts: bcm2711: Enable PCIe controller
  MAINTAINERS: Add brcmstb PCIe controller
  arm64: defconfig: Enable Broadcom's STB PCIe controller

 .../bindings/pci/brcm,stb-pcie.yaml           |   97 ++
 MAINTAINERS                                   |    4 +
 arch/arm/boot/dts/bcm2711.dtsi                |   31 +-
 arch/arm64/configs/defconfig                  |    1 +
 drivers/pci/controller/Kconfig                |    9 +
 drivers/pci/controller/Makefile               |    1 +
 drivers/pci/controller/pcie-brcmstb.c         | 1007 +++++++++++++++++
 7 files changed, 1149 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
 create mode 100644 drivers/pci/controller/pcie-brcmstb.c

-- 
2.24.0

[PATCH v5 1/6] dt-bindings: PCI: Add bindings for brcmstb's PCIe device

[Nicolas Saenz Julienne]

From: Jim Quinlan <james.quinlan@broadcom.com>

The DT bindings description of the brcmstb PCIe device is described.
This node can only be used for now on the Raspberry Pi 4.

Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
Co-developed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>

---

Changes since v2:
  - Add pci reference schema
  - Drop all default properties
  - Assume msi-controller and msi-parent are properly defined
  - Add num entries on multiple properties
  - use unevaluatedProperties
  - Update required properties
  - Fix license

Changes since v1:
  - Fix commit Subject
  - Remove linux,pci-domain

This was based on Jim's original submission[1], converted to yaml and
adapted to the RPi4 case.

[1] https://patchwork.kernel.org/patch/10605937/

 .../bindings/pci/brcm,stb-pcie.yaml           | 97 +++++++++++++++++++
 1 file changed, 97 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml

diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
new file mode 100644
index 000000000000..77d3e81a437b
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
@@ -0,0 +1,97 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Brcmstb PCIe Host Controller Device Tree Bindings
+
+maintainers:
+  - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+
+allOf:
+  - $ref: /schemas/pci/pci-bus.yaml#
+
+properties:
+  compatible:
+    const: brcm,bcm2711-pcie # The Raspberry Pi 4
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    minItems: 1
+    maxItems: 2
+    items:
+      - description: PCIe host controller
+      - description: builtin MSI controller
+
+  interrupt-names:
+    minItems: 1
+    maxItems: 2
+    items:
+      - const: pcie
+      - const: msi
+
+  ranges:
+    maxItems: 1
+
+  dma-ranges:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    items:
+      - const: sw_pcie
+
+  msi-controller:
+    description: Identifies the node as an MSI controller.
+
+  msi-parent:
+    description: MSI controller the device is capable of using.
+
+  brcm,enable-ssc:
+    description: Indicates usage of spread-spectrum clocking.
+    type: boolean
+
+required:
+  - reg
+  - dma-ranges
+  - "#interrupt-cells"
+  - interrupts
+  - interrupt-names
+  - interrupt-map-mask
+  - interrupt-map
+  - msi-controller
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    scb {
+            #address-cells = <2>;
+            #size-cells = <1>;
+            pcie0: pcie@7d500000 {
+                    compatible = "brcm,bcm2711-pcie";
+                    reg = <0x0 0x7d500000 0x9310>;
+                    device_type = "pci";
+                    #address-cells = <3>;
+                    #size-cells = <2>;
+                    #interrupt-cells = <1>;
+                    interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+                                 <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+                    interrupt-names = "pcie", "msi";
+                    interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+                    interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+                    msi-parent = <&pcie0>;
+                    msi-controller;
+                    ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;
+                    dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;
+                    brcm,enable-ssc;
+            };
+    };
-- 
2.24.0

Re: [PATCH v5 1/6] dt-bindings: PCI: Add bindings for brcmstb's PCIe device

[Matthias Brugger]

On 16/12/2019 12:01, Nicolas Saenz Julienne wrote:
> From: Jim Quinlan <james.quinlan@broadcom.com>
> 
> The DT bindings description of the brcmstb PCIe device is described.
> This node can only be used for now on the Raspberry Pi 4.
> 
> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
> Co-developed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
> Reviewed-by: Rob Herring <robh@kernel.org>
> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
> 
> ---
> 
> Changes since v2:
>   - Add pci reference schema
>   - Drop all default properties
>   - Assume msi-controller and msi-parent are properly defined
>   - Add num entries on multiple properties
>   - use unevaluatedProperties
>   - Update required properties
>   - Fix license
> 
> Changes since v1:
>   - Fix commit Subject
>   - Remove linux,pci-domain
> 
> This was based on Jim's original submission[1], converted to yaml and
> adapted to the RPi4 case.
> 
> [1] https://patchwork.kernel.org/patch/10605937/
> 
>  .../bindings/pci/brcm,stb-pcie.yaml           | 97 +++++++++++++++++++
>  1 file changed, 97 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> 
> diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> new file mode 100644
> index 000000000000..77d3e81a437b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> @@ -0,0 +1,97 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Brcmstb PCIe Host Controller Device Tree Bindings
> +
> +maintainers:
> +  - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
> +
> +allOf:
> +  - $ref: /schemas/pci/pci-bus.yaml#
> +
> +properties:
> +  compatible:
> +    const: brcm,bcm2711-pcie # The Raspberry Pi 4
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    minItems: 1
> +    maxItems: 2
> +    items:
> +      - description: PCIe host controller
> +      - description: builtin MSI controller
> +
> +  interrupt-names:
> +    minItems: 1
> +    maxItems: 2
> +    items:
> +      - const: pcie
> +      - const: msi
> +
> +  ranges:
> +    maxItems: 1
> +
> +  dma-ranges:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  clock-names:
> +    items:
> +      - const: sw_pcie
> +
> +  msi-controller:
> +    description: Identifies the node as an MSI controller.

are you missing "type: boolean" here?

Regards,
Matthias


> +
> +  msi-parent:
> +    description: MSI controller the device is capable of using.
> +
> +  brcm,enable-ssc:
> +    description: Indicates usage of spread-spectrum clocking.
> +    type: boolean
> +
> +required:
> +  - reg
> +  - dma-ranges
> +  - "#interrupt-cells"
> +  - interrupts
> +  - interrupt-names
> +  - interrupt-map-mask
> +  - interrupt-map
> +  - msi-controller
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    scb {
> +            #address-cells = <2>;
> +            #size-cells = <1>;
> +            pcie0: pcie@7d500000 {
> +                    compatible = "brcm,bcm2711-pcie";
> +                    reg = <0x0 0x7d500000 0x9310>;
> +                    device_type = "pci";
> +                    #address-cells = <3>;
> +                    #size-cells = <2>;
> +                    #interrupt-cells = <1>;
> +                    interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
> +                                 <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> +                    interrupt-names = "pcie", "msi";
> +                    interrupt-map-mask = <0x0 0x0 0x0 0x7>;
> +                    interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> +                    msi-parent = <&pcie0>;
> +                    msi-controller;
> +                    ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;
> +                    dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;
> +                    brcm,enable-ssc;
> +            };
> +    };
> 

Re: [PATCH v5 1/6] dt-bindings: PCI: Add bindings for brcmstb's PCIe device

[Nicolas Saenz Julienne]

[-- Attachment #1: Type: text/plain, Size: 388 bytes --]

On Mon, 2019-12-16 at 12:14 +0100, Matthias Brugger wrote:
> > +
> > +  msi-controller:
> > +    description: Identifies the node as an MSI controller.
> 
> are you missing "type: boolean" here?

As per RobH's suggestion[1] I assumed the type on msi-controller and msi-parent
is alredy defined.

Regards,
Nicolas

[1] https://patchwork.kernel.org/patch/11239717/#23008585


[-- Attachment #2: This is a digitally signed message part --]
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[PATCH v5 2/6] ARM: dts: bcm2711: Enable PCIe controller

[Nicolas Saenz Julienne]

This enables bcm2711's PCIe bus, which is hardwired to a VIA
Technologies XHCI USB 3.0 controller.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>

---

Changes since v4:
  - Rebase commit taking into account genet support series

Changes since v3:
  - Remove unwarranted comment

Changes since v2:
  - Remove unused interrupt-map
  - correct dma-ranges to it's full size, non power of 2 bus DMA
    constraints now supported in linux-next[1]
  - add device_type
  - rename alias from pcie_0 to pcie0

Changes since v1:
  - remove linux,pci-domain

[1] https://lkml.org/lkml/2019/11/21/235

 arch/arm/boot/dts/bcm2711.dtsi | 31 ++++++++++++++++++++++++++++++-
 1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
index e2f6ffb00aa9..b56388ce1216 100644
--- a/arch/arm/boot/dts/bcm2711.dtsi
+++ b/arch/arm/boot/dts/bcm2711.dtsi
@@ -331,7 +331,36 @@ scb {
 		#address-cells = <2>;
 		#size-cells = <1>;
 
-		ranges = <0x0 0x7c000000  0x0 0xfc000000  0x03800000>;
+		ranges = <0x0 0x7c000000  0x0 0xfc000000  0x03800000>,
+			 <0x6 0x00000000  0x6 0x00000000  0x40000000>;
+
+		pcie0: pcie@7d500000 {
+			compatible = "brcm,bcm2711-pcie";
+			reg = <0x0 0x7d500000 0x9310>;
+			device_type = "pci";
+			#address-cells = <3>;
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "pcie", "msi";
+			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+			interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143
+							IRQ_TYPE_LEVEL_HIGH>;
+			msi-controller;
+			msi-parent = <&pcie0>;
+
+			ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000
+				  0x0 0x04000000>;
+			/*
+			 * The wrapper around the PCIe block has a bug
+			 * preventing it from accessing beyond the first 3GB of
+			 * memory.
+			 */
+			dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
+				      0x0 0xc0000000>;
+			brcm,enable-ssc;
+		};
 
 		genet: ethernet@7d580000 {
 			compatible = "brcm,bcm2711-genet-v5";
-- 
2.24.0

Re: [PATCH v5 2/6] ARM: dts: bcm2711: Enable PCIe controller

[Lorenzo Pieralisi]

On Mon, Dec 16, 2019 at 12:01:08PM +0100, Nicolas Saenz Julienne wrote:
> This enables bcm2711's PCIe bus, which is hardwired to a VIA
> Technologies XHCI USB 3.0 controller.
> 
> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
> 
> ---
> 
> Changes since v4:
>   - Rebase commit taking into account genet support series
> 
> Changes since v3:
>   - Remove unwarranted comment
> 
> Changes since v2:
>   - Remove unused interrupt-map
>   - correct dma-ranges to it's full size, non power of 2 bus DMA
>     constraints now supported in linux-next[1]
>   - add device_type
>   - rename alias from pcie_0 to pcie0
> 
> Changes since v1:
>   - remove linux,pci-domain
> 
> [1] https://lkml.org/lkml/2019/11/21/235
> 
>  arch/arm/boot/dts/bcm2711.dtsi | 31 ++++++++++++++++++++++++++++++-
>  1 file changed, 30 insertions(+), 1 deletion(-)

Olof as we discussed previously, I will not merge this dts change and
drop it from the series - Nicolas should redirect it to arm-soc, please
let me know if my understanding is correct.

Thanks,
Lorenzo

> diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
> index e2f6ffb00aa9..b56388ce1216 100644
> --- a/arch/arm/boot/dts/bcm2711.dtsi
> +++ b/arch/arm/boot/dts/bcm2711.dtsi
> @@ -331,7 +331,36 @@ scb {
>  		#address-cells = <2>;
>  		#size-cells = <1>;
>  
> -		ranges = <0x0 0x7c000000  0x0 0xfc000000  0x03800000>;
> +		ranges = <0x0 0x7c000000  0x0 0xfc000000  0x03800000>,
> +			 <0x6 0x00000000  0x6 0x00000000  0x40000000>;
> +
> +		pcie0: pcie@7d500000 {
> +			compatible = "brcm,bcm2711-pcie";
> +			reg = <0x0 0x7d500000 0x9310>;
> +			device_type = "pci";
> +			#address-cells = <3>;
> +			#interrupt-cells = <1>;
> +			#size-cells = <2>;
> +			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "pcie", "msi";
> +			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
> +			interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143
> +							IRQ_TYPE_LEVEL_HIGH>;
> +			msi-controller;
> +			msi-parent = <&pcie0>;
> +
> +			ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000
> +				  0x0 0x04000000>;
> +			/*
> +			 * The wrapper around the PCIe block has a bug
> +			 * preventing it from accessing beyond the first 3GB of
> +			 * memory.
> +			 */
> +			dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
> +				      0x0 0xc0000000>;
> +			brcm,enable-ssc;
> +		};
>  
>  		genet: ethernet@7d580000 {
>  			compatible = "brcm,bcm2711-genet-v5";
> -- 
> 2.24.0
> 

Re: [PATCH v5 2/6] ARM: dts: bcm2711: Enable PCIe controller

[Florian Fainelli]

On 1/14/20 10:11 AM, Lorenzo Pieralisi wrote:
> On Mon, Dec 16, 2019 at 12:01:08PM +0100, Nicolas Saenz Julienne wrote:
>> This enables bcm2711's PCIe bus, which is hardwired to a VIA
>> Technologies XHCI USB 3.0 controller.
>>
>> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
>>
>> ---
>>
>> Changes since v4:
>>   - Rebase commit taking into account genet support series
>>
>> Changes since v3:
>>   - Remove unwarranted comment
>>
>> Changes since v2:
>>   - Remove unused interrupt-map
>>   - correct dma-ranges to it's full size, non power of 2 bus DMA
>>     constraints now supported in linux-next[1]
>>   - add device_type
>>   - rename alias from pcie_0 to pcie0
>>
>> Changes since v1:
>>   - remove linux,pci-domain
>>
>> [1] https://lkml.org/lkml/2019/11/21/235
>>
>>  arch/arm/boot/dts/bcm2711.dtsi | 31 ++++++++++++++++++++++++++++++-
>>  1 file changed, 30 insertions(+), 1 deletion(-)
> 
> Olof as we discussed previously, I will not merge this dts change and
> drop it from the series - Nicolas should redirect it to arm-soc, please
> let me know if my understanding is correct.

Correct, I will take patches 2, 5 and 6 through the Broadcom ARM SoC
pull requests and you will take 1, 3 and 4.
-- 
Florian

Re: [PATCH v5 2/6] ARM: dts: bcm2711: Enable PCIe controller

[Florian Fainelli]

On Mon, 16 Dec 2019 12:01:08 +0100, Nicolas Saenz Julienne <nsaenzjulienne@suse.de> wrote:
> This enables bcm2711's PCIe bus, which is hardwired to a VIA
> Technologies XHCI USB 3.0 controller.
> 
> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
> 
> ---

Applied to devicetree/next, thanks!
--
Florian

Re: [PATCH v5 0/6] Raspberry Pi 4 PCIe support

[Andrew Murray]

On Mon, Dec 16, 2019 at 12:01:06PM +0100, Nicolas Saenz Julienne wrote:
> This series aims at providing support for Raspberry Pi 4's PCIe
> controller, which is also shared with the Broadcom STB family of
> devices.
> 
> There was a previous attempt to upstream this some years ago[1] but was
> blocked as most STB PCIe integrations have a sparse DMA mapping[2] which
> is something currently not supported by the kernel.  Luckily this is not
> the case for the Raspberry Pi 4.
> 

Hi Nicolas,

This series looks good to me now. Unless there is further feedback I'll ask
Lorenzo to merge this when he returns in the new year.

Thanks for the log2.h efforts - perhaps this can be picked up again one day.

Thanks,

Andrew Murray

> Note the series is based on top of linux next, as the DTS patch depends
> on it.
> 
> [1] https://patchwork.kernel.org/cover/10605933/
> [2] https://patchwork.kernel.org/patch/10605957/
> 
> ---
> 
> Changes since v4:
>   - Rebase DTS patch
>   - Respin log2.h code into it's own series as it's still contentious
>     yet mostly unrelated to the PCIe part
> 
> Changes since v3:
>   - Moved all the log2.h related changes at the end of the series, as I
>     presume they will be contentious and I don't want the PCIe patches
>     to depend on them. Ultimately I think I'll respin them on their own
>     series but wanted to keep them in for this submission just for the
>     sake of continuity.
>   - Addressed small nits here and there.
> 
> Changes since v2:
>   - Redo register access in driver avoiding indirection while keeping
>     the naming intact
>   - Add patch editing ARM64's config
>   - Last MSI cleanups, notably removing MSIX flag
>   - Got rid of all _RB writes
>   - Got rid of all of_data
>   - Overall churn removal
>   - Address the rest of Andrew's comments
> 
> Changes since v1:
>   - add generic rounddown/roundup_pow_two64() patch
>   - Add MAINTAINERS patch
>   - Fix Kconfig
>   - Cleanup probe, use up to date APIs, exit on MSI failure
>   - Get rid of linux,pci-domain and other unused constructs
>   - Use edge triggered setup for MSI
>   - Cleanup MSI implementation
>   - Fix multiple cosmetic issues
>   - Remove supend/resume code
> 
> Jim Quinlan (3):
>   dt-bindings: PCI: Add bindings for brcmstb's PCIe device
>   PCI: brcmstb: Add Broadcom STB PCIe host controller driver
>   PCI: brcmstb: Add MSI support
> 
> Nicolas Saenz Julienne (3):
>   ARM: dts: bcm2711: Enable PCIe controller
>   MAINTAINERS: Add brcmstb PCIe controller
>   arm64: defconfig: Enable Broadcom's STB PCIe controller
> 
>  .../bindings/pci/brcm,stb-pcie.yaml           |   97 ++
>  MAINTAINERS                                   |    4 +
>  arch/arm/boot/dts/bcm2711.dtsi                |   31 +-
>  arch/arm64/configs/defconfig                  |    1 +
>  drivers/pci/controller/Kconfig                |    9 +
>  drivers/pci/controller/Makefile               |    1 +
>  drivers/pci/controller/pcie-brcmstb.c         | 1007 +++++++++++++++++
>  7 files changed, 1149 insertions(+), 1 deletion(-)
>  create mode 100644 Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
>  create mode 100644 drivers/pci/controller/pcie-brcmstb.c
> 
> -- 
> 2.24.0
> 

Re: [PATCH v5 0/6] Raspberry Pi 4 PCIe support

[Nicolas Saenz Julienne]

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On Mon, 2019-12-16 at 11:36 +0000, Andrew Murray wrote:
> On Mon, Dec 16, 2019 at 12:01:06PM +0100, Nicolas Saenz Julienne wrote:
> > This series aims at providing support for Raspberry Pi 4's PCIe
> > controller, which is also shared with the Broadcom STB family of
> > devices.
> > 
> > There was a previous attempt to upstream this some years ago[1] but was
> > blocked as most STB PCIe integrations have a sparse DMA mapping[2] which
> > is something currently not supported by the kernel.  Luckily this is not
> > the case for the Raspberry Pi 4.
> > 
> 
> Hi Nicolas,
> 
> This series looks good to me now. Unless there is further feedback I'll ask
> Lorenzo to merge this when he returns in the new year.

Thanks!

> Thanks for the log2.h efforts - perhaps this can be picked up again one day.

I'm not giving up on it yet :)

Regards,
Nicolas


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Re: [PATCH v5 0/6] Raspberry Pi 4 PCIe support

[Lorenzo Pieralisi]

On Mon, Dec 16, 2019 at 12:01:06PM +0100, Nicolas Saenz Julienne wrote:
> This series aims at providing support for Raspberry Pi 4's PCIe
> controller, which is also shared with the Broadcom STB family of
> devices.
> 
> There was a previous attempt to upstream this some years ago[1] but was
> blocked as most STB PCIe integrations have a sparse DMA mapping[2] which
> is something currently not supported by the kernel.  Luckily this is not
> the case for the Raspberry Pi 4.
> 
> Note the series is based on top of linux next, as the DTS patch depends
> on it.
> 
> [1] https://patchwork.kernel.org/cover/10605933/
> [2] https://patchwork.kernel.org/patch/10605957/
> 
> ---
> 
> Changes since v4:
>   - Rebase DTS patch
>   - Respin log2.h code into it's own series as it's still contentious
>     yet mostly unrelated to the PCIe part
> 
> Changes since v3:
>   - Moved all the log2.h related changes at the end of the series, as I
>     presume they will be contentious and I don't want the PCIe patches
>     to depend on them. Ultimately I think I'll respin them on their own
>     series but wanted to keep them in for this submission just for the
>     sake of continuity.
>   - Addressed small nits here and there.
> 
> Changes since v2:
>   - Redo register access in driver avoiding indirection while keeping
>     the naming intact
>   - Add patch editing ARM64's config
>   - Last MSI cleanups, notably removing MSIX flag
>   - Got rid of all _RB writes
>   - Got rid of all of_data
>   - Overall churn removal
>   - Address the rest of Andrew's comments
> 
> Changes since v1:
>   - add generic rounddown/roundup_pow_two64() patch
>   - Add MAINTAINERS patch
>   - Fix Kconfig
>   - Cleanup probe, use up to date APIs, exit on MSI failure
>   - Get rid of linux,pci-domain and other unused constructs
>   - Use edge triggered setup for MSI
>   - Cleanup MSI implementation
>   - Fix multiple cosmetic issues
>   - Remove supend/resume code
> 
> Jim Quinlan (3):
>   dt-bindings: PCI: Add bindings for brcmstb's PCIe device
>   PCI: brcmstb: Add Broadcom STB PCIe host controller driver
>   PCI: brcmstb: Add MSI support
> 
> Nicolas Saenz Julienne (3):
>   ARM: dts: bcm2711: Enable PCIe controller
>   MAINTAINERS: Add brcmstb PCIe controller
>   arm64: defconfig: Enable Broadcom's STB PCIe controller
> 
>  .../bindings/pci/brcm,stb-pcie.yaml           |   97 ++
>  MAINTAINERS                                   |    4 +
>  arch/arm/boot/dts/bcm2711.dtsi                |   31 +-
>  arch/arm64/configs/defconfig                  |    1 +
>  drivers/pci/controller/Kconfig                |    9 +
>  drivers/pci/controller/Makefile               |    1 +
>  drivers/pci/controller/pcie-brcmstb.c         | 1007 +++++++++++++++++
>  7 files changed, 1149 insertions(+), 1 deletion(-)
>  create mode 100644 Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
>  create mode 100644 drivers/pci/controller/pcie-brcmstb.c

Applied patches [1,3,4] to pci/brcmstb, please have a look to check
everything is in order after the minor update I included.

Thanks !
Lorenzo

Re: [PATCH v5 0/6] Raspberry Pi 4 PCIe support

[Nicolas Saenz Julienne]

[-- Attachment #1: Type: text/plain, Size: 3395 bytes --]

On Wed, 2020-01-15 at 12:02 +0000, Lorenzo Pieralisi wrote:
> On Mon, Dec 16, 2019 at 12:01:06PM +0100, Nicolas Saenz Julienne wrote:
> > This series aims at providing support for Raspberry Pi 4's PCIe
> > controller, which is also shared with the Broadcom STB family of
> > devices.
> > 
> > There was a previous attempt to upstream this some years ago[1] but was
> > blocked as most STB PCIe integrations have a sparse DMA mapping[2] which
> > is something currently not supported by the kernel.  Luckily this is not
> > the case for the Raspberry Pi 4.
> > 
> > Note the series is based on top of linux next, as the DTS patch depends
> > on it.
> > 
> > [1] https://patchwork.kernel.org/cover/10605933/
> > [2] https://patchwork.kernel.org/patch/10605957/
> > 
> > ---
> > 
> > Changes since v4:
> >   - Rebase DTS patch
> >   - Respin log2.h code into it's own series as it's still contentious
> >     yet mostly unrelated to the PCIe part
> > 
> > Changes since v3:
> >   - Moved all the log2.h related changes at the end of the series, as I
> >     presume they will be contentious and I don't want the PCIe patches
> >     to depend on them. Ultimately I think I'll respin them on their own
> >     series but wanted to keep them in for this submission just for the
> >     sake of continuity.
> >   - Addressed small nits here and there.
> > 
> > Changes since v2:
> >   - Redo register access in driver avoiding indirection while keeping
> >     the naming intact
> >   - Add patch editing ARM64's config
> >   - Last MSI cleanups, notably removing MSIX flag
> >   - Got rid of all _RB writes
> >   - Got rid of all of_data
> >   - Overall churn removal
> >   - Address the rest of Andrew's comments
> > 
> > Changes since v1:
> >   - add generic rounddown/roundup_pow_two64() patch
> >   - Add MAINTAINERS patch
> >   - Fix Kconfig
> >   - Cleanup probe, use up to date APIs, exit on MSI failure
> >   - Get rid of linux,pci-domain and other unused constructs
> >   - Use edge triggered setup for MSI
> >   - Cleanup MSI implementation
> >   - Fix multiple cosmetic issues
> >   - Remove supend/resume code
> > 
> > Jim Quinlan (3):
> >   dt-bindings: PCI: Add bindings for brcmstb's PCIe device
> >   PCI: brcmstb: Add Broadcom STB PCIe host controller driver
> >   PCI: brcmstb: Add MSI support
> > 
> > Nicolas Saenz Julienne (3):
> >   ARM: dts: bcm2711: Enable PCIe controller
> >   MAINTAINERS: Add brcmstb PCIe controller
> >   arm64: defconfig: Enable Broadcom's STB PCIe controller
> > 
> >  .../bindings/pci/brcm,stb-pcie.yaml           |   97 ++
> >  MAINTAINERS                                   |    4 +
> >  arch/arm/boot/dts/bcm2711.dtsi                |   31 +-
> >  arch/arm64/configs/defconfig                  |    1 +
> >  drivers/pci/controller/Kconfig                |    9 +
> >  drivers/pci/controller/Makefile               |    1 +
> >  drivers/pci/controller/pcie-brcmstb.c         | 1007 +++++++++++++++++
> >  7 files changed, 1149 insertions(+), 1 deletion(-)
> >  create mode 100644 Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> >  create mode 100644 drivers/pci/controller/pcie-brcmstb.c
> 
> Applied patches [1,3,4] to pci/brcmstb, please have a look to check
> everything is in order after the minor update I included.

Looks good to me.

Thanks,
Nicolas


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