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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Peter Chen <peter.chen@cixtech.com>, Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh@kernel.org>,
	krzk+dt@kernel.org, Conor Dooley <conor+dt@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, cix-kernel-upstream@cixtech.com,
	"Fugang . duan" <fugang.duan@cixtech.com>
Subject: Re: [PATCH 6/6] arm64: dts: cix: add initial CIX P1(SKY1) dts support
Date: Fri, 21 Feb 2025 12:42:23 +0100	[thread overview]
Message-ID: <5f88cdbe-f396-49c6-bb48-f50cbbb21caf@kernel.org> (raw)
In-Reply-To: <Z7cga0L6UYmPXoFw@nchen-desktop>

On 20/02/2025 13:30, Peter Chen wrote:
>>
>>> +
>>> +       aliases {
>>> +               serial2 = &uart2;
>>> +       };
>>
>> Please put the aliases in the .dts file, not the chip specific
>> .dtsi file, as each board typically wires these up differently.
>>
>> Note that the 'serial2' alias names are meant to correspond
>> to whatever label you find on the board, not the internal
>> numbering inside of the chip they are wired up to. Usually
>> these start with 'serial0' for the first one that is enabled.
> 
> In fact, we would like to alias the SoC UART controller index here,
> and amba-pl011.c will try to get it, see function pl011_probe_dt_alias.
> It is initial dtsi file, so I only add console one which needs
> to align the bootargs passed by UEFI.


Your "in fact" is not really related to the problem described. If you
put it in the correct place, drivers will work just as fine.

> 
>>
>>> +               CPU0: cpu0@0 {
>>> +                       compatible = "arm,armv8";
>>> +                       enable-method = "psci";
>>
>> This should list the actual identifier of the CPU core, not
>> just "arm,armv8" which is the generic string used in the
>> models for emulators that don't try to model a particular
>> core.
> 
> Will change big core to 'compatible = "arm,cortex-a720";'
> and LITTLE core to 'compatible = "arm,cortex-a520";'
> 
>>
>>> +       memory@80000000 {
>>> +               #address-cells = <2>;
>>> +               #size-cells = <2>;
>>> +               device_type = "memory";
>>> +               reg = <0x00000000 0x80000000 0x1 0x00000000>;
>>> +       };
>>
>> The memory size is not part of the SoC either, unless the only
>> way to use this SoC is with on-chip eDRAM or similar.
>>
>> Normally this gets filled by the bootloader based on how
>> much RAM gets detected.
> 
> Will move it to dts file.
> 
>>
>>> +               linux,cma {
>>> +                       compatible = "shared-dma-pool";
>>> +                       reusable;
>>> +                       size = <0x0 0x28000000>;
>>> +                       linux,cma-default;
>>> +               };
>>
>> Same here, this is a setting from the firmware, not the
>> SoC.
> 
> Will move it to dts file since our firmware has already released,
> and it needs to support different kernels.
> 
>>
>>> +       sky1_fixed_clocks: fixed-clocks {
>>> +               uartclk: uartclk {
>>> +                       compatible = "fixed-clock";
>>> +                       #clock-cells = <0>;
>>> +                       clock-frequency = <100000000>;
>>> +                       clock-output-names = "uartclk";
>>
>>> +               uart_apb_pclk: uart_apb_pclk {
>>> +                       compatible = "fixed-clock";
>>> +                       #clock-cells = <0>;
>>> +                       clock-frequency = <200000000>;
>>> +                       clock-output-names = "apb_pclk";
>>
>>
>> Clock names don't need "clk" in them, and there should
>> be no underscore -- use '-' instead of '_' when separating
>> strings in DT.
> 
> Will change to:
> uart_apb: clock-uart-apb {

No, instead explain why this is part of SoC - or what are you missing
here - and use preferred naming.

Please use name for all fixed clocks which matches current format
recommendation: 'clock-<freq>' (see also the pattern in the binding for
any other options).

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/clock/fixed-clock.yaml?h=v6.11-rc1



Best regards,
Krzysztof

  reply	other threads:[~2025-02-21 11:42 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-20  8:40 [PATCH 0/6] arm64: Introduce CIX P1 (SKY1) SoC Peter Chen
2025-02-20  8:40 ` [PATCH 1/6] dt-bindings: arm: add " Peter Chen
2025-02-20 12:18   ` Krzysztof Kozlowski
2025-02-20  8:40 ` [PATCH 2/6] dt-bindings: vendor-prefixes: Add CIX Technology Group Co., Ltd Peter Chen
2025-02-20 12:18   ` Krzysztof Kozlowski
2025-02-20 13:04     ` Peter Chen
2025-02-20  8:40 ` [PATCH 3/6] MAINTAINERS: Add CIX SoC maintainer entry Peter Chen
2025-02-20  8:40 ` [PATCH 4/6] arm64: Kconfig: add ARCH_CIX for cix silicons Peter Chen
2025-02-20 12:18   ` Krzysztof Kozlowski
2025-02-20 13:03     ` Peter Chen
2025-02-20  8:40 ` [PATCH 5/6] arm64: defconfig: Enable CIX SoC Peter Chen
2025-02-20 12:19   ` Krzysztof Kozlowski
2025-02-20 13:02     ` Peter Chen
2025-02-20  8:40 ` [PATCH 6/6] arm64: dts: cix: add initial CIX P1(SKY1) dts support Peter Chen
2025-02-20 10:58   ` Arnd Bergmann
2025-02-20 12:30     ` Peter Chen
2025-02-21 11:42       ` Krzysztof Kozlowski [this message]
2025-02-24  2:26         ` Peter Chen
2025-02-24  8:06           ` Krzysztof Kozlowski
2025-02-24 10:39             ` Peter Chen
2025-02-24 12:07               ` Krzysztof Kozlowski
2025-02-25  1:24                 ` Peter Chen
2025-02-20 12:23   ` Krzysztof Kozlowski
2025-02-21 22:46   ` Rob Herring
2025-02-24  6:09     ` Peter Chen
2025-02-22 20:05   ` Marcin Juszkiewicz
2025-02-24 11:36     ` Peter Chen
2025-02-24 14:06       ` Marcin Juszkiewicz
2025-02-25  3:21         ` Peter Chen
2025-02-20 21:29 ` [PATCH 0/6] arm64: Introduce CIX P1 (SKY1) SoC Rob Herring (Arm)

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