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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id bm3-20020a170906c04300b006fe8bf56f53sm5074245ejb.43.2022.05.31.06.21.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 31 May 2022 06:21:21 -0700 (PDT) Message-ID: <5fc17d02-d28c-2ad2-8a8f-dfeaf6712d6f@linaro.org> Date: Tue, 31 May 2022 15:21:20 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH 3/4] arm64: dts: exynosautov9: add secondary ufs devices Content-Language: en-US To: Chanho Park , Kishon Vijay Abraham I , Vinod Koul , Alim Akhtar , Rob Herring , Krzysztof Kozlowski Cc: devicetree@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org References: <20220531121913.48722-1-chanho61.park@samsung.com> <20220531121913.48722-4-chanho61.park@samsung.com> From: Krzysztof Kozlowski In-Reply-To: <20220531121913.48722-4-chanho61.park@samsung.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 31/05/2022 14:19, Chanho Park wrote: > Add ufs_1_phy and ufs_1 for secondary ufs hci controller and phy > device. > > Signed-off-by: Chanho Park > --- > arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 32 ++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > index 3e23db8f09d9..c146271af477 100644 > --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > @@ -380,6 +380,17 @@ ufs_0_phy: ufs0-phy@17e04000 { > status = "disabled"; > }; > > + ufs_1_phy: ufs0-phy@17f04000 { Node name: "phy" (or ufs-phy). The previous node also could be corrected. > + compatible = "samsung,exynosautov9-ufs-phy"; > + reg = <0x17f04000 0xc00>; > + reg-names = "phy-pma"; > + samsung,pmu-syscon = <&pmu_system_controller 0x72c>; > + #phy-cells = <0>; > + clocks = <&xtcxo>; > + clock-names = "ref_clk"; > + status = "disabled"; > + }; > + > ufs_0: ufs0@17e00000 { > compatible ="samsung,exynosautov9-ufs"; > > @@ -400,6 +411,27 @@ ufs_0: ufs0@17e00000 { > samsung,sysreg = <&syscon_fsys2 0x710>; > status = "disabled"; > }; > + > + ufs_1: ufs0@17f00000 { > + compatible ="samsung,exynosautov9-ufs"; > + > + reg = <0x17f00000 0x100>, /* 0: HCI standard */ > + <0x17f01100 0x410>, /* 1: Vendor-specific */ > + <0x17f80000 0x8000>, /* 2: UNIPRO */ > + <0x17de0000 0x2200>; /* 3: UFS protector */ Align these please with first <> entry. > + reg-names = "hci", "vs_hci", "unipro", "ufsp"; > + interrupts = ; > + clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_ACLK>, > + <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_UNIPRO>; > + clock-names = "core_clk", "sclk_unipro_main"; > + freq-table-hz = <0 0>, <0 0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&ufs_rst_n_1 &ufs_refclk_out_1>; > + phys = <&ufs_1_phy>; > + phy-names = "ufs-phy"; > + samsung,sysreg = <&syscon_fsys2 0x714>; > + status = "disabled"; > + }; > }; > }; > Best regards, Krzysztof