devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: "Heiko Stübner" <heiko@sntech.de>
To: Stephen Boyd <sboyd@kernel.org>, Jagan Teki <jagan@edgeble.ai>
Cc: Kever Yang <kever.yang@rock-chips.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
	linux-clk@vger.kernel.org,
	Michael Turquette <mturquette@baylibre.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: Re: [PATCH v3 10/19] dt-bindings: clock: rockchip: Document RV1126 CRU
Date: Tue, 23 Aug 2022 19:59:45 +0200	[thread overview]
Message-ID: <6086608.Sb9uPGUboI@diego> (raw)
In-Reply-To: <CA+VMnFyJOCc-RzENYs9L+U4VeJgEpMmZeSLZahcNdnL7_Cvw9Q@mail.gmail.com>

Am Freitag, 19. August 2022, 23:20:03 CEST schrieb Jagan Teki:
> On Fri, 19 Aug 2022 at 02:59, Stephen Boyd <sboyd@kernel.org> wrote:
> >
> > Quoting Jagan Teki (2022-08-18 05:41:23)
> > > +
> > > +  clocks:
> > > +    maxItems: 1
> > > +
> > > +  clock-names:
> > > +    const: xin24m
> > > +
> > > +  rockchip,grf:
> > > +    $ref: /schemas/types.yaml#/definitions/phandle
> > > +    description:
> > > +      Phandle to the syscon managing the "general register files" (GRF),
> > > +      if missing pll rates are not changeable, due to the missing pll
> > > +      lock status.
> > > +
> > > +required:
> > > +  - compatible
> > > +  - reg
> > > +  - "#clock-cells"
> > > +  - "#reset-cells"
> >
> > Why aren't clocks required?
> 
> I don't see any clocks being used by cru in rv1126 [1] so that is the
> reason I didn't add any. Let me know if it is something that is
> mandatory to add even if it's unused.
> [1] https://github.com/rockchip-linux/kernel/blob/develop-4.19/arch/arm/boot/dts/rv1126.dtsi#L1074

Our clock drivers normally just expect that xin24m to be present
but that xin24m _is_ a clock dependency for the cru and for a lot
of Rockchip SoCs Johan did update both the binding and the dtsi-s
to make that explicit when converting the binding over to yaml

See for example the rk3399.

Heiko



  reply	other threads:[~2022-08-23 19:21 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-18 12:41 [PATCH v3 00/19] ARM: Add Rockchip RV1126 support Jagan Teki
2022-08-18 12:41 ` [PATCH v3 01/19] dt-bindings: power: Add power-domain header for RV1126 Jagan Teki
2022-08-19 12:25   ` Krzysztof Kozlowski
2022-08-18 12:41 ` [PATCH v3 02/19] dt-bindings: power: rockchip: Document RV1126 power-controller Jagan Teki
2022-08-18 12:41 ` [PATCH v3 03/19] soc: rockchip: power-domain: Add RV1126 power domains Jagan Teki
2022-08-18 12:41 ` [PATCH v3 04/19] dt-bindings: power: rockchip: Document RV1126 PMU IO domains Jagan Teki
2022-08-18 12:41 ` [PATCH v3 05/19] soc: rockchip: io-domain: Add RV1126 " Jagan Teki
2022-08-18 12:41 ` [PATCH v3 06/19] dt-bindings: pinctrl: rockchip: Document RV1126 pinctrl Jagan Teki
2022-08-22  7:50   ` Linus Walleij
2022-08-18 12:41 ` [PATCH v3 07/19] pinctrl: rockchip: Add RV1126 pinctrl support Jagan Teki
2022-08-22  7:51   ` Linus Walleij
2022-08-18 12:41 ` [PATCH v3 08/19] clk: rockchip: Add MUXTBL variant Jagan Teki
2022-08-18 12:41 ` [PATCH v3 09/19] clk: rockchip: Add dt-binding header for RV1126 Jagan Teki
2022-08-22 18:10   ` Rob Herring
2022-08-23 12:57     ` Jagan Teki
2022-08-23 17:56       ` Heiko Stübner
2022-09-05  5:27         ` Jagan Teki
2022-09-05 16:37           ` Krzysztof Kozlowski
2022-08-18 12:41 ` [PATCH v3 10/19] dt-bindings: clock: rockchip: Document RV1126 CRU Jagan Teki
2022-08-18 21:29   ` Stephen Boyd
2022-08-19 21:20     ` Jagan Teki
2022-08-23 17:59       ` Heiko Stübner [this message]
2022-08-18 12:41 ` [PATCH v3 11/19] Add clock controller support for RV1126 SoC Jagan Teki
2022-08-18 12:41 ` [PATCH v3 12/19] dt-bindings: soc: rockchip: Document RV1126 grf Jagan Teki
2022-08-18 12:41 ` [PATCH v3 13/19] dt-bindings: soc: rockchip: Document RV1126 pmugrf Jagan Teki
2022-08-18 12:41 ` [PATCH v3 14/19] ARM: dts: rockchip: Add Rockchip RV1126 pinctrl Jagan Teki
2022-08-18 12:41 ` [PATCH v3 15/19] ARM: dts: rockchip: Add Rockchip RV1126 SoC Jagan Teki
2022-08-18 12:41 ` [PATCH v3 16/19] dt-bindings: vendor-prefixes: Add Edgeble AI Technologies Pvt. Ltd Jagan Teki
2022-08-18 12:41 ` [PATCH v3 17/19] dt-bindings: arm: rockchip: Add Edgeble AI Edge Compute Module 0 Carrier Jagan Teki
2022-08-18 12:41 ` [PATCH v3 18/19] ARM: dts: rockchip: rv1126: Add Edgeble AI Edge Compute Module 0 Jagan Teki
2022-08-18 12:41 ` [PATCH v3 19/19] ARM: dts: rockchip: rv1126: Add Edgeble AI Edge Compute Module 0 Carrier Jagan Teki
2022-09-05  9:58 ` (subset) [PATCH v3 00/19] ARM: Add Rockchip RV1126 support Heiko Stuebner

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=6086608.Sb9uPGUboI@diego \
    --to=heiko@sntech.de \
    --cc=devicetree@vger.kernel.org \
    --cc=jagan@edgeble.ai \
    --cc=kever.yang@rock-chips.com \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=krzysztof.kozlowski@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-rockchip@lists.infradead.org \
    --cc=mturquette@baylibre.com \
    --cc=robh+dt@kernel.org \
    --cc=sboyd@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).