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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id dk6sm8164992edb.14.2021.08.30.14.00.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 30 Aug 2021 14:00:18 -0700 (PDT) Subject: Re: [PATCH v1 4/5] dt-bindings: phy: phy-rockchip-dphy-rx0: add support for tx1rx1 phy To: Mikhail Rudenko , linux-phy@lists.infradead.org Cc: linux-media@vger.kernel.org, Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Heiko Stuebner , Helen Koike , Ezequiel Garcia , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org References: <20210830180758.251390-1-mike.rudenko@gmail.com> <20210830180758.251390-5-mike.rudenko@gmail.com> From: Johan Jonker Message-ID: <60aa055c-d872-3e5c-3c85-09300215a60e@gmail.com> Date: Mon, 30 Aug 2021 23:00:17 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20210830180758.251390-5-mike.rudenko@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Mikhail, Some comments below. Have a look if it is useful. On 8/30/21 8:07 PM, Mikhail Rudenko wrote: > RK3399 TX1RX1 D-PHY is not a child of GRF and uses reg, thus add > corresponding properties conditionally. It also requires DSI clock to > operate, so check for it. Since we now support both rx0 and tx1rx1, > rename the schema to rockchip-mipi-dphy-rx.yaml. > > Signed-off-by: Mikhail Rudenko > --- > ...hy-rx0.yaml => rockchip-mipi-dphy-rx.yaml} | 39 +++++++++++++++++-- > 1 file changed, 35 insertions(+), 4 deletions(-) > rename Documentation/devicetree/bindings/phy/{rockchip-mipi-dphy-rx0.yaml => rockchip-mipi-dphy-rx.yaml} (65%) > > diff --git a/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml b/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx.yaml > similarity index 65% > rename from Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml > rename to Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx.yaml > index 7d888d358823..f42319448fc9 100644 > --- a/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml > +++ b/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx.yaml > @@ -1,10 +1,10 @@ > # SPDX-License-Identifier: (GPL-2.0+ OR MIT) > %YAML 1.2 > --- > -$id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx0.yaml# > +$id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx.yaml# > $schema: http://devicetree.org/meta-schemas/core.yaml# > > -title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings > +title: Rockchip SoC MIPI RX0/TX1RX1 D-PHY Device Tree Bindings > > maintainers: > - Helen Koike > @@ -16,19 +16,28 @@ description: | > > properties: > compatible: > - const: rockchip,rk3399-mipi-dphy-rx0 > + enum: > + - rockchip,rk3399-mipi-dphy-rx0 > + - rockchip,rk3399-mipi-dphy-tx1rx1 > + > + reg: > + maxItems: 1 This allows every node to have a reg property. > > clocks: > + minItems: 3 > items: > - description: MIPI D-PHY ref clock > - - description: MIPI D-PHY RX0 cfg clock > + - description: MIPI D-PHY RX0/TX1RX1 cfg clock > - description: Video in/out general register file clock > + - description: MIPI D-PHY DSI clock > > clock-names: > + minItems: 3 > items: > - const: dphy-ref > - const: dphy-cfg > - const: grf > + - const: dsi > > '#phy-cells': > const: 0 > @@ -37,6 +46,12 @@ properties: > description: Video in/out power domain. > maxItems: 1 > > + rockchip,grf: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + The phandle of the syscon node for the general register file > + (GRF), required for TX1RX1 MIPI D-PHY on RK3399. This allows every node to have a rockchip,grf property. > + > required: > - compatible > - clocks > @@ -44,6 +59,22 @@ required: > - '#phy-cells' > - power-domains > > +if: > + properties: > + compatible: > + contains: > + const: rockchip,rk3399-mipi-dphy-tx1rx1 > +then: > + required: Move/swap the properties section above the required section. > + - reg > + - rockchip,grf > + > + properties: reg: maxItems: 1 > + clocks: > + minItems: 4 > + clock-names: > + minItems: 4 rockchip,grf: $ref: /schemas/types.yaml#/definitions/phandle description: The phandle of the syscon node for the general register file(GRF). ", required for TX1RX1 MIPI D-PHY on RK3399." This phrase is already said/done with the "required:" section above > additionalProperties: false > > examples: >