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From: "Andy Yan" <andyshrk@163.com>
To: "Cristian Ciocaltea" <cristian.ciocaltea@collabora.com>
Cc: "Heiko Stübner" <heiko@sntech.de>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Andrzej Hajda" <andrzej.hajda@intel.com>,
	"Neil Armstrong" <neil.armstrong@linaro.org>,
	"Robert Foss" <rfoss@kernel.org>,
	"Laurent Pinchart" <Laurent.pinchart@ideasonboard.com>,
	"Jonas Karlman" <jonas@kwiboo.se>,
	"Jernej Skrabec" <jernej.skrabec@gmail.com>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"David Airlie" <airlied@gmail.com>,
	"Daniel Vetter" <daniel@ffwll.ch>,
	"Sandy Huang" <hjc@rock-chips.com>,
	"Andy Yan" <andy.yan@rock-chips.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Mark Yao" <markyao0591@gmail.com>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
	kernel@collabora.com, "Alexandre ARNOUD" <aarnoud@me.com>,
	"Luis de Arquer" <ldearquer@gmail.com>
Subject: Re:Re: [PATCH v5 1/4] dt-bindings: display: bridge: Add schema for Synopsys DW HDMI QP TX IP
Date: Sun, 1 Sep 2024 14:40:11 +0800 (CST)	[thread overview]
Message-ID: <610d9bc3.159c.191ac5005f5.Coremail.andyshrk@163.com> (raw)
In-Reply-To: <aee7b364-39df-4eb4-a823-4e734f104982@collabora.com>


Hi,

在 2024-09-01 05:53:39,"Cristian Ciocaltea" <cristian.ciocaltea@collabora.com> 写道:
>On 8/31/24 4:58 PM, Heiko Stübner wrote:
>> Hi,
>> 
>> Am Samstag, 31. August 2024, 08:16:26 CEST schrieb Krzysztof Kozlowski:
>>> On Sat, Aug 31, 2024 at 12:55:29AM +0300, Cristian Ciocaltea wrote:
>> 
>>>> +  clocks:
>>>> +    minItems: 4
>>>> +    maxItems: 6
>>>> +    items:
>>>> +      - description: Peripheral/APB bus clock
>>>> +      - description: EARC RX biphase clock
>>>> +      - description: Reference clock
>>>> +      - description: Audio interface clock
>>>> +    additionalItems: true
>>>
>>> What is the usefulness of all this? How can you even be sure that each
>>> implementation of this core will have exactly these clocks?
>>>
>>>> +
>>>> +  clock-names:
>>>> +    minItems: 4
>>>> +    maxItems: 6
>>>> +    items:
>>>> +      - const: pclk
>>>> +      - const: earc
>>>> +      - const: ref
>>>> +      - const: aud
>>>> +    additionalItems: true
>>>> +
>>>> +  interrupts:
>>>> +    minItems: 4
>>>> +    maxItems: 5
>>>> +    items:
>>>> +      - description: AVP Unit interrupt
>>>> +      - description: CEC interrupt
>>>> +      - description: eARC RX interrupt
>>>> +      - description: Main Unit interrupt
>>>
>>> If these are real pins, then this seems more possible, but
>>> additionalItems does not make me happy.
>> 
>> So while not "pins", the interrupts are separately specified in the
>> SoC's list of interrupts in the GIC:
>> 
>> RK3588 has:
>> 
>> 201  irq_hdmitx0_oavp
>> 202  irq_hdmitx0_ocec
>> 203  irq_hdmitx0_oearcrx
>> 204  irq_hdmitx0_omain
>> 392  irq_hdmitx0_hpd
>> 
>> and another set of all of them for hdmitx1
>> 
>> and RK3576 using the same hdmi IP has:
>> 
>> 370  irq_hdmitx_oavp
>> 371  irq_hdmitx_ocec
>> 372  irq_hdmitx_oearcrx
>> 373  irq_hdmitx_omain
>> 399  irq_hdmitx_hpd

The first four interrupts are export from the DW-HDMI-QP IP core。
The fifth HPD interrupts is a rockchip design。

>> 
>> so I guess the fifth interrupt is meant to be the hotplug?
>
>Yep, that's for the hotplug detection.
>
>> Though I guess this should be specificed in the name-list too.
>
>My understanding from Andy was that HPD interrupt is Rockchip platform
>specific, hence I made it part of rockchip,rk3588-dw-hdmi-qp.yaml.
>
>> From the SoC's manual it looks like the controller is set up from
>> different modules.
>> Like AVP is the audio-video-packet-module, there is a Main and CEC Module
>> as well as a eARC RX controller inside. I'd guess it might be possible
>> other SoC vendors could leave out specific modules?
>> 
>> 
>> TL;DR I think those clocks and interrupts are dependent on how the
>> IP core was synthesized, so for now I'd think we can only guarantee
>> that they are true for rk3588 and rk3576.
>> 
>> So I guess they should move to the rockchip-specific part of the binding
>> until we have more hdmi-qp controllers in the field?
>
>If that's the case, then we should simply drop the common binding
>altogether for now.
>
>Thanks,
>Cristian
>
>_______________________________________________
>Linux-rockchip mailing list
>Linux-rockchip@lists.infradead.org
>http://lists.infradead.org/mailman/listinfo/linux-rockchip

  reply	other threads:[~2024-09-01  6:42 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-30 21:55 [PATCH v5 0/4] Add initial support for the Rockchip RK3588 HDMI TX Controller Cristian Ciocaltea
2024-08-30 21:55 ` [PATCH v5 1/4] dt-bindings: display: bridge: Add schema for Synopsys DW HDMI QP TX IP Cristian Ciocaltea
2024-08-31  6:16   ` Krzysztof Kozlowski
2024-08-31 13:58     ` Heiko Stübner
2024-08-31 21:53       ` Cristian Ciocaltea
2024-09-01  6:40         ` Andy Yan [this message]
2024-09-01 10:23       ` Krzysztof Kozlowski
2024-08-30 21:55 ` [PATCH v5 2/4] drm/bridge: synopsys: Add DW HDMI QP TX Controller support library Cristian Ciocaltea
2024-09-08  9:11   ` Markus Elfring
2024-09-10 15:52     ` Cristian Ciocaltea
2024-08-30 21:55 ` [PATCH v5 3/4] dt-bindings: display: rockchip: Add schema for RK3588 HDMI TX Controller Cristian Ciocaltea
2024-08-31  6:13   ` Krzysztof Kozlowski
2024-08-31 22:01     ` Cristian Ciocaltea
2024-09-02  1:09       ` Shimrra Shai
2024-09-02 22:14         ` Cristian Ciocaltea
2024-08-30 21:55 ` [PATCH v5 4/4] drm/rockchip: Add basic RK3588 HDMI output support Cristian Ciocaltea

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