[PATCH 1/1] arm64: dts: imx8-ss-dma: enable dma support for lpspi

[PATCH 1/1] arm64: dts: imx8-ss-dma: enable dma support for lpspi

[Alexander Stein]

From: Clark Wang <xiaoning.wang@nxp.com>

Add DMA configurations for LPSPI nodes on i.MX8QX/QM/DXL.

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
---
Using the DMA configuration bits from downstream kernel.
Tested on TQMa8XxS.

 arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index 1ee9496c988c5..8ae5f065b4180 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -34,6 +34,8 @@ lpspi0: spi@5a000000 {
 		assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
 		assigned-clock-rates = <60000000>;
 		power-domains = <&pd IMX_SC_R_SPI_0>;
+		dma-names = "tx","rx";
+		dmas = <&edma2 1 0 0>, <&edma2 0 0 FSL_EDMA_RX>;
 		status = "disabled";
 	};
 
@@ -50,6 +52,8 @@ lpspi1: spi@5a010000 {
 		assigned-clocks = <&clk IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>;
 		assigned-clock-rates = <60000000>;
 		power-domains = <&pd IMX_SC_R_SPI_1>;
+		dma-names = "tx","rx";
+		dmas = <&edma2 3 0 0>, <&edma2 2 0 FSL_EDMA_RX>;
 		status = "disabled";
 	};
 
@@ -66,6 +70,8 @@ lpspi2: spi@5a020000 {
 		assigned-clocks = <&clk IMX_SC_R_SPI_2 IMX_SC_PM_CLK_PER>;
 		assigned-clock-rates = <60000000>;
 		power-domains = <&pd IMX_SC_R_SPI_2>;
+		dma-names = "tx","rx";
+		dmas = <&edma2 5 0 0>, <&edma2 4 0 FSL_EDMA_RX>;
 		status = "disabled";
 	};
 
@@ -82,6 +88,8 @@ lpspi3: spi@5a030000 {
 		assigned-clocks = <&clk IMX_SC_R_SPI_3 IMX_SC_PM_CLK_PER>;
 		assigned-clock-rates = <60000000>;
 		power-domains = <&pd IMX_SC_R_SPI_3>;
+		dma-names = "tx","rx";
+		dmas = <&edma2 7 0 0>, <&edma2 6 0 FSL_EDMA_RX>;
 		status = "disabled";
 	};
 
-- 
2.34.1

Re: [PATCH 1/1] arm64: dts: imx8-ss-dma: enable dma support for lpspi

[Krzysztof Kozlowski]

On 29/07/2024 11:45, Alexander Stein wrote:
> From: Clark Wang <xiaoning.wang@nxp.com>
> 
> Add DMA configurations for LPSPI nodes on i.MX8QX/QM/DXL.
> 
> Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> ---
> Using the DMA configuration bits from downstream kernel.
> Tested on TQMa8XxS.
> 
>  arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> index 1ee9496c988c5..8ae5f065b4180 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> @@ -34,6 +34,8 @@ lpspi0: spi@5a000000 {
>  		assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
>  		assigned-clock-rates = <60000000>;
>  		power-domains = <&pd IMX_SC_R_SPI_0>;
> +		dma-names = "tx","rx";

Missing spaces. Unexpected order, unless that's the coding style for imx.

Best regards,
Krzysztof

Re: [PATCH 1/1] arm64: dts: imx8-ss-dma: enable dma support for lpspi

[Alexander Stein]

Hi Krzysztof,

Am Montag, 29. Juli 2024, 17:10:48 CEST schrieb Krzysztof Kozlowski:
> On 29/07/2024 11:45, Alexander Stein wrote:
> > From: Clark Wang <xiaoning.wang@nxp.com>
> > 
> > Add DMA configurations for LPSPI nodes on i.MX8QX/QM/DXL.
> > 
> > Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
> > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> > ---
> > Using the DMA configuration bits from downstream kernel.
> > Tested on TQMa8XxS.
> > 
> >  arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> > index 1ee9496c988c5..8ae5f065b4180 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> > @@ -34,6 +34,8 @@ lpspi0: spi@5a000000 {
> >  		assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
> >  		assigned-clock-rates = <60000000>;
> >  		power-domains = <&pd IMX_SC_R_SPI_0>;
> > +		dma-names = "tx","rx";
> 
> Missing spaces. Unexpected order, unless that's the coding style for imx.

Ack for the space, will correct. But the order is defined that way in
Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml

Best regards,
Alexander
-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/

Re: [PATCH 1/1] arm64: dts: imx8-ss-dma: enable dma support for lpspi

[Krzysztof Kozlowski]

On 30/07/2024 09:30, Alexander Stein wrote:
> Hi Krzysztof,
> 
> Am Montag, 29. Juli 2024, 17:10:48 CEST schrieb Krzysztof Kozlowski:
>> On 29/07/2024 11:45, Alexander Stein wrote:
>>> From: Clark Wang <xiaoning.wang@nxp.com>
>>>
>>> Add DMA configurations for LPSPI nodes on i.MX8QX/QM/DXL.
>>>
>>> Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
>>> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
>>> ---
>>> Using the DMA configuration bits from downstream kernel.
>>> Tested on TQMa8XxS.
>>>
>>>  arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 8 ++++++++
>>>  1 file changed, 8 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
>>> index 1ee9496c988c5..8ae5f065b4180 100644
>>> --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
>>> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
>>> @@ -34,6 +34,8 @@ lpspi0: spi@5a000000 {
>>>  		assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
>>>  		assigned-clock-rates = <60000000>;
>>>  		power-domains = <&pd IMX_SC_R_SPI_0>;
>>> +		dma-names = "tx","rx";
>>
>> Missing spaces. Unexpected order, unless that's the coding style for imx.
> 
> Ack for the space, will correct. But the order is defined that way in
> Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml

Bindings do not define the order of properties. The coding style does
and usually we expect property-x followed by property-x-names.

Best regards,
Krzysztof

Re: [PATCH 1/1] arm64: dts: imx8-ss-dma: enable dma support for lpspi

[Alexander Stein]

Am Dienstag, 30. Juli 2024, 09:37:53 CEST schrieb Krzysztof Kozlowski:
> On 30/07/2024 09:30, Alexander Stein wrote:
> > Hi Krzysztof,
> > 
> > Am Montag, 29. Juli 2024, 17:10:48 CEST schrieb Krzysztof Kozlowski:
> >> On 29/07/2024 11:45, Alexander Stein wrote:
> >>> From: Clark Wang <xiaoning.wang@nxp.com>
> >>>
> >>> Add DMA configurations for LPSPI nodes on i.MX8QX/QM/DXL.
> >>>
> >>> Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
> >>> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> >>> ---
> >>> Using the DMA configuration bits from downstream kernel.
> >>> Tested on TQMa8XxS.
> >>>
> >>>  arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 8 ++++++++
> >>>  1 file changed, 8 insertions(+)
> >>>
> >>> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> >>> index 1ee9496c988c5..8ae5f065b4180 100644
> >>> --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> >>> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> >>> @@ -34,6 +34,8 @@ lpspi0: spi@5a000000 {
> >>>  		assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
> >>>  		assigned-clock-rates = <60000000>;
> >>>  		power-domains = <&pd IMX_SC_R_SPI_0>;
> >>> +		dma-names = "tx","rx";
> >>
> >> Missing spaces. Unexpected order, unless that's the coding style for imx.
> > 
> > Ack for the space, will correct. But the order is defined that way in
> > Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml
> 
> Bindings do not define the order of properties. The coding style does
> and usually we expect property-x followed by property-x-names.

Ah, you were talking about order of properties, not order of property
values, my bad. Unfortunately imx (and also layerscape) is inconsistent,
having both ways :(
I'll go for you suggestion, this seems also to be the order used mostly.

Best regards,
Alexander
-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/