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Juli 2024, 09:37:53 CEST schrieb Krzysztof Kozlowski: > On 30/07/2024 09:30, Alexander Stein wrote: > > Hi Krzysztof, > >=20 > > Am Montag, 29. Juli 2024, 17:10:48 CEST schrieb Krzysztof Kozlowski: > >> On 29/07/2024 11:45, Alexander Stein wrote: > >>> From: Clark Wang > >>> > >>> Add DMA configurations for LPSPI nodes on i.MX8QX/QM/DXL. > >>> > >>> Signed-off-by: Clark Wang > >>> Signed-off-by: Alexander Stein > >>> --- > >>> Using the DMA configuration bits from downstream kernel. > >>> Tested on TQMa8XxS. > >>> > >>> arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 8 ++++++++ > >>> 1 file changed, 8 insertions(+) > >>> > >>> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/ar= m64/boot/dts/freescale/imx8-ss-dma.dtsi > >>> index 1ee9496c988c5..8ae5f065b4180 100644 > >>> --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > >>> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > >>> @@ -34,6 +34,8 @@ lpspi0: spi@5a000000 { > >>> assigned-clocks =3D <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>; > >>> assigned-clock-rates =3D <60000000>; > >>> power-domains =3D <&pd IMX_SC_R_SPI_0>; > >>> + dma-names =3D "tx","rx"; > >> > >> Missing spaces. Unexpected order, unless that's the coding style for i= mx. > >=20 > > Ack for the space, will correct. But the order is defined that way in > > Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml >=20 > Bindings do not define the order of properties. The coding style does > and usually we expect property-x followed by property-x-names. Ah, you were talking about order of properties, not order of property values, my bad. Unfortunately imx (and also layerscape) is inconsistent, having both ways :( I'll go for you suggestion, this seems also to be the order used mostly. Best regards, Alexander =2D-=20 TQ-Systems GmbH | M=FChlstra=DFe 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht M=FCnchen, HRB 105018 Gesch=E4ftsf=FChrer: Detlef Schneider, R=FCdiger Stahl, Stefan Schneider http://www.tq-group.com/