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From: Johan Jonker <jbx6244@gmail.com>
To: miquel.raynal@bootlin.com
Cc: richard@nod.at, vigneshr@ti.com, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
	linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: [PATCH v1 1/2] dt-bindings: mtd: nand-controller: add nand-skip-bbtscan and nand-no-bbm-quirk DT options
Date: Sat, 15 Jul 2023 12:48:16 +0200	[thread overview]
Message-ID: <61c84262-cd98-1e60-d95b-9b0492083994@gmail.com> (raw)

A NAND chip can contain a different data format then the MTD framework
expects in the erase blocks for the Bad Block Table(BBT).
Result is a failed probe, while nothing wrong with the hardware.
Some MTD flags need to be set to gain access again.

Skip the automatic BBT scan with the NAND_SKIP_BBTSCAN option
so that the original content is unchanged during the driver probe.
The NAND_NO_BBM_QUIRK option allows us to erase bad blocks with
the nand_erase_nand() function and the flash_erase command.

Add nand-skip-bbtscan and nand-no-bbm-quirk Device Tree options,
so the user has the "freedom of choice" by neutral
access mode to read and write in whatever format is needed.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---

Previous discussion:
[PATCH v3 3/3] mtd: rawnand: rockchip-nand-controller: add skipbbt option
https://lore.kernel.org/linux-mtd/1618382560.2326931.1689261435022.JavaMail.zimbra@nod.at/
---
 .../devicetree/bindings/mtd/nand-controller.yaml    | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
index f70a32d2d9d4..ca04d06a0377 100644
--- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml
+++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
@@ -103,6 +103,19 @@ patternProperties:
           the boot ROM or similar restrictions.
         $ref: /schemas/types.yaml#/definitions/flag

+      nand-no-bbm-quirk:
+        description:
+          Some controllers with pipelined ECC engines override the BBM marker with
+          data or ECC bytes, thus making bad block detection through bad block marker
+          impossible. Let's flag those chips so the core knows it shouldn't check the
+          BBM and consider all blocks good.
+        $ref: /schemas/types.yaml#/definitions/flag
+
+      nand-skip-bbtscan:
+        description:
+          This option skips the BBT scan during initialization.
+        $ref: /schemas/types.yaml#/definitions/flag
+
       nand-rb:
         description:
           Contains the native Ready/Busy IDs.
--
2.30.2


             reply	other threads:[~2023-07-15 10:48 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-15 10:48 Johan Jonker [this message]
2023-07-15 10:49 ` [PATCH v1 2/2] mtd: rawnand: add nand-skip-bbtscan and nand-no-bbm-quirk DT options Johan Jonker
2023-07-15 15:55   ` Miquel Raynal
2023-07-17 10:49     ` Johan Jonker
2023-07-31  9:08       ` Miquel Raynal
2023-07-18 15:46 ` [PATCH v1 1/2] dt-bindings: mtd: nand-controller: " Conor Dooley
2023-07-19 19:39   ` Johan Jonker
2023-07-31  9:04     ` Miquel Raynal

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