From: Dmitry Osipenko <digetx@gmail.com>
To: Akhil R <akhilrajeev@nvidia.com>
Cc: Pavan Kunapuli <pkunapuli@nvidia.com>,
"dan.j.williams@intel.com" <dan.j.williams@intel.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
Jonathan Hunter <jonathanh@nvidia.com>,
Krishna Yarlagadda <kyarlagadda@nvidia.com>,
Laxman Dewangan <ldewangan@nvidia.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
Rajesh Gumasta <rgumasta@nvidia.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"thierry.reding@gmail.com" <thierry.reding@gmail.com>,
"vkoul@kernel.org" <vkoul@kernel.org>
Subject: Re: [PATCH v15 2/4] dmaengine: tegra: Add tegra gpcdma driver
Date: Mon, 20 Dec 2021 19:30:37 +0300 [thread overview]
Message-ID: <6241cfa3-dd7e-012c-3687-daad0aa4631d@gmail.com> (raw)
In-Reply-To: <BN9PR12MB52730121B2B01739DA52020EC07B9@BN9PR12MB5273.namprd12.prod.outlook.com>
20.12.2021 18:23, Akhil R пишет:
>> 16.12.2021 20:11, Akhil R пишет:
>>> +static int tegra_dma_terminate_all(struct dma_chan *dc) {
>>> + struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
>>> + unsigned long wcount = 0;
>>> + unsigned long status;
>>> + unsigned long flags;
>>> + int err;
>>> +
>>> + raw_spin_lock_irqsave(&tdc->lock, flags);
>>> +
>>> + if (!tdc->dma_desc) {
>>> + raw_spin_unlock_irqrestore(&tdc->lock, flags);
>>> + return 0;
>>> + }
>>> +
>>> + if (!tdc->busy)
>>> + goto skip_dma_stop;
>>> +
>>> + if (tdc->tdma->chip_data->hw_support_pause)
>>> + err = tegra_dma_pause(tdc);
>>> + else
>>> + err = tegra_dma_stop_client(tdc);
>>> +
>>> + if (err) {
>>> + raw_spin_unlock_irqrestore(&tdc->lock, flags);
>>> + return err;
>>> + }
>>> +
>>> + status = tdc_read(tdc, TEGRA_GPCDMA_CHAN_STATUS);
>>> + if (status & TEGRA_GPCDMA_STATUS_ISE_EOC) {
>>> + dev_dbg(tdc2dev(tdc), "%s():handling isr\n", __func__);
>>> + tegra_dma_xfer_complete(tdc);
>>> + status = tdc_read(tdc, TEGRA_GPCDMA_CHAN_STATUS);
>>> + }
>>> +
>>> + wcount = tdc_read(tdc, TEGRA_GPCDMA_CHAN_XFER_COUNT);
>>> + tegra_dma_stop(tdc);
>>> +
>>> + tdc->dma_desc->bytes_transferred +=
>>> + tdc->dma_desc->bytes_requested - (wcount * 4);
>>> +
>>> +skip_dma_stop:
>>> + tegra_dma_sid_free(tdc);
>>> + vchan_free_chan_resources(&tdc->vc);
>>> + kfree(&tdc->vc);
>>
>> You really going to kfree the head of tegra_dma_channel here? Once again, this
>> code was 100% untested :/
> I did validate this using DMATEST which did not show any error.
> https://www.kernel.org/doc/html/latest/driver-api/dmaengine/dmatest.html
> Do you suggest something better?
>
>> You're not allowed to free channel from the dma_terminate_all() callback. This
>> callback terminates submitted descs, that's it.
>>
> Sorry, I am relatively new to DMA framework (probably you get it from the patch
> version no. :)). I read your previous comment as to use tdc->vc instead of dma_desc.
> I would learn a bit more and update with a change. Thanks for the inputs.
Looks like DMATEST doesn't try to terminate in a middle of transfer and
then check that further transfers work. You may try to extend DMATEST or
simulate I2C error to test it, you should also test it with enabled KASAN.
next prev parent reply other threads:[~2021-12-20 16:30 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-16 17:11 [PATCH v15 0/4] Add NVIDIA Tegra GPC-DMA driver Akhil R
2021-12-16 17:11 ` [PATCH v15 1/4] dt-bindings: dmaengine: Add doc for tegra gpcdma Akhil R
2021-12-16 17:11 ` [PATCH v15 2/4] dmaengine: tegra: Add tegra gpcdma driver Akhil R
2021-12-16 17:42 ` Dmitry Osipenko
2021-12-20 15:23 ` Akhil R
2021-12-20 16:30 ` Dmitry Osipenko [this message]
2021-12-16 17:11 ` [PATCH v15 3/4] arm64: defconfig: tegra: Enable GPCDMA Akhil R
2021-12-16 17:12 ` [PATCH v15 4/4] arm64: tegra: Add GPCDMA node for tegra186 and tegra194 Akhil R
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