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Thu, 28 Nov 2024 07:55:40 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4AS7tdRY002020 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 28 Nov 2024 07:55:39 GMT Received: from [10.231.207.28] (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 27 Nov 2024 23:55:33 -0800 Message-ID: <624393e7-0681-41c3-9008-de50cdf997b5@quicinc.com> Date: Thu, 28 Nov 2024 15:55:31 +0800 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] arm64: dts: qcom: qcs8300: Adds SPMI support To: Dmitry Baryshkov CC: , , , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , References: <20241126-adds-spmi-pmic-peripherals-for-qcs8300-v1-0-28af84cb86f8@quicinc.com> <20241126-adds-spmi-pmic-peripherals-for-qcs8300-v1-1-28af84cb86f8@quicinc.com> Content-Language: en-US From: Tingguo Cheng In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: DqahfMbYaIQear_irqcOd0hml2VeNty9 X-Proofpoint-ORIG-GUID: DqahfMbYaIQear_irqcOd0hml2VeNty9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 malwarescore=0 phishscore=0 suspectscore=0 adultscore=0 spamscore=0 lowpriorityscore=0 mlxscore=0 impostorscore=0 clxscore=1015 mlxlogscore=951 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2411280061 On 11/26/2024 7:50 PM, Dmitry Baryshkov wrote: > On Tue, Nov 26, 2024 at 05:35:05PM +0800, Tingguo Cheng wrote: >> Add the SPMI bus arbiter node for QCS8300 SoC which connected >> with PMICs on QCS8300 boards. > > Could you please comment, what is the version of the SPMI controller / > arbiter? Sure, let me add the version information in the commit message. > >> >> Signed-off-by: Tingguo Cheng >> --- >> arch/arm64/boot/dts/qcom/qcs8300.dtsi | 22 ++++++++++++++++++++++ >> 1 file changed, 22 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi >> index 2c35f96c3f289d5e2e57e0e30ef5e17cd1286188..03bf72d6ec5c9ec92f6f53df9253c8c5953e13c4 100644 >> --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi >> +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi >> @@ -939,6 +939,28 @@ IPCC_MPROC_SIGNAL_GLINK_QMP >> #clock-cells = <0>; >> }; >> >> + spmi_bus: spmi@c440000 { >> + compatible = "qcom,spmi-pmic-arb"; >> + reg = <0x0 0x0c440000 0x0 0x1100>, >> + <0x0 0x0c600000 0x0 0x2000000>, >> + <0x0 0x0e600000 0x0 0x100000>, >> + <0x0 0x0e700000 0x0 0xa0000>, >> + <0x0 0x0c40a000 0x0 0x26000>; >> + reg-names = "core", >> + "chnls", >> + "obsrvr", >> + "intr", >> + "cnfg"; >> + qcom,channel = <0>; >> + qcom,ee = <0>; >> + interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; >> + interrupt-names = "periph_irq"; >> + interrupt-controller; >> + #interrupt-cells = <4>; >> + #address-cells = <2>; >> + #size-cells = <0>; >> + }; >> + >> tlmm: pinctrl@f100000 { >> compatible = "qcom,qcs8300-tlmm"; >> reg = <0x0 0x0f100000 0x0 0x300000>; >> >> -- >> 2.34.1 >> > -- Thank you & BRs Tingguo