* [PATCH v3 1/2] usb: dwc3: core: add support for remapping global register start address
@ 2023-04-21 6:18 Stanley Chang
2023-04-21 6:18 ` [PATCH v3 2/2] dt-bindings: usb: snps,dwc3: Add 'snps,global-regs-starting-offset' quirk Stanley Chang
0 siblings, 1 reply; 4+ messages in thread
From: Stanley Chang @ 2023-04-21 6:18 UTC (permalink / raw)
To: Thinh Nguyen
Cc: Stanley Chang, Greg Kroah-Hartman, Rob Herring,
Krzysztof Kozlowski, Felipe Balbi, linux-usb, devicetree,
linux-kernel
The RTK DHC SoCs were designed the global register address offset at
0x8100. The default address offset is constant at DWC3_GLOBALS_REGS_START
(0xc100). Therefore, add the property of device-tree to adjust this
address offset.
Signed-off-by: Stanley Chang <stanley_chang@realtek.com>
---
v2 to v3 change:
1. Fix the dtschema validation error.
v1 to v2 change:
1. Change the name of the property "snps,global-regs-starting-offset".
2. Adjust the format of comment.
3. Add initial value of the global_regs_starting_offset
4. Remove the log of dev_info.
---
drivers/usb/dwc3/core.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 476b63618511..8c1d1afbdc65 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -1785,6 +1785,21 @@ static int dwc3_probe(struct platform_device *pdev)
dwc_res = *res;
dwc_res.start += DWC3_GLOBALS_REGS_START;
+ /*
+ * For some dwc3 controller, the dwc3 global register start address is
+ * not at DWC3_GLOBALS_REGS_START (0xc100).
+ */
+ if (dev->of_node) {
+ int global_regs_starting_offset = 0;
+
+ device_property_read_u32(dev, "snps,global-regs-starting-offset",
+ &global_regs_starting_offset);
+ if (global_regs_starting_offset) {
+ dwc_res.start -= DWC3_GLOBALS_REGS_START;
+ dwc_res.start += global_regs_starting_offset;
+ }
+ }
+
regs = devm_ioremap_resource(dev, &dwc_res);
if (IS_ERR(regs))
return PTR_ERR(regs);
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v3 2/2] dt-bindings: usb: snps,dwc3: Add 'snps,global-regs-starting-offset' quirk
2023-04-21 6:18 [PATCH v3 1/2] usb: dwc3: core: add support for remapping global register start address Stanley Chang
@ 2023-04-21 6:18 ` Stanley Chang
2023-04-21 13:04 ` Rob Herring
0 siblings, 1 reply; 4+ messages in thread
From: Stanley Chang @ 2023-04-21 6:18 UTC (permalink / raw)
To: Thinh Nguyen
Cc: Stanley Chang, Greg Kroah-Hartman, Rob Herring,
Krzysztof Kozlowski, Felipe Balbi, linux-usb, devicetree,
linux-kernel
Add a new 'snps,global-regs-starting-offset' DT to dwc3 core to remap
the global register start address
The RTK DHC SoCs were designed the global register address offset at
0x8100. The default address offset is constant at DWC3_GLOBALS_REGS_START
(0xc100). Therefore, add the property of device-tree to adjust this
address offset.
Signed-off-by: Stanley Chang <stanley_chang@realtek.com>
---
v2 to v3 change:
1. Fix the dtschema validation error.
v1 to v2 change:
1. Change the name of the property "snps,global-regs-starting-offset".
2. Adjust the format of comment.
3. Add initial value of the global_regs_starting_offset
4. Remove the log of dev_info.
---
Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
index be36956af53b..4f83fa8cb6cb 100644
--- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
@@ -359,6 +359,14 @@ properties:
items:
enum: [1, 4, 8, 16, 32, 64, 128, 256]
+ snps,global-regs-starting-offset:
+ description:
+ value for remapping global register start address. For some dwc3
+ controller, the dwc3 global register start address is not at
+ default DWC3_GLOBALS_REGS_START (0xc100). This property is added to
+ adjust the address.
+ $ref: '/schemas/types.yaml#/definitions/uint32'
+
port:
$ref: /schemas/graph.yaml#/properties/port
description:
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v3 2/2] dt-bindings: usb: snps,dwc3: Add 'snps,global-regs-starting-offset' quirk
2023-04-21 6:18 ` [PATCH v3 2/2] dt-bindings: usb: snps,dwc3: Add 'snps,global-regs-starting-offset' quirk Stanley Chang
@ 2023-04-21 13:04 ` Rob Herring
2023-04-21 16:12 ` Stanley Chang[昌育德]
0 siblings, 1 reply; 4+ messages in thread
From: Rob Herring @ 2023-04-21 13:04 UTC (permalink / raw)
To: Stanley Chang
Cc: Thinh Nguyen, Greg Kroah-Hartman, Krzysztof Kozlowski,
Felipe Balbi, linux-usb, devicetree, linux-kernel
On Fri, Apr 21, 2023 at 1:18 AM Stanley Chang <stanley_chang@realtek.com> wrote:
>
> Add a new 'snps,global-regs-starting-offset' DT to dwc3 core to remap
> the global register start address
>
> The RTK DHC SoCs were designed the global register address offset at
> 0x8100. The default address offset is constant at DWC3_GLOBALS_REGS_START
> (0xc100). Therefore, add the property of device-tree to adjust this
> address offset.
>
> Signed-off-by: Stanley Chang <stanley_chang@realtek.com>
> ---
> v2 to v3 change:
> 1. Fix the dtschema validation error.
>
> v1 to v2 change:
> 1. Change the name of the property "snps,global-regs-starting-offset".
> 2. Adjust the format of comment.
> 3. Add initial value of the global_regs_starting_offset
> 4. Remove the log of dev_info.
> ---
> Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
> index be36956af53b..4f83fa8cb6cb 100644
> --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
> +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
> @@ -359,6 +359,14 @@ properties:
> items:
> enum: [1, 4, 8, 16, 32, 64, 128, 256]
>
> + snps,global-regs-starting-offset:
> + description:
> + value for remapping global register start address. For some dwc3
> + controller, the dwc3 global register start address is not at
> + default DWC3_GLOBALS_REGS_START (0xc100). This property is added to
> + adjust the address.
> + $ref: '/schemas/types.yaml#/definitions/uint32'
Again, we're not going to keep adding properties for every DWC3
variation. If it is board specific, then yes a property is
appropriate. If it is SoC specific, then imply it from the compatible.
Or in this case, you could possibly add another reg entry.
Rob
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [PATCH v3 2/2] dt-bindings: usb: snps,dwc3: Add 'snps,global-regs-starting-offset' quirk
2023-04-21 13:04 ` Rob Herring
@ 2023-04-21 16:12 ` Stanley Chang[昌育德]
0 siblings, 0 replies; 4+ messages in thread
From: Stanley Chang[昌育德] @ 2023-04-21 16:12 UTC (permalink / raw)
To: Rob Herring
Cc: Thinh Nguyen, Greg Kroah-Hartman, Krzysztof Kozlowski,
Felipe Balbi, linux-usb@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Hi Rob,
> Again, we're not going to keep adding properties for every DWC3 variation. If
> it is board specific, then yes a property is appropriate. If it is SoC specific, then
> imply it from the compatible.
> Or in this case, you could possibly add another reg entry.
>
> Rob
>
Let me try to understand your concerns.
The device-tree property should work for all dwc3 IPs and can be specified by different boards.
For a SoC specific, it should use a compatible or registry entry to change it.
So you think we can't use a property to specify this offset.
Is my understanding correct?
If it is right, using property to solve this problem was my mistake.
I will think a new method to resolve it.
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-04-21 16:13 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2023-04-21 6:18 [PATCH v3 1/2] usb: dwc3: core: add support for remapping global register start address Stanley Chang
2023-04-21 6:18 ` [PATCH v3 2/2] dt-bindings: usb: snps,dwc3: Add 'snps,global-regs-starting-offset' quirk Stanley Chang
2023-04-21 13:04 ` Rob Herring
2023-04-21 16:12 ` Stanley Chang[昌育德]
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